AArch64: Don't emit CFI for SCS register in nounwind functions.

[pcc]

Summary

All that you can legitimately do with the CFI for a nounwind function
is get a backtrace, and adjusting the SCS register is not (currently)
required for this purpose.

[pcc]

• Undo unintentional change

[eugenis]

LGTM

llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp

BuildMI(MBB, MI, DL, TII.get(AArch64::STRXpost))
         .addReg(AArch64::X18)
         .addImm(8)
         .setMIFlag(MachineInstr::FrameSetup);
 
     if (NeedsWinCFI)
       BuildMI(MBB, MI, DL, TII.get(AArch64::SEH_Nop))
           .setMIFlag(MachineInstr::FrameSetup);
 
+    if (!MF.getFunction().hasFnAttribute(Attribute::NoUnwind)) {
       // Emit a CFI instruction that causes 8 to be subtracted from the value of
       // x18 when unwinding past this frame.
       static const char CFIInst[] = {
           dwarf::DW_CFA_val_expression,
           18, // register
           2,  // length
           static_cast<char>(unsigned(dwarf::DW_OP_breg18)),
           static_cast<char>(-8) & 0x7f, // addend (sleb128)
       };
       unsigned CFIIndex =
           MF.addFrameInst(MCCFIInstruction::createEscape(nullptr, CFIInst));
       BuildMI(MBB, MI, DL, TII.get(AArch64::CFI_INSTRUCTION))
           .addCFIIndex(CFIIndex)
           .setMIFlag(MachineInstr::FrameSetup);
+    }
 
     // This instruction also makes x18 live-in to the entry block.
     MBB.addLiveIn(AArch64::X18);
   }
 
   for (auto RPII = RegPairs.rbegin(), RPIE = RegPairs.rend(); RPII != RPIE;
        ++RPII) {
     RegPairInfo RPI = *RPII;

llvm/trunk/test/CodeGen/AArch64/shadow-call-stack.ll

define i32 @f4() shadowcallstack {
   %res12 = add i32 %res1, %res2
   %res34 = add i32 %res3, %res4
   %res1234 = add i32 %res12, %res34
   ; CHECK: ldp {{.*}}x30, [sp
   ; CHECK: ldr x30, [x18, #-8]!
   ; CHECK: ret
   ret i32 %res1234
 }
+
+define i32 @f5() shadowcallstack nounwind {
+  ; CHECK: f5:
+  ; CHECK-NOT: .cfi_escape
+  %res = call i32 @bar()
+  %res1 = add i32 %res, 1
+  ret i32 %res
+}