[AMDGPU] An exp must be branched over if exec=0

[tpr]

Summary

Change-Id: I1f57e70da08c08fe65917d762d82ba28251a5b5b

[arsenm]

LGTM

[nhaehnle]

This should already be fixed in trunk. Trunk has a function TII->hasUnwantedEffectsWhenEXECEmpty to cover this, and this patch simply shouldn't apply.

I vaguely recall you complained about those changes I made and backed them out of the Vulkan branch because of some pixel shader case where some bad lowering happened? I don't remember the details right now.

[tpr]

Yes, sorry, I pushed this fix to phab without even checking that it applies to trunk. I had completely forgotten that you have already fixed this in trunk (D48431) and I reverted your fix in our local branch.

lib/Target/AMDGPU/SIInsertSkips.cpp

for (MachineBasicBlock::const_iterator I = MBB.begin(), E = MBB.end();
       // defining the register that is used by the scalar one is not executed
       // and scalar instruction will operate on undefined data. For
       // V_READFIRSTLANE/V_READLANE we should avoid predicated execution.
       if ((I->getOpcode() == AMDGPU::V_READFIRSTLANE_B32) ||
           (I->getOpcode() == AMDGPU::V_READLANE_B32)) {
         return true;
       }
 
+      // We must branch over export. Export with no lanes enabled is not the same as
+      // not exporting at all, at least in some cases.
+      if (I->getOpcode() == AMDGPU::EXP || I->getOpcode() == AMDGPU::EXP_DONE)
+        return true;
+
       ++NumInstr;
 
       if (NumInstr >= SkipThreshold)
         return true;
     }
   }
 
   return false;

test/CodeGen/AMDGPU/branch-over-exp.mir

+# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass si-insert-skips -verify-machineinstrs -o - %s | FileCheck --enable-var-scope %s
+#
+# Check that we get a S_CBRANCH_EXECZ over an export.
+#
+# CHECK: S_CBRANCH_EXECZ
+
+---
+name:            _func
+body:             |
+  bb.0:
+    successors: %bb.1(0x40000000), %bb.2(0x40000000)
+    liveins: $vgpr0, $vgpr1, $vgpr2
+  
+    V_CMP_LT_U32_e32 killed $vgpr0, killed $vgpr1, implicit-def $vcc, implicit $exec
+    $sgpr0_sgpr1 = S_AND_SAVEEXEC_B64 killed $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
+    SI_MASK_BRANCH %bb.2, implicit $exec
+    S_BRANCH %bb.1
+  
+  bb.1:
+    successors: %bb.2(0x80000000)
+    liveins: $vgpr2
+  
+    EXP_DONE 32, killed renamable $vgpr2, undef renamable $vgpr0, undef renamable $vgpr0, undef renamable $vgpr0, 0, 0, 1, implicit $exec
+  
+  bb.2:
+    S_ENDPGM
+
+...