[ARM] Turn assert into condition in ARMCGP

[samparker]

Summary

Turn the assert in PrepareConstants into a conditon so that we can handle mul instructions with negative immediates.

[SjoerdMeijer]

Looks like a straightforward fix/addition to me.

test/CodeGen/ARM/CGP/arm-cgp-icmps.ll

324

nit: to test a mul with a negative number, we can probably have a more minimal example (we don't need a store, load, trunc, and).

lib/Target/ARM/ARMCodeGenPrepare.cpp

IRPromoter::PrepareConstants(SmallPtrSetImpl<Value*> &Visited,
   // just need to be zero extended into their new type, but complications arise
   // because:
   // - For nuw binary operators, negative immediates would need sign extending;
   //   however, instead we'll change them to positive and zext them. We can do
   //   this because:
   //   > The operators that can wrap are: add, sub, mul and shl.
   //   > shl interprets its second operand as unsigned and if the first operand
   //     is an immediate, it will need zext to be nuw.
-  //   > I'm assuming mul cannot be nuw while using a negative immediate...
+  //   > I'm assuming mul has to interpret immediates as unsigned for nuw.
   //   > Which leaves the nuw add and sub to be handled; as with shl, if an
   //     immediate is used as operand 0, it will need zext to be nuw.
   // - We also allow add and sub to safely overflow in certain circumstances
   //   and only when the value (operand 0) is being decreased.
   //
   // For adds and subs, that are either nuw or safely wrap and use a negative
   // immediate as operand 1, we create an equivalent instruction using a
   // positive immediate. That positive immediate can then be zext along with
   // all the other immediates later.
   for (auto *V : Visited) {
     if (!isa<Instruction>(V))
       continue;
 
     auto *I = cast<Instruction>(V);
     if (SafeToPromote.count(I)) {
 
       if (!isa<OverflowingBinaryOperator>(I))
         continue;
 
       if (auto *Const = dyn_cast<ConstantInt>(I->getOperand(1))) {
         if (!Const->isNegative())
           break;
 
         unsigned Opc = I->getOpcode();
-        assert((Opc == Instruction::Add || Opc == Instruction::Sub) &&
-               "expected only an add or sub to use a negative imm");
+        if (Opc != Instruction::Add && Opc != Instruction::Sub)
+          continue;
 
         LLVM_DEBUG(dbgs() << "ARM CGP: Adjusting " << *I << "\n");
         auto *NewConst = ConstantInt::get(Ctx, Const->getValue().abs());
         Builder.SetInsertPoint(I);
         Value *NewVal = Opc == Instruction::Sub ?
           Builder.CreateAdd(I->getOperand(0), NewConst) :
           Builder.CreateSub(I->getOperand(0), NewConst);
         LLVM_DEBUG(dbgs() << "ARM CGP: New equivalent: " << *NewVal << "\n");

test/CodeGen/ARM/CGP/arm-cgp-icmps.ll

 entry:
   %0 = load i8, i8* %a, align 1
   %add.i = add i8 %0, -7
   %cmp = icmp ugt i8 %add.i, -5
   %conv1 = zext i1 %cmp to i32
   ret i32 %conv1
 }
 
+; CHECK-COMMON-LABEL: mul_with_neg_imm
+; CHECK-COMMON-NOT: uxtb
+; CHECK-COMMON:     and [[BIT0:r[0-9]+]], r0, #1
+; CHECK-COMMON:     add.w [[MUL32:r[0-9]+]], [[BIT0]], [[BIT0]], lsl #5
+; CHECK-COMMON:     cmp.w r0, [[MUL32]], lsl #2
+define void @mul_with_neg_imm(i32* %a, i32* %b, i32* %c) {
+entry:
+  store i32 -59772, i32* %c, align 4
+  %0 = load i32, i32* %a, align 4
+  %1 = trunc i32 %0 to i8
+  %2 = and i8 %1, 1
+  %conv.i = mul nuw i8 %2, -124
+  %tobool = icmp eq i8 %conv.i, 0
+  br i1 %tobool, label %if.end, label %if.then
+
+if.then:
+  store i32 0, i32* %b, align 4
+  br label %if.end
+
+if.end:
+  ret void
+}