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Differential D54005

AMDGPU: Fix assertion with bitcast from i64 constant to v4i16
ClosedPublic

Authored by arsenm on Nov 1 2018, 3:05 PM.

Details

Reviewers
rampitec
kzhuravl

Diff Detail

Event Timeline

arsenm created this revision.Nov 1 2018, 3:05 PM
Herald added subscribers: t-tye, tpr, dstuttard and 4 others. · View Herald TranscriptNov 1 2018, 3:05 PM
rampitec accepted this revision.Nov 1 2018, 3:15 PM

LGTM

This revision is now accepted and ready to land.Nov 1 2018, 3:15 PM
arsenm closed this revision.Nov 1 2018, 7:46 PM

r345922

Revision Contents

PathSize
lib/
Target/
AMDGPU/
7 lines
test/
CodeGen/
AMDGPU/
39 lines

Diff 172247

lib/Target/AMDGPU/AMDGPUISelLowering.cpp

Show First 20 Lines • Show All 3,811 Lines • ▼ Show 20 Lines case ISD::BITCAST: {
// //
// v2i32 (bitcast i64:k) -> build_vector lo_32(k), hi_32(k) // v2i32 (bitcast i64:k) -> build_vector lo_32(k), hi_32(k)
// TODO: Generalize and move to DAGCombiner // TODO: Generalize and move to DAGCombiner
SDValue Src = N->getOperand(0); SDValue Src = N->getOperand(0);
if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Src)) { if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Src)) {
if (Src.getValueType() == MVT::i64) { if (Src.getValueType() == MVT::i64) {
SDLoc SL(N); SDLoc SL(N);
uint64_t CVal = C->getZExtValue(); uint64_t CVal = C->getZExtValue();
return DAG.getNode(ISD::BUILD_VECTOR, SL, DestVT, SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, SL, MVT::v2i32,
DAG.getConstant(Lo_32(CVal), SL, MVT::i32), DAG.getConstant(Lo_32(CVal), SL, MVT::i32),
DAG.getConstant(Hi_32(CVal), SL, MVT::i32)); DAG.getConstant(Hi_32(CVal), SL, MVT::i32));
return DAG.getNode(ISD::BITCAST, SL, DestVT, BV);
} }
} }
if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Src)) { if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Src)) {
const APInt &Val = C->getValueAPF().bitcastToAPInt(); const APInt &Val = C->getValueAPF().bitcastToAPInt();
SDLoc SL(N); SDLoc SL(N);
uint64_t CVal = Val.getZExtValue(); uint64_t CVal = Val.getZExtValue();
SDValue Vec = DAG.getNode(ISD::BUILD_VECTOR, SL, MVT::v2i32, SDValue Vec = DAG.getNode(ISD::BUILD_VECTOR, SL, MVT::v2i32,
▲ Show 20 Lines • Show All 676 Lines • Show Last 20 Lines

test/CodeGen/AMDGPU/bitcast-constant-to-vector.ll

  • This file was added.
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
; FIXME: Merge stores
; GCN-LABEL: {{^}}cast_constant_i64_to_build_vector_v4i16:
; GCN: global_store_dwordx2
; GCN: global_store_dword v
; GCN: global_store_short
define amdgpu_kernel void @cast_constant_i64_to_build_vector_v4i16(i8 addrspace(1)* nocapture %data) {
entry:
store i8 72, i8 addrspace(1)* %data, align 1
%arrayidx1 = getelementptr inbounds i8, i8 addrspace(1)* %data, i64 1
store i8 101, i8 addrspace(1)* %arrayidx1, align 1
%arrayidx2 = getelementptr inbounds i8, i8 addrspace(1)* %data, i64 2
store i8 108, i8 addrspace(1)* %arrayidx2, align 1
%arrayidx3 = getelementptr inbounds i8, i8 addrspace(1)* %data, i64 3
store i8 108, i8 addrspace(1)* %arrayidx3, align 1
%arrayidx4 = getelementptr inbounds i8, i8 addrspace(1)* %data, i64 4
store i8 111, i8 addrspace(1)* %arrayidx4, align 1
%arrayidx5 = getelementptr inbounds i8, i8 addrspace(1)* %data, i64 5
store i8 44, i8 addrspace(1)* %arrayidx5, align 1
%arrayidx6 = getelementptr inbounds i8, i8 addrspace(1)* %data, i64 6
store i8 32, i8 addrspace(1)* %arrayidx6, align 1
%arrayidx7 = getelementptr inbounds i8, i8 addrspace(1)* %data, i64 7
store i8 87, i8 addrspace(1)* %arrayidx7, align 1
%arrayidx8 = getelementptr inbounds i8, i8 addrspace(1)* %data, i64 8
store i8 111, i8 addrspace(1)* %arrayidx8, align 1
%arrayidx9 = getelementptr inbounds i8, i8 addrspace(1)* %data, i64 9
store i8 114, i8 addrspace(1)* %arrayidx9, align 1
%arrayidx10 = getelementptr inbounds i8, i8 addrspace(1)* %data, i64 10
store i8 108, i8 addrspace(1)* %arrayidx10, align 1
%arrayidx11 = getelementptr inbounds i8, i8 addrspace(1)* %data, i64 11
store i8 100, i8 addrspace(1)* %arrayidx11, align 1
%arrayidx12 = getelementptr inbounds i8, i8 addrspace(1)* %data, i64 12
store i8 33, i8 addrspace(1)* %arrayidx12, align 1
%arrayidx13 = getelementptr inbounds i8, i8 addrspace(1)* %data, i64 13
store i8 72, i8 addrspace(1)* %arrayidx13, align 1
ret void
}