[AMDGPU] Defined gfx909 Raven Ridge 2

[tpr]

Summary

Change-Id: I5779fa1a5d0212f6abd488143bbcf8bff3d747f8

[kzhuravl]

This also requires a clang change.

docs/AMDGPUUsage.rst

596–597 ↗

(On Diff #170154)

Make 0x030 reserved.
Make 0x031 gfx909.

include/llvm/BinaryFormat/ELF.h

704 ↗

(On Diff #170154)

Can you change it 0x031?

708 ↗

(On Diff #170154)

Can you change it to 0x030?

include/llvm/Support/TargetParser.h

323 ↗

(On Diff #170154)

This needs to be updated.

[tpr]

V2: Addressed review comments.

[kzhuravl]

LGTM

llvm/trunk/docs/AMDGPUUsage.rst

``gfx904``                  ``amdgcn``   dGPU  - xnack           *TBA*
                                                                       .. TODO
                                                                          Add product
                                                                          names.
      ``gfx906``                  ``amdgcn``   dGPU  - xnack           *TBA*
                                                       [off]
                                                                       .. TODO
                                                                          Add product
                                                                          names.
+     ``gfx909``                  ``amdgcn``   APU   - xnack           *TBA* (Raven Ridge 2)
+                                                      [on]
+                                                                      .. TODO
+                                                                         Add product
+                                                                         names.
      =========== =============== ============ ===== ========= ======= ==================
 
 .. _amdgpu-target-features:
 
 Target Features
 ---------------
 
 Target features control how code is generated to support certain
.. table:: AMDGPU ``EF_AMDGPU_MACH`` Values
      ``EF_AMDGPU_MACH_AMDGCN_GFX802``  0x029      ``gfx802``
      ``EF_AMDGPU_MACH_AMDGCN_GFX803``  0x02a      ``gfx803``
      ``EF_AMDGPU_MACH_AMDGCN_GFX810``  0x02b      ``gfx810``
      ``EF_AMDGPU_MACH_AMDGCN_GFX900``  0x02c      ``gfx900``
      ``EF_AMDGPU_MACH_AMDGCN_GFX902``  0x02d      ``gfx902``
      ``EF_AMDGPU_MACH_AMDGCN_GFX904``  0x02e      ``gfx904``
      ``EF_AMDGPU_MACH_AMDGCN_GFX906``  0x02f      ``gfx906``
      *reserved*                        0x030      Reserved.
+     ``EF_AMDGPU_MACH_AMDGCN_GFX909``  0x031      ``gfx909``
      ================================= ========== =============================
 
 Sections
 --------
 
 An AMDGPU target ELF code object has the standard ELF sections which include:
 
   .. table:: AMDGPU ELF Sections

llvm/trunk/include/llvm/BinaryFormat/ELF.h

enum : unsigned {
   EF_AMDGPU_MACH_AMDGCN_GFX802 = 0x029,
   EF_AMDGPU_MACH_AMDGCN_GFX803 = 0x02a,
   EF_AMDGPU_MACH_AMDGCN_GFX810 = 0x02b,
   // AMDGCN GFX9.
   EF_AMDGPU_MACH_AMDGCN_GFX900 = 0x02c,
   EF_AMDGPU_MACH_AMDGCN_GFX902 = 0x02d,
   EF_AMDGPU_MACH_AMDGCN_GFX904 = 0x02e,
   EF_AMDGPU_MACH_AMDGCN_GFX906 = 0x02f,
+  EF_AMDGPU_MACH_AMDGCN_GFX909 = 0x031,
 
   // Reserved for AMDGCN-based processors.
   EF_AMDGPU_MACH_AMDGCN_RESERVED0 = 0x027,
   EF_AMDGPU_MACH_AMDGCN_RESERVED1 = 0x030,
 
   // First/last AMDGCN-based processors.
   EF_AMDGPU_MACH_AMDGCN_FIRST = EF_AMDGPU_MACH_AMDGCN_GFX600,
-  EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX906,
+  EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX909,
 
   // Indicates if the xnack target feature is enabled for all code contained in
   // the object.
   EF_AMDGPU_XNACK = 0x100,
 };
 
 // ELF Relocation types for AMDGPU
 enum {

llvm/trunk/include/llvm/Support/TargetParser.h

enum GPUKind : uint32_t {
   GK_GFX802 = 51,
   GK_GFX803 = 52,
   GK_GFX810 = 53,
 
   GK_GFX900 = 60,
   GK_GFX902 = 61,
   GK_GFX904 = 62,
   GK_GFX906 = 63,
+  GK_GFX909 = 65,
 
   GK_AMDGCN_FIRST = GK_GFX600,
-  GK_AMDGCN_LAST = GK_GFX906,
+  GK_AMDGCN_LAST = GK_GFX909,
 };
 
 /// Instruction set architecture version.
 struct IsaVersion {
   unsigned Major;
   unsigned Minor;
   unsigned Stepping;
 };

llvm/trunk/lib/ObjectYAML/ELFYAML.cpp

case ELF::EM_AMDGPU:
     BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX801, EF_AMDGPU_MACH);
     BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX802, EF_AMDGPU_MACH);
     BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX803, EF_AMDGPU_MACH);
     BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX810, EF_AMDGPU_MACH);
     BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX900, EF_AMDGPU_MACH);
     BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX902, EF_AMDGPU_MACH);
     BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX904, EF_AMDGPU_MACH);
     BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX906, EF_AMDGPU_MACH);
+    BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX909, EF_AMDGPU_MACH);
     BCase(EF_AMDGPU_XNACK);
     break;
   case ELF::EM_X86_64:
     break;
   default:
     llvm_unreachable("Unsupported architecture");
   }
 #undef BCase

llvm/trunk/lib/Support/TargetParser.cpp

constexpr GPUInfo R600GPUs[26] = {
   {{"caicos"},  {"caicos"},  GK_CAICOS,  FEATURE_NONE },
   {{"aruba"},   {"cayman"},  GK_CAYMAN,  FEATURE_FMA  },
   {{"cayman"},  {"cayman"},  GK_CAYMAN,  FEATURE_FMA  },
   {{"turks"},   {"turks"},   GK_TURKS,   FEATURE_NONE }
 };
 
 // This table should be sorted by the value of GPUKind
 // Don't bother listing the implicitly true features
-constexpr GPUInfo AMDGCNGPUs[32] = {
+constexpr GPUInfo AMDGCNGPUs[33] = {
   // Name         Canonical    Kind        Features
   //              Name
   {{"gfx600"},    {"gfx600"},  GK_GFX600,  FEATURE_FAST_FMA_F32},
   {{"tahiti"},    {"gfx600"},  GK_GFX600,  FEATURE_FAST_FMA_F32},
   {{"gfx601"},    {"gfx601"},  GK_GFX601,  FEATURE_NONE},
   {{"hainan"},    {"gfx601"},  GK_GFX601,  FEATURE_NONE},
   {{"oland"},     {"gfx601"},  GK_GFX601,  FEATURE_NONE},
   {{"pitcairn"},  {"gfx601"},  GK_GFX601,  FEATURE_NONE},
constexpr GPUInfo AMDGCNGPUs[33] = {
   {{"polaris10"}, {"gfx803"},  GK_GFX803,  FEATURE_FAST_DENORMAL_F32},
   {{"polaris11"}, {"gfx803"},  GK_GFX803,  FEATURE_FAST_DENORMAL_F32},
   {{"gfx810"},    {"gfx810"},  GK_GFX810,  FEATURE_FAST_DENORMAL_F32},
   {{"stoney"},    {"gfx810"},  GK_GFX810,  FEATURE_FAST_DENORMAL_F32},
   {{"gfx900"},    {"gfx900"},  GK_GFX900,  FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32},
   {{"gfx902"},    {"gfx902"},  GK_GFX902,  FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32},
   {{"gfx904"},    {"gfx904"},  GK_GFX904,  FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32},
   {{"gfx906"},    {"gfx906"},  GK_GFX906,  FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32},
+  {{"gfx909"},    {"gfx909"},  GK_GFX909,  FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32},
 };
 
 const GPUInfo *getArchEntry(AMDGPU::GPUKind AK, ArrayRef<GPUInfo> Table) {
   GPUInfo Search = { {""}, {""}, AK, AMDGPU::FEATURE_NONE };
 
   auto I = std::lower_bound(Table.begin(), Table.end(), Search,
     [](const GPUInfo &A, const GPUInfo &B) {
       return A.Kind < B.Kind;
AMDGPU::IsaVersion AMDGPU::getIsaVersion(StringRef GPU) {
   case GK_GFX801: return {8, 0, 1};
   case GK_GFX802: return {8, 0, 2};
   case GK_GFX803: return {8, 0, 3};
   case GK_GFX810: return {8, 1, 0};
   case GK_GFX900: return {9, 0, 0};
   case GK_GFX902: return {9, 0, 2};
   case GK_GFX904: return {9, 0, 4};
   case GK_GFX906: return {9, 0, 6};
+  case GK_GFX909: return {9, 0, 9};
   default:        return {0, 0, 0};
   }
 }

llvm/trunk/lib/Target/AMDGPU/AMDGPU.td

 
 def FeatureISAVersion9_0_6 : SubtargetFeatureISAVersion <9,0,6,
   [FeatureGFX9,
    HalfRate64Ops,
    FeatureFmaMixInsts,
    FeatureLDSBankCount32,
    FeatureDLInsts]>;
 
+def FeatureISAVersion9_0_9 : SubtargetFeatureISAVersion <9,0,9,
+  [FeatureGFX9,
+   FeatureMadMixInsts,
+   FeatureLDSBankCount32,
+   FeatureXNACK,
+   FeatureD16PreservesUnusedBits]>;
+
 //===----------------------------------------------------------------------===//
 // Debugger related subtarget features.
 //===----------------------------------------------------------------------===//
 
 def FeatureDebuggerInsertNops : SubtargetFeature<
   "amdgpu-debugger-insert-nops",
   "DebuggerInsertNops",
   "true",

llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h

enum {
     ISAVersion8_0_1,
     ISAVersion8_0_2,
     ISAVersion8_0_3,
     ISAVersion8_1_0,
     ISAVersion9_0_0,
     ISAVersion9_0_2,
     ISAVersion9_0_4,
     ISAVersion9_0_6,
+    ISAVersion9_0_9,
   };
 
   enum TrapHandlerAbi {
     TrapHandlerAbiNone = 0,
     TrapHandlerAbiHsa = 1
   };
 
   enum TrapID {

llvm/trunk/lib/Target/AMDGPU/GCNProcessors.td

 
 def : ProcessorModel<"gfx904", SIQuarterSpeedModel,
   [FeatureISAVersion9_0_4]
 >;
 
 def : ProcessorModel<"gfx906", SIQuarterSpeedModel,
   [FeatureISAVersion9_0_6]
 >;
+
+def : ProcessorModel<"gfx909", SIQuarterSpeedModel,
+  [FeatureISAVersion9_0_9]
+>;
+

llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp

StringRef AMDGPUTargetStreamer::getArchNameFromElfMach(unsigned ElfMach) {
   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX801: AK = GK_GFX801;  break;
   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX802: AK = GK_GFX802;  break;
   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX803: AK = GK_GFX803;  break;
   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX810: AK = GK_GFX810;  break;
   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX900: AK = GK_GFX900;  break;
   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX902: AK = GK_GFX902;  break;
   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX904: AK = GK_GFX904;  break;
   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX906: AK = GK_GFX906;  break;
+  case ELF::EF_AMDGPU_MACH_AMDGCN_GFX909: AK = GK_GFX909;  break;
   case ELF::EF_AMDGPU_MACH_NONE:          AK = GK_NONE;    break;
   }
 
   StringRef GPUName = getArchNameAMDGCN(AK);
   if (GPUName != "")
     return GPUName;
   return getArchNameR600(AK);
 }
unsigned AMDGPUTargetStreamer::getElfMach(StringRef GPU) {
   case GK_GFX801:  return ELF::EF_AMDGPU_MACH_AMDGCN_GFX801;
   case GK_GFX802:  return ELF::EF_AMDGPU_MACH_AMDGCN_GFX802;
   case GK_GFX803:  return ELF::EF_AMDGPU_MACH_AMDGCN_GFX803;
   case GK_GFX810:  return ELF::EF_AMDGPU_MACH_AMDGCN_GFX810;
   case GK_GFX900:  return ELF::EF_AMDGPU_MACH_AMDGCN_GFX900;
   case GK_GFX902:  return ELF::EF_AMDGPU_MACH_AMDGCN_GFX902;
   case GK_GFX904:  return ELF::EF_AMDGPU_MACH_AMDGCN_GFX904;
   case GK_GFX906:  return ELF::EF_AMDGPU_MACH_AMDGCN_GFX906;
+  case GK_GFX909:  return ELF::EF_AMDGPU_MACH_AMDGCN_GFX909;
   case GK_NONE:    return ELF::EF_AMDGPU_MACH_NONE;
   }
 
   llvm_unreachable("unknown GPU");
 }
 
 //===----------------------------------------------------------------------===//
 // AMDGPUTargetAsmStreamer

llvm/trunk/test/CodeGen/AMDGPU/elf-header-flags-mach.ll

 ; RUN: llc -filetype=obj -march=amdgcn -mcpu=polaris10 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX803 %s
 ; RUN: llc -filetype=obj -march=amdgcn -mcpu=polaris11 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX803 %s
 ; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx810 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX810 %s
 ; RUN: llc -filetype=obj -march=amdgcn -mcpu=stoney < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX810 %s
 ; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx900 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX900 %s
 ; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx902 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX902 %s
 ; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx904 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX904 %s
 ; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx906 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX906 %s
+; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx909 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX909 %s
 
 ; ARCH-R600: Arch: r600
 ; ARCH-GCN:  Arch: amdgcn
 
 ; ALL:         Flags [
 ; R600:          EF_AMDGPU_MACH_R600_R600     (0x1)
 ; R630:          EF_AMDGPU_MACH_R600_R630     (0x2)
 ; RS880:         EF_AMDGPU_MACH_R600_RS880    (0x3)

 ; GFX803:        EF_AMDGPU_MACH_AMDGCN_GFX803 (0x2A)
 ; GFX810:        EF_AMDGPU_MACH_AMDGCN_GFX810 (0x2B)
 ; GFX810-NEXT:   EF_AMDGPU_XNACK              (0x100)
 ; GFX900:        EF_AMDGPU_MACH_AMDGCN_GFX900 (0x2C)
 ; GFX902:        EF_AMDGPU_MACH_AMDGCN_GFX902 (0x2D)
 ; GFX902-NEXT:   EF_AMDGPU_XNACK              (0x100)
 ; GFX904:        EF_AMDGPU_MACH_AMDGCN_GFX904 (0x2E)
 ; GFX906:        EF_AMDGPU_MACH_AMDGCN_GFX906 (0x2F)
+; GFX909:        EF_AMDGPU_MACH_AMDGCN_GFX909 (0x31)
 ; ALL:         ]
 
 define amdgpu_kernel void @elf_header() {
   ret void
 }

llvm/trunk/test/CodeGen/AMDGPU/hsa-note-no-func.ll

 ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx801 | FileCheck --check-prefix=HSA --check-prefix=HSA-VI801 %s
 ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx802 | FileCheck --check-prefix=HSA --check-prefix=HSA-VI802 %s
 ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx803 | FileCheck --check-prefix=HSA --check-prefix=HSA-VI803 %s
 ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx810 | FileCheck --check-prefix=HSA --check-prefix=HSA-VI810 %s
 ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx900 | FileCheck --check-prefix=HSA --check-prefix=HSA-GFX900 %s
 ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx902 | FileCheck --check-prefix=HSA --check-prefix=HSA-GFX902 %s
 ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx904 | FileCheck --check-prefix=HSA --check-prefix=HSA-GFX904 %s
 ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx906 | FileCheck --check-prefix=HSA --check-prefix=HSA-GFX906 %s
+; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx909 | FileCheck --check-prefix=HSA --check-prefix=HSA-GFX909 %s
 
 ; HSA: .hsa_code_object_version 2,1
 ; HSA-SI600: .hsa_code_object_isa 6,0,0,"AMD","AMDGPU"
 ; HSA-SI601: .hsa_code_object_isa 6,0,1,"AMD","AMDGPU"
 ; HSA-CI700: .hsa_code_object_isa 7,0,0,"AMD","AMDGPU"
 ; HSA-CI701: .hsa_code_object_isa 7,0,1,"AMD","AMDGPU"
 ; HSA-CI702: .hsa_code_object_isa 7,0,2,"AMD","AMDGPU"
 ; HSA-CI703: .hsa_code_object_isa 7,0,3,"AMD","AMDGPU"
 ; HSA-CI704: .hsa_code_object_isa 7,0,4,"AMD","AMDGPU"
 ; HSA-VI801: .hsa_code_object_isa 8,0,1,"AMD","AMDGPU"
 ; HSA-VI802: .hsa_code_object_isa 8,0,2,"AMD","AMDGPU"
 ; HSA-VI803: .hsa_code_object_isa 8,0,3,"AMD","AMDGPU"
 ; HSA-VI810: .hsa_code_object_isa 8,1,0,"AMD","AMDGPU"
 ; HSA-GFX900: .hsa_code_object_isa 9,0,0,"AMD","AMDGPU"
 ; HSA-GFX902: .hsa_code_object_isa 9,0,2,"AMD","AMDGPU"
 ; HSA-GFX904: .hsa_code_object_isa 9,0,4,"AMD","AMDGPU"
 ; HSA-GFX906: .hsa_code_object_isa 9,0,6,"AMD","AMDGPU"
+; HSA-GFX909: .hsa_code_object_isa 9,0,9,"AMD","AMDGPU"

llvm/trunk/test/Object/AMDGPU/elf-header-flags-mach.yaml

 # RUN: llvm-readobj -s -file-headers %t.o.29 | FileCheck --check-prefixes=ELF-ALL,ELF-GFX902 %s
 # RUN: obj2yaml %t.o.29 | FileCheck --check-prefixes=YAML-GFX902 %s
 # RUN: yaml2obj -docnum=30 %s > %t.o.30
 # RUN: llvm-readobj -s -file-headers %t.o.30 | FileCheck --check-prefixes=ELF-ALL,ELF-GFX904 %s
 # RUN: obj2yaml %t.o.30 | FileCheck --check-prefixes=YAML-GFX904 %s
 # RUN: yaml2obj -docnum=31 %s > %t.o.31
 # RUN: llvm-readobj -s -file-headers %t.o.31 | FileCheck --check-prefixes=ELF-ALL,ELF-GFX906 %s
 # RUN: obj2yaml %t.o.31 | FileCheck --check-prefixes=YAML-GFX906 %s
+# RUN: yaml2obj -docnum=32 %s > %t.o.32
+# RUN: llvm-readobj -s -file-headers %t.o.32 | FileCheck --check-prefixes=ELF-ALL,ELF-GFX909 %s
+# RUN: obj2yaml %t.o.32 | FileCheck --check-prefixes=YAML-GFX909 %s
 
 
 # ELF-ALL:     Flags [
 # ELF-R600:      EF_AMDGPU_MACH_R600_R600     (0x1)
 # ELF-R630:      EF_AMDGPU_MACH_R600_R630     (0x2)
 # ELF-RS880:     EF_AMDGPU_MACH_R600_RS880    (0x3)
 # ELF-RV670:     EF_AMDGPU_MACH_R600_RV670    (0x4)
 # ELF-RV710:     EF_AMDGPU_MACH_R600_RV710    (0x5)

 # ELF-GFX801:    EF_AMDGPU_MACH_AMDGCN_GFX801 (0x28)
 # ELF-GFX802:    EF_AMDGPU_MACH_AMDGCN_GFX802 (0x29)
 # ELF-GFX803:    EF_AMDGPU_MACH_AMDGCN_GFX803 (0x2A)
 # ELF-GFX810:    EF_AMDGPU_MACH_AMDGCN_GFX810 (0x2B)
 # ELF-GFX900:    EF_AMDGPU_MACH_AMDGCN_GFX900 (0x2C)
 # ELF-GFX902:    EF_AMDGPU_MACH_AMDGCN_GFX902 (0x2D)
 # ELF-GFX904:    EF_AMDGPU_MACH_AMDGCN_GFX904 (0x2E)
 # ELF-GFX906:    EF_AMDGPU_MACH_AMDGCN_GFX906 (0x2F)
+# ELF-GFX909:    EF_AMDGPU_MACH_AMDGCN_GFX909 (0x31)
 # ELF-ALL:     ]
 
 # YAML-R600:    Flags: [ EF_AMDGPU_MACH_R600_R600 ]
 # YAML-R630:    Flags: [ EF_AMDGPU_MACH_R600_R630 ]
 # YAML-RS880:   Flags: [ EF_AMDGPU_MACH_R600_RS880 ]
 # YAML-RV670:   Flags: [ EF_AMDGPU_MACH_R600_RV670 ]
 # YAML-RV710:   Flags: [ EF_AMDGPU_MACH_R600_RV710 ]
 # YAML-RV730:   Flags: [ EF_AMDGPU_MACH_R600_RV730 ]

 # YAML-GFX801:  Flags: [ EF_AMDGPU_MACH_AMDGCN_GFX801 ]
 # YAML-GFX802:  Flags: [ EF_AMDGPU_MACH_AMDGCN_GFX802 ]
 # YAML-GFX803:  Flags: [ EF_AMDGPU_MACH_AMDGCN_GFX803 ]
 # YAML-GFX810:  Flags: [ EF_AMDGPU_MACH_AMDGCN_GFX810 ]
 # YAML-GFX900:  Flags: [ EF_AMDGPU_MACH_AMDGCN_GFX900 ]
 # YAML-GFX902:  Flags: [ EF_AMDGPU_MACH_AMDGCN_GFX902 ]
 # YAML-GFX904:  Flags: [ EF_AMDGPU_MACH_AMDGCN_GFX904 ]
 # YAML-GFX906:  Flags: [ EF_AMDGPU_MACH_AMDGCN_GFX906 ]
+# YAML-GFX909:  Flags: [ EF_AMDGPU_MACH_AMDGCN_GFX909 ]
 
 # Doc1
 --- !ELF
 FileHeader:
   Class:   ELFCLASS32
   Data:    ELFDATA2LSB
   OSABI:   ELFOSABI_NONE
   Type:    ET_REL

 FileHeader:
   Class:   ELFCLASS64
   Data:    ELFDATA2LSB
   OSABI:   ELFOSABI_NONE
   Type:    ET_REL
   Machine: EM_AMDGPU
   Flags:   [ EF_AMDGPU_MACH_AMDGCN_GFX906 ]
 ...
+
+# Doc32
+--- !ELF
+FileHeader:
+  Class:   ELFCLASS64
+  Data:    ELFDATA2LSB
+  OSABI:   ELFOSABI_NONE
+  Type:    ET_REL
+  Machine: EM_AMDGPU
+  Flags:   [ EF_AMDGPU_MACH_AMDGCN_GFX909 ]
+...

llvm/trunk/tools/llvm-readobj/ELFDumper.cpp

static const EnumEntry<unsigned> ElfHeaderAMDGPUFlags[] = {
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX801),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX802),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX803),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX810),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX900),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX902),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX904),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX906),
+  LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX909),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_XNACK)
 };
 
 static const EnumEntry<unsigned> ElfHeaderRISCVFlags[] = {
   LLVM_READOBJ_ENUM_ENT(ELF, EF_RISCV_RVC),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_RISCV_FLOAT_ABI_SINGLE),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_RISCV_FLOAT_ABI_DOUBLE),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_RISCV_FLOAT_ABI_QUAD),