[llvm-exegesis][NFC] Simplify code now that Instruction has more semantic

[courbet]

tools/llvm-exegesis/lib/Latency.cpp

66

remove ?

[gchatelet]

• Remove debug line

tools/llvm-exegesis/lib/Latency.h

 public:
   LatencySnippetGenerator(const LLVMState &State) : SnippetGenerator(State) {}
   ~LatencySnippetGenerator() override;
 
   llvm::Expected<CodeTemplate>
   generateCodeTemplate(unsigned Opcode) const override;
 
 private:
-  llvm::Error isInfeasible(const llvm::MCInstrDesc &MCInstrDesc) const;
-
   llvm::Expected<CodeTemplate>
   generateTwoInstructionPrototype(const Instruction &Instr) const;
 };
 
 class LatencyBenchmarkRunner : public BenchmarkRunner {
 public:
   LatencyBenchmarkRunner(const LLVMState &State)
       : BenchmarkRunner(State, InstructionBenchmark::Latency) {}

tools/llvm-exegesis/lib/Latency.cpp

 #include "PerfHelper.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/MC/MCInst.h"
 #include "llvm/MC/MCInstBuilder.h"
 #include "llvm/Support/FormatVariadic.h"
 
 namespace exegesis {
 
-static bool hasUnknownOperand(const llvm::MCOperandInfo &OpInfo) {
-  return OpInfo.OperandType == llvm::MCOI::OPERAND_UNKNOWN;
-}
-
-// FIXME: Handle memory, see PR36905.
-static bool hasMemoryOperand(const llvm::MCOperandInfo &OpInfo) {
-  return OpInfo.OperandType == llvm::MCOI::OPERAND_MEMORY;
-}
-
 LatencySnippetGenerator::~LatencySnippetGenerator() = default;
 
-llvm::Error LatencySnippetGenerator::isInfeasible(
-    const llvm::MCInstrDesc &MCInstrDesc) const {
-  if (llvm::any_of(MCInstrDesc.operands(), hasUnknownOperand))
-    return llvm::make_error<BenchmarkFailure>(
-        "Infeasible : has unknown operands");
-  if (llvm::any_of(MCInstrDesc.operands(), hasMemoryOperand))
-    return llvm::make_error<BenchmarkFailure>(
-        "Infeasible : has memory operands");
-  return llvm::Error::success();
-}
-
 llvm::Expected<CodeTemplate>
 LatencySnippetGenerator::generateTwoInstructionPrototype(
     const Instruction &Instr) const {
   std::vector<unsigned> Opcodes;
   Opcodes.resize(State.getInstrInfo().getNumOpcodes());
   std::iota(Opcodes.begin(), Opcodes.end(), 0U);
   std::shuffle(Opcodes.begin(), Opcodes.end(), randomGenerator());
   for (const unsigned OtherOpcode : Opcodes) {
     if (OtherOpcode == Instr.Description->Opcode)
       continue;
     const auto &OtherInstrDesc = State.getInstrInfo().get(OtherOpcode);
-    if (auto E = isInfeasible(OtherInstrDesc)) {
-      llvm::consumeError(std::move(E));
-      continue;
-    }
     const Instruction OtherInstr(OtherInstrDesc, RATC);
+    if (OtherInstr.hasMemoryOperands())
+      continue;
     const AliasingConfigurations Forward(Instr, OtherInstr);
     const AliasingConfigurations Back(OtherInstr, Instr);
     if (Forward.empty() || Back.empty())
       continue;
     InstructionTemplate ThisIT(Instr);
     InstructionTemplate OtherIT(OtherInstr);
     if (!Forward.hasImplicitAliasing())
       setRandomAliasing(Forward, ThisIT, OtherIT);
     if (!Back.hasImplicitAliasing())
       setRandomAliasing(Back, OtherIT, ThisIT);
     CodeTemplate CT;
     CT.Info = llvm::formatv("creating cycle through {0}.",
                             State.getInstrInfo().getName(OtherOpcode));
     CT.Instructions.push_back(std::move(ThisIT));
     CT.Instructions.push_back(std::move(OtherIT));
     return std::move(CT);
   }
   return llvm::make_error<BenchmarkFailure>(
       "Infeasible : Didn't find any scheme to make the instruction serial");
 }
 
 llvm::Expected<CodeTemplate>
 LatencySnippetGenerator::generateCodeTemplate(unsigned Opcode) const {
-  const auto &InstrDesc = State.getInstrInfo().get(Opcode);
-  if (auto E = isInfeasible(InstrDesc))
-    return std::move(E);
-  const Instruction Instr(InstrDesc, RATC);
+  const Instruction Instr(State.getInstrInfo().get(Opcode), RATC);
+  if (Instr.hasMemoryOperands())
+    return llvm::make_error<BenchmarkFailure>(
+        "Infeasible : has memory operands");
+  Instr.dump(State.getRegInfo(), llvm::errs());
   if (auto CT = generateSelfAliasingCodeTemplate(Instr))
     return CT;
   else
     llvm::consumeError(CT.takeError());
   // No self aliasing, trying to create a dependency through another opcode.
   return generateTwoInstructionPrototype(Instr);
 }
 

tools/llvm-exegesis/lib/Uops.h

public:
   ~UopsSnippetGenerator() override;
 
   llvm::Expected<CodeTemplate>
   generateCodeTemplate(unsigned Opcode) const override;
 
   static constexpr const size_t kMinNumDifferentAddresses = 6;
 
 private:
-  llvm::Error isInfeasible(const llvm::MCInstrDesc &MCInstrDesc) const;
-
   // Instantiates memory operands within a snippet.
   // To make computations as parallel as possible, we generate independant
   // memory locations for instructions that load and store. If there are less
   // than kMinNumDifferentAddresses in the original snippet, we duplicate
   // instructions until there are this number of instructions.
   // For example, assuming kMinNumDifferentAddresses=5 and
   // getMaxMemoryAccessSize()=64, if the original snippet is:
   //   mov eax, [memory]

tools/llvm-exegesis/lib/Uops.cpp

 // Some instruction even make the above static renaming impossible because
 // they implicitly read and write from the same operand, e.g. ADC16rr reads
 // and writes from EFLAGS.
 // In that case we just use a greedy register assignment and hope for the
 // best.
 
 namespace exegesis {
 
-static bool hasUnknownOperand(const llvm::MCOperandInfo &OpInfo) {
-  return OpInfo.OperandType == llvm::MCOI::OPERAND_UNKNOWN;
-}
-
-llvm::Error
-UopsSnippetGenerator::isInfeasible(const llvm::MCInstrDesc &MCInstrDesc) const {
-  if (llvm::any_of(MCInstrDesc.operands(), hasUnknownOperand))
-    return llvm::make_error<BenchmarkFailure>(
-        "Infeasible : has unknown operands");
-  return llvm::Error::success();
-}
-
 static llvm::SmallVector<const Variable *, 8>
 getVariablesWithTiedOperands(const Instruction &Instr) {
   llvm::SmallVector<const Variable *, 8> Result;
   for (const auto &Var : Instr.Variables)
     if (Var.hasTiedOperands())
       Result.push_back(&Var);
   return Result;
 }
 
 static void remove(llvm::BitVector &a, const llvm::BitVector &b) {
   assert(a.size() == b.size());
   for (auto I : b.set_bits())
     a.reset(I);
 }
 
 UopsBenchmarkRunner::~UopsBenchmarkRunner() = default;
+
 UopsSnippetGenerator::~UopsSnippetGenerator() = default;
 
 void UopsSnippetGenerator::instantiateMemoryOperands(
     const unsigned ScratchSpacePointerInReg,
     std::vector<InstructionTemplate> &Instructions) const {
   if (ScratchSpacePointerInReg == 0)
     return; // no memory operands.
   const auto &ET = State.getExegesisTarget();
while (Instructions.size() < kMinNumDifferentAddresses) {
     Instructions.push_back(std::move(IT));
   }
   assert(I * MemStep < BenchmarkRunner::ScratchSpace::kSize &&
          "not enough scratch space");
 }
 
 llvm::Expected<CodeTemplate>
 UopsSnippetGenerator::generateCodeTemplate(unsigned Opcode) const {
-  const auto &InstrDesc = State.getInstrInfo().get(Opcode);
-  if (auto E = isInfeasible(InstrDesc))
-    return std::move(E);
-  const Instruction Instr(InstrDesc, RATC);
+  const Instruction Instr(State.getInstrInfo().get(Opcode), RATC);
+  if (Instr.hasMemoryOperands())
+    return llvm::make_error<BenchmarkFailure>(
+        "Infeasible : has unknown operands");
   const auto &ET = State.getExegesisTarget();
   CodeTemplate CT;
 
   const llvm::BitVector *ScratchSpaceAliasedRegs = nullptr;
   if (Instr.hasMemoryOperands()) {
     CT.ScratchSpacePointerInReg =
         ET.getScratchMemoryRegister(State.getTargetMachine().getTargetTriple());
     if (CT.ScratchSpacePointerInReg == 0)