[X86][Sched] Add zero idiom sched data to the SNB model.

[courbet]

Summary

On SNB, renamer-based zeroing does not work for:

• 16 and 8-bit GPRs[1].
• MMX [2].
• ANDN variants [3]

[1] echo 'sub %ax, %ax' | /tmp/llvm-exegesis -mode=uops -snippets-file=-
[2] echo 'pxor %mm0, %mm0' | /tmp/llvm-exegesis -mode=uops -snippets-file=-
[3] echo 'andnps %xmm0, %xmm0' | /tmp/llvm-exegesis -mode=uops -snippets-file=-

[RKSimon]

lib/Target/X86/X86SchedSandyBridge.td

37

Add PRF data as well ?

1143

You might want to avoid "9.8" - Agner has a tendency to reorder chapter numbers....

Section "Sandy Bridge and Ivy Bridge Pipeline": "Register allocation and renaming"

might be better.

[courbet]

I'd also like to get you opinion on whether we should assume that these apply to, e.g. VXORPDYrr. Because SNB is the default model, I think it would make sense to do it if typical CPU support it.

For example it's the case for HSW and SKL/SKX:

echo 'vxorps %ymm0, %ymm0, %ymm1' | llvm-exegesis -mode=uops -snippets-file=-
---
mode:            uops
key:             
  instructions:    
    - 'VXORPSYrr YMM1 YMM0 YMM0'
  config:          ''
cpu_name:        haswell
llvm_triple:     x86_64-grtev4-linux-gnu
num_repetitions: 10000
measurements:    
  - { key: '3', value: 0.0008, debug_string: HWPort0 }
  - { key: '4', value: 0.0012, debug_string: HWPort1 }
  - { key: '5', value: 0.0006, debug_string: HWPort2 }
  - { key: '6', value: 0.0003, debug_string: HWPort3 }
  - { key: '7', value: 0.0002, debug_string: HWPort4 }
  - { key: '8', value: 0.0009, debug_string: HWPort5 }
  - { key: '9', value: 0.0028, debug_string: HWPort6 }
  - { key: '10', value: 0.0001, debug_string: HWPort7 }
error:           ''
info:            ''
assembled_snippet: C5FC57C8C5FC57C8C5FC57C8C5FC57C8C5FC57C8C5FC57C8C5FC57C8C5FC57C8C5FC57C8C5FC57C8C5FC57C8C5FC57C8C5FC57C8C5FC57C8C5FC57C8C5FC57C8C3
...

[courbet]

lib/Target/X86/X86SchedSandyBridge.td

37

Sure, I'll do it in a separate change if you don't mind.

[courbet]

Better reference to agner.

[andreadb]

Nice!

On SNB, renamer-based zeroing does not work for:

    16 and 8-bit GPRs[1].
    MMX [2].
    ANDN variants [3]

Could you add that info as a small comment in test llvm-mca/X86/SandyBridge/zero-idioms.s ? So that people don't get confused when they find that some instructions from that test have a non-zero latency.

From a tablegen point of view, the patch looks good to me.
I don't have a sandybridge, so I cannot test if those numbers are valid. However, I trust you that you have verified those with exegesis.

P.s.: are you planning to look at this for other models?

Thanks a lot Clement!

[courbet]

Thanks Andrea !

In D52358#1241893, @andreadb wrote:

Could you add that info as a small comment in test llvm-mca/X86/SandyBridge/zero-idioms.s ? So that people don't get confused when they find that some instructions from that test have a non-zero latency.

Good idea, done.

P.s.: are you planning to look at this for other models?

Yes, I'm planning to do HSW,BDW,SKL,SKX.

[courbet]

Add comments in tests.

[RKSimon]

In D52358#1241869, @courbet wrote:

I'd also like to get you opinion on whether we should assume that these apply to, e.g. VXORPDYrr. Because SNB is the default model, I think it would make sense to do it if typical CPU support it.

The model has to match that cpu architecture - "supporting" additional instructions is one thing, but otherwise I'd say we need to match what Agner/Intel say.

Oddly, the Intel AoM mentions VXORPS/PD xmm and ymm and but not VANDNPS/PD as a dependency breaking zero idiom @craig.topper Any thoughts?

lib/Target/X86/X86SchedSandyBridge.td

def SandyBridgeModel : SchedMachineModel {
   let LoopMicroOpBufferSize = 28;
 
   // This flag is set to allow the scheduler to assign
   // a default model to unrecognized opcodes.
   let CompleteModel = 0;
 }
 
 let SchedModel = SandyBridgeModel in {
 
 // Sandy Bridge can issue micro-ops to 6 different ports in one cycle.
 
 // Ports 0, 1, and 5 handle all computation.
 def SBPort0 : ProcResource<1>;
 def SBPort1 : ProcResource<1>;
 def SBPort5 : ProcResource<1>;
 
 // Ports 2 and 3 are identical. They handle loads and the address half of

 }
 def: InstRW<[SBWriteResGroup29_2], (instrs PAUSE)>;
 
 def SBWriteResGroup30 : SchedWriteRes<[SBPort0]> {
   let Latency = 5;
   let NumMicroOps = 1;
   let ResourceCycles = [1];
 }
-def: InstRW<[SBWriteResGroup30], (instregex "(V?)PCMPGTQrr")>;
 
 def SBWriteResGroup31 : SchedWriteRes<[SBPort23]> {
   let Latency = 5;
   let NumMicroOps = 1;
   let ResourceCycles = [1];
 }
 def: InstRW<[SBWriteResGroup31], (instregex "MOVSX(16|32|64)rm(8|16|32)",
                                             "MOVZX(16|32|64)rm(8|16)")>;
def SBWriteResGroup131 : SchedWriteRes<[SBPort0,SBPort1,SBPort23]> {
   let Latency = 34;
   let NumMicroOps = 3;
   let ResourceCycles = [1,1,1];
 }
 def: InstRW<[SBWriteResGroup131], (instregex "DIV(R?)_FI(16|32)m")>;
 
 def: InstRW<[WriteZero], (instrs CLC)>;
 
+// Intruction variants handled by the renamer. These might not need execution
+// ports in certain conditions.
+// See Agner's Fog "The microarchitecture of Intel, AMD and VIA CPUs",
+// section 9.8 "Register allocation and renaming".
+// These can be investigated with llvm-exegesis, e.g.
+// echo 'pxor %mm0, %mm0' | /tmp/llvm-exegesis -mode=uops -snippets-file=-
+// echo 'vxorpd %xmm0, %xmm0, %xmm1' | /tmp/llvm-exegesis -mode=uops -snippets-file=-
+
+def SBWriteZeroLatency : SchedWriteRes<[]> {
+  let Latency = 0;
+}
+
+def SBWriteZeroIdiom : SchedWriteVariant<[
+    SchedVar<MCSchedPredicate<ZeroIdiomPredicate>, [SBWriteZeroLatency]>,
+    SchedVar<NoSchedPred,                          [WriteALU]>
+]>;
+def : InstRW<[SBWriteZeroIdiom], (instrs SUB32rr, SUB64rr,
+                                         XOR32rr, XOR64rr)>;
+
+def SBWriteFZeroIdiom : SchedWriteVariant<[
+    SchedVar<MCSchedPredicate<ZeroIdiomPredicate>, [SBWriteZeroLatency]>,
+    SchedVar<NoSchedPred,                          [WriteFLogic]>
+]>;
+def : InstRW<[SBWriteFZeroIdiom], (instrs XORPSrr, VXORPSrr, XORPDrr,
+                                          VXORPDrr)>;
+
+def SBWriteVZeroIdiomLogicX : SchedWriteVariant<[
+    SchedVar<MCSchedPredicate<ZeroIdiomPredicate>, [SBWriteZeroLatency]>,
+    SchedVar<NoSchedPred,                          [WriteVecLogicX]>
+]>;
+def : InstRW<[SBWriteVZeroIdiomLogicX], (instrs PXORrr, VPXORrr)>;
+
+def SBWriteVZeroIdiomALUX : SchedWriteVariant<[
+    SchedVar<MCSchedPredicate<ZeroIdiomPredicate>, [SBWriteZeroLatency]>,
+    SchedVar<NoSchedPred,                          [WriteVecALUX]>
+]>;
+def : InstRW<[SBWriteVZeroIdiomALUX], (instrs PSUBBrr, VPSUBBrr,
+                                              PSUBDrr, VPSUBDrr,
+                                              PSUBQrr, VPSUBQrr,
+                                              PSUBWrr, VPSUBWrr,
+                                              PCMPGTBrr, VPCMPGTBrr,
+                                              PCMPGTDrr, VPCMPGTDrr,
+                                              PCMPGTWrr, VPCMPGTWrr)>;
+
+def SBWriteVZeroIdiomPCMPGTQ : SchedWriteVariant<[
+    SchedVar<MCSchedPredicate<ZeroIdiomPredicate>, [SBWriteZeroLatency]>,
+    SchedVar<NoSchedPred,                          [SBWriteResGroup30]>
+]>;
+def : InstRW<[SBWriteVZeroIdiomPCMPGTQ], (instrs PCMPGTQrr, VPCMPGTQrr)>;
+
 } // SchedModel

test/CodeGen/X86/avx-schedule.ll

; ZNVER1-NEXT:    retq # sched: [1:0.50]
   %2 = load <8 x float>, <8 x float> *%a2, align 32
   %3 = fsub <8 x float> %1, %2
   ret <8 x float> %3
 }
 
 define i32 @test_testpd(<2 x double> %a0, <2 x double> %a1, <2 x double> *%a2) {
 ; GENERIC-LABEL: test_testpd:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    xorl %eax, %eax # sched: [1:0.33]
+; GENERIC-NEXT:    xorl %eax, %eax # sched: [0:0.25]
 ; GENERIC-NEXT:    vtestpd %xmm1, %xmm0 # sched: [1:1.00]
 ; GENERIC-NEXT:    setb %al # sched: [1:0.50]
 ; GENERIC-NEXT:    vtestpd (%rdi), %xmm0 # sched: [7:1.00]
 ; GENERIC-NEXT:    adcl $0, %eax # sched: [2:0.67]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SANDY-LABEL: test_testpd:
 ; SANDY:       # %bb.0:
-; SANDY-NEXT:    xorl %eax, %eax # sched: [1:0.33]
+; SANDY-NEXT:    xorl %eax, %eax # sched: [0:0.25]
 ; SANDY-NEXT:    vtestpd %xmm1, %xmm0 # sched: [1:1.00]
 ; SANDY-NEXT:    setb %al # sched: [1:0.50]
 ; SANDY-NEXT:    vtestpd (%rdi), %xmm0 # sched: [7:1.00]
 ; SANDY-NEXT:    adcl $0, %eax # sched: [2:0.67]
 ; SANDY-NEXT:    retq # sched: [1:1.00]
 ;
 ; HASWELL-LABEL: test_testpd:
 ; HASWELL:       # %bb.0:
; ZNVER1-NEXT:    retq # sched: [1:0.50]
   %4 = add i32 %1, %3
   ret i32 %4
 }
 declare i32 @llvm.x86.avx.vtestc.pd(<2 x double>, <2 x double>) nounwind readnone
 
 define i32 @test_testpd_ymm(<4 x double> %a0, <4 x double> %a1, <4 x double> *%a2) {
 ; GENERIC-LABEL: test_testpd_ymm:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    xorl %eax, %eax # sched: [1:0.33]
+; GENERIC-NEXT:    xorl %eax, %eax # sched: [0:0.25]
 ; GENERIC-NEXT:    vtestpd %ymm1, %ymm0 # sched: [1:1.00]
 ; GENERIC-NEXT:    setb %al # sched: [1:0.50]
 ; GENERIC-NEXT:    vtestpd (%rdi), %ymm0 # sched: [8:1.00]
 ; GENERIC-NEXT:    adcl $0, %eax # sched: [2:0.67]
 ; GENERIC-NEXT:    vzeroupper # sched: [100:0.33]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SANDY-LABEL: test_testpd_ymm:
 ; SANDY:       # %bb.0:
-; SANDY-NEXT:    xorl %eax, %eax # sched: [1:0.33]
+; SANDY-NEXT:    xorl %eax, %eax # sched: [0:0.25]
 ; SANDY-NEXT:    vtestpd %ymm1, %ymm0 # sched: [1:1.00]
 ; SANDY-NEXT:    setb %al # sched: [1:0.50]
 ; SANDY-NEXT:    vtestpd (%rdi), %ymm0 # sched: [8:1.00]
 ; SANDY-NEXT:    adcl $0, %eax # sched: [2:0.67]
 ; SANDY-NEXT:    vzeroupper # sched: [100:0.33]
 ; SANDY-NEXT:    retq # sched: [1:1.00]
 ;
 ; HASWELL-LABEL: test_testpd_ymm:
; ZNVER1-NEXT:    retq # sched: [1:0.50]
   %4 = add i32 %1, %3
   ret i32 %4
 }
 declare i32 @llvm.x86.avx.vtestc.pd.256(<4 x double>, <4 x double>) nounwind readnone
 
 define i32 @test_testps(<4 x float> %a0, <4 x float> %a1, <4 x float> *%a2) {
 ; GENERIC-LABEL: test_testps:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    xorl %eax, %eax # sched: [1:0.33]
+; GENERIC-NEXT:    xorl %eax, %eax # sched: [0:0.25]
 ; GENERIC-NEXT:    vtestps %xmm1, %xmm0 # sched: [1:1.00]
 ; GENERIC-NEXT:    setb %al # sched: [1:0.50]
 ; GENERIC-NEXT:    vtestps (%rdi), %xmm0 # sched: [7:1.00]
 ; GENERIC-NEXT:    adcl $0, %eax # sched: [2:0.67]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SANDY-LABEL: test_testps:
 ; SANDY:       # %bb.0:
-; SANDY-NEXT:    xorl %eax, %eax # sched: [1:0.33]
+; SANDY-NEXT:    xorl %eax, %eax # sched: [0:0.25]
 ; SANDY-NEXT:    vtestps %xmm1, %xmm0 # sched: [1:1.00]
 ; SANDY-NEXT:    setb %al # sched: [1:0.50]
 ; SANDY-NEXT:    vtestps (%rdi), %xmm0 # sched: [7:1.00]
 ; SANDY-NEXT:    adcl $0, %eax # sched: [2:0.67]
 ; SANDY-NEXT:    retq # sched: [1:1.00]
 ;
 ; HASWELL-LABEL: test_testps:
 ; HASWELL:       # %bb.0:
; ZNVER1-NEXT:    retq # sched: [1:0.50]
   %4 = add i32 %1, %3
   ret i32 %4
 }
 declare i32 @llvm.x86.avx.vtestc.ps(<4 x float>, <4 x float>) nounwind readnone
 
 define i32 @test_testps_ymm(<8 x float> %a0, <8 x float> %a1, <8 x float> *%a2) {
 ; GENERIC-LABEL: test_testps_ymm:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    xorl %eax, %eax # sched: [1:0.33]
+; GENERIC-NEXT:    xorl %eax, %eax # sched: [0:0.25]
 ; GENERIC-NEXT:    vtestps %ymm1, %ymm0 # sched: [1:1.00]
 ; GENERIC-NEXT:    setb %al # sched: [1:0.50]
 ; GENERIC-NEXT:    vtestps (%rdi), %ymm0 # sched: [8:1.00]
 ; GENERIC-NEXT:    adcl $0, %eax # sched: [2:0.67]
 ; GENERIC-NEXT:    vzeroupper # sched: [100:0.33]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SANDY-LABEL: test_testps_ymm:
 ; SANDY:       # %bb.0:
-; SANDY-NEXT:    xorl %eax, %eax # sched: [1:0.33]
+; SANDY-NEXT:    xorl %eax, %eax # sched: [0:0.25]
 ; SANDY-NEXT:    vtestps %ymm1, %ymm0 # sched: [1:1.00]
 ; SANDY-NEXT:    setb %al # sched: [1:0.50]
 ; SANDY-NEXT:    vtestps (%rdi), %ymm0 # sched: [8:1.00]
 ; SANDY-NEXT:    adcl $0, %eax # sched: [2:0.67]
 ; SANDY-NEXT:    vzeroupper # sched: [100:0.33]
 ; SANDY-NEXT:    retq # sched: [1:1.00]
 ;
 ; HASWELL-LABEL: test_testps_ymm:

test/CodeGen/X86/avx512-schedule.ll

; SKX-NEXT:    retq # sched: [7:1.00]
   %cmp10.i = fcmp oeq float %a, %b
   %conv11.i = zext i1 %cmp10.i to i32
   ret i32 %conv11.i
 }
 
 define float @test5(float %p) #0 {
 ; GENERIC-LABEL: test5:
 ; GENERIC:       # %bb.0: # %entry
-; GENERIC-NEXT:    vxorps %xmm1, %xmm1, %xmm1 # sched: [1:1.00]
+; GENERIC-NEXT:    vxorps %xmm1, %xmm1, %xmm1 # sched: [0:0.25]
 ; GENERIC-NEXT:    vucomiss %xmm1, %xmm0 # sched: [2:1.00]
 ; GENERIC-NEXT:    jne .LBB67_1 # sched: [1:1.00]
 ; GENERIC-NEXT:    jp .LBB67_1 # sched: [1:1.00]
 ; GENERIC-NEXT:  # %bb.2: # %return
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ; GENERIC-NEXT:  .LBB67_1: # %if.end
 ; GENERIC-NEXT:    seta %al # sched: [2:1.00]
 ; GENERIC-NEXT:    movzbl %al, %eax # sched: [1:0.33]

 return:                                           ; preds = %if.end, %entry
   %retval.0 = phi float [ %cond, %if.end ], [ %p, %entry ]
   ret float %retval.0
 }
 
 define i32 @test6(i32 %a, i32 %b) {
 ; GENERIC-LABEL: test6:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    xorl %eax, %eax # sched: [1:0.33]
+; GENERIC-NEXT:    xorl %eax, %eax # sched: [0:0.25]
 ; GENERIC-NEXT:    cmpl %esi, %edi # sched: [1:0.33]
 ; GENERIC-NEXT:    sete %al # sched: [1:0.50]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: test6:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    xorl %eax, %eax # sched: [1:0.25]
 ; SKX-NEXT:    cmpl %esi, %edi # sched: [1:0.25]
 ; SKX-NEXT:    sete %al # sched: [1:0.50]
 ; SKX-NEXT:    retq # sched: [7:1.00]
   %cmp = icmp eq i32 %a, %b
   %res = zext i1 %cmp to i32
   ret i32 %res
 }
 
 define i32 @test7(double %x, double %y) #2 {
 ; GENERIC-LABEL: test7:
 ; GENERIC:       # %bb.0: # %entry
-; GENERIC-NEXT:    xorl %eax, %eax # sched: [1:0.33]
+; GENERIC-NEXT:    xorl %eax, %eax # sched: [0:0.25]
 ; GENERIC-NEXT:    vucomisd %xmm1, %xmm0 # sched: [2:1.00]
 ; GENERIC-NEXT:    setne %al # sched: [1:0.50]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: test7:
 ; SKX:       # %bb.0: # %entry
 ; SKX-NEXT:    xorl %eax, %eax # sched: [1:0.25]
 ; SKX-NEXT:    vucomisd %xmm1, %xmm0 # sched: [2:1.00]

 ; SKX-NEXT:    retq # sched: [7:1.00]
   %b = sitofp <16 x i8> %a to <16 x double>
   ret <16 x double> %b
 }
 
 define <16 x double> @sbto16f64(<16 x double> %a) {
 ; GENERIC-LABEL: sbto16f64:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    vxorpd %xmm2, %xmm2, %xmm2 # sched: [1:1.00]
+; GENERIC-NEXT:    vxorpd %xmm2, %xmm2, %xmm2 # sched: [0:0.25]
 ; GENERIC-NEXT:    vcmpltpd %zmm0, %zmm2, %k0 # sched: [3:1.00]
 ; GENERIC-NEXT:    vcmpltpd %zmm1, %zmm2, %k1 # sched: [3:1.00]
 ; GENERIC-NEXT:    kunpckbw %k0, %k1, %k0 # sched: [1:1.00]
 ; GENERIC-NEXT:    vpmovm2d %k0, %zmm1 # sched: [1:0.33]
 ; GENERIC-NEXT:    vcvtdq2pd %ymm1, %zmm0 # sched: [4:1.00]
 ; GENERIC-NEXT:    vextracti64x4 $1, %zmm1, %ymm1 # sched: [1:1.00]
 ; GENERIC-NEXT:    vcvtdq2pd %ymm1, %zmm1 # sched: [4:1.00]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
; SKX-NEXT:    retq # sched: [7:1.00]
   %cmpres = fcmp ogt <16 x double> %a, zeroinitializer
   %1 = sitofp <16 x i1> %cmpres to <16 x double>
   ret <16 x double> %1
 }
 
 define <8 x double> @sbto8f64(<8 x double> %a) {
 ; GENERIC-LABEL: sbto8f64:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    vxorpd %xmm1, %xmm1, %xmm1 # sched: [1:1.00]
+; GENERIC-NEXT:    vxorpd %xmm1, %xmm1, %xmm1 # sched: [0:0.25]
 ; GENERIC-NEXT:    vcmpltpd %zmm0, %zmm1, %k0 # sched: [3:1.00]
 ; GENERIC-NEXT:    vpmovm2d %k0, %ymm0 # sched: [1:0.33]
 ; GENERIC-NEXT:    vcvtdq2pd %ymm0, %zmm0 # sched: [4:1.00]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: sbto8f64:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    vxorpd %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
 ; SKX-NEXT:    vcmpltpd %zmm0, %zmm1, %k0 # sched: [3:1.00]
 ; SKX-NEXT:    vpmovm2d %k0, %ymm0 # sched: [1:0.25]
 ; SKX-NEXT:    vcvtdq2pd %ymm0, %zmm0 # sched: [7:1.00]
 ; SKX-NEXT:    retq # sched: [7:1.00]
   %cmpres = fcmp ogt <8 x double> %a, zeroinitializer
   %1 = sitofp <8 x i1> %cmpres to <8 x double>
   ret <8 x double> %1
 }
 
 define <8 x float> @sbto8f32(<8 x float> %a) {
 ; GENERIC-LABEL: sbto8f32:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    vxorps %xmm1, %xmm1, %xmm1 # sched: [1:1.00]
+; GENERIC-NEXT:    vxorps %xmm1, %xmm1, %xmm1 # sched: [0:0.25]
 ; GENERIC-NEXT:    vcmpltps %ymm0, %ymm1, %ymm0 # sched: [3:1.00]
 ; GENERIC-NEXT:    vcvtdq2ps %ymm0, %ymm0 # sched: [3:1.00]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: sbto8f32:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    vxorps %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
 ; SKX-NEXT:    vcmpltps %ymm0, %ymm1, %ymm0 # sched: [4:0.50]
 ; SKX-NEXT:    vcvtdq2ps %ymm0, %ymm0 # sched: [4:0.50]
 ; SKX-NEXT:    retq # sched: [7:1.00]
   %cmpres = fcmp ogt <8 x float> %a, zeroinitializer
   %1 = sitofp <8 x i1> %cmpres to <8 x float>
   ret <8 x float> %1
 }
 
 define <4 x float> @sbto4f32(<4 x float> %a) {
 ; GENERIC-LABEL: sbto4f32:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    vxorps %xmm1, %xmm1, %xmm1 # sched: [1:1.00]
+; GENERIC-NEXT:    vxorps %xmm1, %xmm1, %xmm1 # sched: [0:0.25]
 ; GENERIC-NEXT:    vcmpltps %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
 ; GENERIC-NEXT:    vcvtdq2ps %xmm0, %xmm0 # sched: [3:1.00]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: sbto4f32:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    vxorps %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
 ; SKX-NEXT:    vcmpltps %xmm0, %xmm1, %xmm0 # sched: [4:0.50]
 ; SKX-NEXT:    vcvtdq2ps %xmm0, %xmm0 # sched: [4:0.50]
 ; SKX-NEXT:    retq # sched: [7:1.00]
   %cmpres = fcmp ogt <4 x float> %a, zeroinitializer
   %1 = sitofp <4 x i1> %cmpres to <4 x float>
   ret <4 x float> %1
 }
 
 define <4 x double> @sbto4f64(<4 x double> %a) {
 ; GENERIC-LABEL: sbto4f64:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    vxorpd %xmm1, %xmm1, %xmm1 # sched: [1:1.00]
+; GENERIC-NEXT:    vxorpd %xmm1, %xmm1, %xmm1 # sched: [0:0.25]
 ; GENERIC-NEXT:    vcmpltpd %ymm0, %ymm1, %k0 # sched: [3:1.00]
 ; GENERIC-NEXT:    vpmovm2d %k0, %xmm0 # sched: [1:0.33]
 ; GENERIC-NEXT:    vcvtdq2pd %xmm0, %ymm0 # sched: [4:1.00]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: sbto4f64:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    vxorpd %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
 ; SKX-NEXT:    vcmpltpd %ymm0, %ymm1, %k0 # sched: [3:1.00]
 ; SKX-NEXT:    vpmovm2d %k0, %xmm0 # sched: [1:0.25]
 ; SKX-NEXT:    vcvtdq2pd %xmm0, %ymm0 # sched: [7:1.00]
 ; SKX-NEXT:    retq # sched: [7:1.00]
   %cmpres = fcmp ogt <4 x double> %a, zeroinitializer
   %1 = sitofp <4 x i1> %cmpres to <4 x double>
   ret <4 x double> %1
 }
 
 define <2 x float> @sbto2f32(<2 x float> %a) {
 ; GENERIC-LABEL: sbto2f32:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    vxorps %xmm1, %xmm1, %xmm1 # sched: [1:1.00]
+; GENERIC-NEXT:    vxorps %xmm1, %xmm1, %xmm1 # sched: [0:0.25]
 ; GENERIC-NEXT:    vcmpltps %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
 ; GENERIC-NEXT:    vcvtdq2ps %xmm0, %xmm0 # sched: [3:1.00]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: sbto2f32:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    vxorps %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
 ; SKX-NEXT:    vcmpltps %xmm0, %xmm1, %xmm0 # sched: [4:0.50]
 ; SKX-NEXT:    vcvtdq2ps %xmm0, %xmm0 # sched: [4:0.50]
 ; SKX-NEXT:    retq # sched: [7:1.00]
   %cmpres = fcmp ogt <2 x float> %a, zeroinitializer
   %1 = sitofp <2 x i1> %cmpres to <2 x float>
   ret <2 x float> %1
 }
 
 define <2 x double> @sbto2f64(<2 x double> %a) {
 ; GENERIC-LABEL: sbto2f64:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    vxorpd %xmm1, %xmm1, %xmm1 # sched: [1:1.00]
+; GENERIC-NEXT:    vxorpd %xmm1, %xmm1, %xmm1 # sched: [0:0.25]
 ; GENERIC-NEXT:    vcmpltpd %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
 ; GENERIC-NEXT:    vpermilps {{.*#+}} xmm0 = xmm0[0,2,2,3] sched: [1:1.00]
 ; GENERIC-NEXT:    vcvtdq2pd %xmm0, %xmm0 # sched: [4:1.00]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: sbto2f64:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    vxorpd %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
; SKX-NEXT:    retq # sched: [7:1.00]
   %mask = icmp slt <16 x i32> %a, zeroinitializer
   %1 = uitofp <16 x i1> %mask to <16 x double>
   ret <16 x double> %1
 }
 
 define <8 x float> @ubto8f32(<8 x i32> %a) {
 ; GENERIC-LABEL: ubto8f32:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    vpxor %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
+; GENERIC-NEXT:    vpxor %xmm1, %xmm1, %xmm1 # sched: [0:0.25]
 ; GENERIC-NEXT:    vpcmpgtd %ymm0, %ymm1, %ymm0 # sched: [1:0.50]
 ; GENERIC-NEXT:    vpandd {{.*}}(%rip){1to8}, %ymm0, %ymm0 # sched: [8:0.50]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: ubto8f32:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    vpxor %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
 ; SKX-NEXT:    vpcmpgtd %ymm0, %ymm1, %ymm0 # sched: [1:0.50]
 ; SKX-NEXT:    vpandd {{.*}}(%rip){1to8}, %ymm0, %ymm0 # sched: [8:0.50]
 ; SKX-NEXT:    retq # sched: [7:1.00]
   %mask = icmp slt <8 x i32> %a, zeroinitializer
   %1 = uitofp <8 x i1> %mask to <8 x float>
   ret <8 x float> %1
 }
 
 define <8 x double> @ubto8f64(<8 x i32> %a) {
 ; GENERIC-LABEL: ubto8f64:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    vpxor %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
+; GENERIC-NEXT:    vpxor %xmm1, %xmm1, %xmm1 # sched: [0:0.25]
 ; GENERIC-NEXT:    vpcmpgtd %ymm0, %ymm1, %ymm0 # sched: [1:0.50]
 ; GENERIC-NEXT:    vpsrld $31, %ymm0, %ymm0 # sched: [1:1.00]
 ; GENERIC-NEXT:    vcvtdq2pd %ymm0, %zmm0 # sched: [4:1.00]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: ubto8f64:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    vpxor %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
 ; SKX-NEXT:    vpcmpgtd %ymm0, %ymm1, %ymm0 # sched: [1:0.50]
 ; SKX-NEXT:    vpsrld $31, %ymm0, %ymm0 # sched: [1:0.50]
 ; SKX-NEXT:    vcvtdq2pd %ymm0, %zmm0 # sched: [7:1.00]
 ; SKX-NEXT:    retq # sched: [7:1.00]
   %mask = icmp slt <8 x i32> %a, zeroinitializer
   %1 = uitofp <8 x i1> %mask to <8 x double>
   ret <8 x double> %1
 }
 
 define <4 x float> @ubto4f32(<4 x i32> %a) {
 ; GENERIC-LABEL: ubto4f32:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    vpxor %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
+; GENERIC-NEXT:    vpxor %xmm1, %xmm1, %xmm1 # sched: [0:0.25]
 ; GENERIC-NEXT:    vpcmpgtd %xmm0, %xmm1, %xmm0 # sched: [1:0.50]
 ; GENERIC-NEXT:    vpandd {{.*}}(%rip){1to4}, %xmm0, %xmm0 # sched: [7:0.50]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: ubto4f32:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    vpxor %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
 ; SKX-NEXT:    vpcmpgtd %xmm0, %xmm1, %xmm0 # sched: [1:0.50]
 ; SKX-NEXT:    vpandd {{.*}}(%rip){1to4}, %xmm0, %xmm0 # sched: [7:0.50]
 ; SKX-NEXT:    retq # sched: [7:1.00]
   %mask = icmp slt <4 x i32> %a, zeroinitializer
   %1 = uitofp <4 x i1> %mask to <4 x float>
   ret <4 x float> %1
 }
 
 define <4 x double> @ubto4f64(<4 x i32> %a) {
 ; GENERIC-LABEL: ubto4f64:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    vpxor %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
+; GENERIC-NEXT:    vpxor %xmm1, %xmm1, %xmm1 # sched: [0:0.25]
 ; GENERIC-NEXT:    vpcmpgtd %xmm0, %xmm1, %xmm0 # sched: [1:0.50]
 ; GENERIC-NEXT:    vpsrld $31, %xmm0, %xmm0 # sched: [1:1.00]
 ; GENERIC-NEXT:    vcvtdq2pd %xmm0, %ymm0 # sched: [4:1.00]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: ubto4f64:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    vpxor %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
 ; SKX-NEXT:    vpcmpgtd %xmm0, %xmm1, %xmm0 # sched: [1:0.50]
 ; SKX-NEXT:    vpsrld $31, %xmm0, %xmm0 # sched: [1:0.50]
 ; SKX-NEXT:    vcvtdq2pd %xmm0, %ymm0 # sched: [7:1.00]
 ; SKX-NEXT:    retq # sched: [7:1.00]
   %mask = icmp slt <4 x i32> %a, zeroinitializer
   %1 = uitofp <4 x i1> %mask to <4 x double>
   ret <4 x double> %1
 }
 
 define <2 x float> @ubto2f32(<2 x i32> %a) {
 ; GENERIC-LABEL: ubto2f32:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    vpxor %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
+; GENERIC-NEXT:    vpxor %xmm1, %xmm1, %xmm1 # sched: [0:0.25]
 ; GENERIC-NEXT:    vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] sched: [1:0.50]
 ; GENERIC-NEXT:    vpcmpeqq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
 ; GENERIC-NEXT:    vpandn {{.*}}(%rip), %xmm0, %xmm0 # sched: [7:0.50]
 ; GENERIC-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] sched: [1:0.50]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: ubto2f32:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    vpxor %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
 ; SKX-NEXT:    vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] sched: [1:0.33]
 ; SKX-NEXT:    vpcmpeqq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
 ; SKX-NEXT:    vpandn {{.*}}(%rip), %xmm0, %xmm0 # sched: [7:0.50]
 ; SKX-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] sched: [1:1.00]
 ; SKX-NEXT:    retq # sched: [7:1.00]
   %mask = icmp ne <2 x i32> %a, zeroinitializer
   %1 = uitofp <2 x i1> %mask to <2 x float>
   ret <2 x float> %1
 }
 
 define <2 x double> @ubto2f64(<2 x i32> %a) {
 ; GENERIC-LABEL: ubto2f64:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    vpxor %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
+; GENERIC-NEXT:    vpxor %xmm1, %xmm1, %xmm1 # sched: [0:0.25]
 ; GENERIC-NEXT:    vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] sched: [1:0.50]
 ; GENERIC-NEXT:    vpcmpeqq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
 ; GENERIC-NEXT:    vpandn {{.*}}(%rip), %xmm0, %xmm0 # sched: [7:0.50]
 ; GENERIC-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] sched: [1:0.50]
 ; GENERIC-NEXT:    vcvtdq2pd %xmm0, %xmm0 # sched: [4:1.00]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: ubto2f64:
; SKX-NEXT:    retq # sched: [7:1.00]
   %r = load <8 x i64>, <8 x i64>* %vaddr, align 1
   %res = select <8 x i1> %mask, <8 x i64> %r, <8 x i64> zeroinitializer
   ret <8 x i64>%res
 }
 
 define <16 x float> @mov_test40(i8 * %addr, <16 x float> %old, <16 x float> %mask1) {
 ; GENERIC-LABEL: mov_test40:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    vxorps %xmm2, %xmm2, %xmm2 # sched: [1:1.00]
+; GENERIC-NEXT:    vxorps %xmm2, %xmm2, %xmm2 # sched: [0:0.25]
 ; GENERIC-NEXT:    vcmpneq_oqps %zmm2, %zmm1, %k1 # sched: [3:1.00]
 ; GENERIC-NEXT:    vmovaps (%rdi), %zmm0 {%k1} # sched: [7:0.50]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: mov_test40:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    vxorps %xmm2, %xmm2, %xmm2 # sched: [1:0.33]
 ; SKX-NEXT:    vcmpneq_oqps %zmm2, %zmm1, %k1 # sched: [3:1.00]
 ; SKX-NEXT:    vmovaps (%rdi), %zmm0 {%k1} # sched: [8:0.50]
 ; SKX-NEXT:    retq # sched: [7:1.00]
   %mask = fcmp one <16 x float> %mask1, zeroinitializer
   %vaddr = bitcast i8* %addr to <16 x float>*
   %r = load <16 x float>, <16 x float>* %vaddr, align 64
   %res = select <16 x i1> %mask, <16 x float> %r, <16 x float> %old
   ret <16 x float>%res
 }
 
 define <16 x float> @mov_test41(i8 * %addr, <16 x float> %old, <16 x float> %mask1) {
 ; GENERIC-LABEL: mov_test41:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    vxorps %xmm2, %xmm2, %xmm2 # sched: [1:1.00]
+; GENERIC-NEXT:    vxorps %xmm2, %xmm2, %xmm2 # sched: [0:0.25]
 ; GENERIC-NEXT:    vcmpneq_oqps %zmm2, %zmm1, %k1 # sched: [3:1.00]
 ; GENERIC-NEXT:    vmovups (%rdi), %zmm0 {%k1} # sched: [7:0.50]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: mov_test41:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    vxorps %xmm2, %xmm2, %xmm2 # sched: [1:0.33]
 ; SKX-NEXT:    vcmpneq_oqps %zmm2, %zmm1, %k1 # sched: [3:1.00]
 ; SKX-NEXT:    vmovups (%rdi), %zmm0 {%k1} # sched: [8:0.50]
 ; SKX-NEXT:    retq # sched: [7:1.00]
   %mask = fcmp one <16 x float> %mask1, zeroinitializer
   %vaddr = bitcast i8* %addr to <16 x float>*
   %r = load <16 x float>, <16 x float>* %vaddr, align 1
   %res = select <16 x i1> %mask, <16 x float> %r, <16 x float> %old
   ret <16 x float>%res
 }
 
 define <16 x float> @mov_test42(i8 * %addr, <16 x float> %mask1) {
 ; GENERIC-LABEL: mov_test42:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    vxorps %xmm1, %xmm1, %xmm1 # sched: [1:1.00]
+; GENERIC-NEXT:    vxorps %xmm1, %xmm1, %xmm1 # sched: [0:0.25]
 ; GENERIC-NEXT:    vcmpneq_oqps %zmm1, %zmm0, %k1 # sched: [3:1.00]
 ; GENERIC-NEXT:    vmovaps (%rdi), %zmm0 {%k1} {z} # sched: [7:0.50]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: mov_test42:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    vxorps %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
 ; SKX-NEXT:    vcmpneq_oqps %zmm1, %zmm0, %k1 # sched: [3:1.00]
 ; SKX-NEXT:    vmovaps (%rdi), %zmm0 {%k1} {z} # sched: [8:0.50]
 ; SKX-NEXT:    retq # sched: [7:1.00]
   %mask = fcmp one <16 x float> %mask1, zeroinitializer
   %vaddr = bitcast i8* %addr to <16 x float>*
   %r = load <16 x float>, <16 x float>* %vaddr, align 64
   %res = select <16 x i1> %mask, <16 x float> %r, <16 x float> zeroinitializer
   ret <16 x float>%res
 }
 
 define <16 x float> @mov_test43(i8 * %addr, <16 x float> %mask1) {
 ; GENERIC-LABEL: mov_test43:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    vxorps %xmm1, %xmm1, %xmm1 # sched: [1:1.00]
+; GENERIC-NEXT:    vxorps %xmm1, %xmm1, %xmm1 # sched: [0:0.25]
 ; GENERIC-NEXT:    vcmpneq_oqps %zmm1, %zmm0, %k1 # sched: [3:1.00]
 ; GENERIC-NEXT:    vmovups (%rdi), %zmm0 {%k1} {z} # sched: [7:0.50]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: mov_test43:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    vxorps %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
 ; SKX-NEXT:    vcmpneq_oqps %zmm1, %zmm0, %k1 # sched: [3:1.00]
 ; SKX-NEXT:    vmovups (%rdi), %zmm0 {%k1} {z} # sched: [8:0.50]
 ; SKX-NEXT:    retq # sched: [7:1.00]
   %mask = fcmp one <16 x float> %mask1, zeroinitializer
   %vaddr = bitcast i8* %addr to <16 x float>*
   %r = load <16 x float>, <16 x float>* %vaddr, align 1
   %res = select <16 x i1> %mask, <16 x float> %r, <16 x float> zeroinitializer
   ret <16 x float>%res
 }
 
 define <8 x double> @mov_test44(i8 * %addr, <8 x double> %old, <8 x double> %mask1) {
 ; GENERIC-LABEL: mov_test44:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    vxorpd %xmm2, %xmm2, %xmm2 # sched: [1:1.00]
+; GENERIC-NEXT:    vxorpd %xmm2, %xmm2, %xmm2 # sched: [0:0.25]
 ; GENERIC-NEXT:    vcmpneq_oqpd %zmm2, %zmm1, %k1 # sched: [3:1.00]
 ; GENERIC-NEXT:    vmovapd (%rdi), %zmm0 {%k1} # sched: [7:0.50]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: mov_test44:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    vxorpd %xmm2, %xmm2, %xmm2 # sched: [1:0.33]
 ; SKX-NEXT:    vcmpneq_oqpd %zmm2, %zmm1, %k1 # sched: [3:1.00]
 ; SKX-NEXT:    vmovapd (%rdi), %zmm0 {%k1} # sched: [8:0.50]
 ; SKX-NEXT:    retq # sched: [7:1.00]
   %mask = fcmp one <8 x double> %mask1, zeroinitializer
   %vaddr = bitcast i8* %addr to <8 x double>*
   %r = load <8 x double>, <8 x double>* %vaddr, align 64
   %res = select <8 x i1> %mask, <8 x double> %r, <8 x double> %old
   ret <8 x double>%res
 }
 
 define <8 x double> @mov_test45(i8 * %addr, <8 x double> %old, <8 x double> %mask1) {
 ; GENERIC-LABEL: mov_test45:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    vxorpd %xmm2, %xmm2, %xmm2 # sched: [1:1.00]
+; GENERIC-NEXT:    vxorpd %xmm2, %xmm2, %xmm2 # sched: [0:0.25]
 ; GENERIC-NEXT:    vcmpneq_oqpd %zmm2, %zmm1, %k1 # sched: [3:1.00]
 ; GENERIC-NEXT:    vmovupd (%rdi), %zmm0 {%k1} # sched: [7:0.50]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: mov_test45:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    vxorpd %xmm2, %xmm2, %xmm2 # sched: [1:0.33]
 ; SKX-NEXT:    vcmpneq_oqpd %zmm2, %zmm1, %k1 # sched: [3:1.00]
 ; SKX-NEXT:    vmovupd (%rdi), %zmm0 {%k1} # sched: [8:0.50]
 ; SKX-NEXT:    retq # sched: [7:1.00]
   %mask = fcmp one <8 x double> %mask1, zeroinitializer
   %vaddr = bitcast i8* %addr to <8 x double>*
   %r = load <8 x double>, <8 x double>* %vaddr, align 1
   %res = select <8 x i1> %mask, <8 x double> %r, <8 x double> %old
   ret <8 x double>%res
 }
 
 define <8 x double> @mov_test46(i8 * %addr, <8 x double> %mask1) {
 ; GENERIC-LABEL: mov_test46:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    vxorpd %xmm1, %xmm1, %xmm1 # sched: [1:1.00]
+; GENERIC-NEXT:    vxorpd %xmm1, %xmm1, %xmm1 # sched: [0:0.25]
 ; GENERIC-NEXT:    vcmpneq_oqpd %zmm1, %zmm0, %k1 # sched: [3:1.00]
 ; GENERIC-NEXT:    vmovapd (%rdi), %zmm0 {%k1} {z} # sched: [7:0.50]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: mov_test46:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    vxorpd %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
 ; SKX-NEXT:    vcmpneq_oqpd %zmm1, %zmm0, %k1 # sched: [3:1.00]
 ; SKX-NEXT:    vmovapd (%rdi), %zmm0 {%k1} {z} # sched: [8:0.50]
 ; SKX-NEXT:    retq # sched: [7:1.00]
   %mask = fcmp one <8 x double> %mask1, zeroinitializer
   %vaddr = bitcast i8* %addr to <8 x double>*
   %r = load <8 x double>, <8 x double>* %vaddr, align 64
   %res = select <8 x i1> %mask, <8 x double> %r, <8 x double> zeroinitializer
   ret <8 x double>%res
 }
 
 define <8 x double> @mov_test47(i8 * %addr, <8 x double> %mask1) {
 ; GENERIC-LABEL: mov_test47:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    vxorpd %xmm1, %xmm1, %xmm1 # sched: [1:1.00]
+; GENERIC-NEXT:    vxorpd %xmm1, %xmm1, %xmm1 # sched: [0:0.25]
 ; GENERIC-NEXT:    vcmpneq_oqpd %zmm1, %zmm0, %k1 # sched: [3:1.00]
 ; GENERIC-NEXT:    vmovupd (%rdi), %zmm0 {%k1} {z} # sched: [7:0.50]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: mov_test47:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    vxorpd %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
 ; SKX-NEXT:    vcmpneq_oqpd %zmm1, %zmm0, %k1 # sched: [3:1.00]

 ; GENERIC-NEXT:    cmpl %esi, %edi # sched: [1:0.33]
 ; GENERIC-NEXT:    jg .LBB386_1 # sched: [1:1.00]
 ; GENERIC-NEXT:  # %bb.2:
 ; GENERIC-NEXT:    kxorw %k0, %k0, %k0 # sched: [1:0.33]
 ; GENERIC-NEXT:    vpmovm2b %k0, %xmm0 # sched: [1:0.33]
 ; GENERIC-NEXT:    vzeroupper # sched: [100:0.33]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ; GENERIC-NEXT:  .LBB386_1:
-; GENERIC-NEXT:    vpxor %xmm1, %xmm1, %xmm1 # sched: [1:0.33]
+; GENERIC-NEXT:    vpxor %xmm1, %xmm1, %xmm1 # sched: [0:0.25]
 ; GENERIC-NEXT:    vpcmpgtd %zmm1, %zmm0, %k0 # sched: [1:0.50]
 ; GENERIC-NEXT:    vpmovm2b %k0, %xmm0 # sched: [1:0.33]
 ; GENERIC-NEXT:    vzeroupper # sched: [100:0.33]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: vcmp_test8:
 ; SKX:       # %bb.0:
 ; SKX-NEXT:    cmpl %esi, %edi # sched: [1:0.25]

 ; SKX-NEXT:    retq # sched: [7:1.00]
   %b = shufflevector <16 x float> %a, <16 x float> undef, <16 x i32> zeroinitializer
   ret <16 x float> %b
 }
 
 define <16 x i32> @test_vbroadcast() {
 ; GENERIC-LABEL: test_vbroadcast:
 ; GENERIC:       # %bb.0: # %entry
-; GENERIC-NEXT:    vxorps %xmm0, %xmm0, %xmm0 # sched: [1:1.00]
+; GENERIC-NEXT:    vxorps %xmm0, %xmm0, %xmm0 # sched: [0:0.25]
 ; GENERIC-NEXT:    vcmpunordps %zmm0, %zmm0, %k0 # sched: [3:1.00]
 ; GENERIC-NEXT:    vpmovm2d %k0, %zmm0 # sched: [1:0.33]
 ; GENERIC-NEXT:    knotw %k0, %k1 # sched: [1:0.33]
 ; GENERIC-NEXT:    vmovdqa32 %zmm0, %zmm0 {%k1} {z} # sched: [1:0.50]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; SKX-LABEL: test_vbroadcast:
 ; SKX:       # %bb.0: # %entry

test/CodeGen/X86/sse-schedule.ll

 ; 'WriteZero' and 'WriteNop' class instructions.
 
 define <4 x float> @test_fnop() nounwind {
 ; GENERIC-LABEL: test_fnop:
 ; GENERIC:       # %bb.0:
 ; GENERIC-NEXT:    #APP
 ; GENERIC-NEXT:    nop # sched: [1:0.25]
 ; GENERIC-NEXT:    #NO_APP
-; GENERIC-NEXT:    xorps %xmm0, %xmm0 # sched: [1:1.00]
+; GENERIC-NEXT:    xorps %xmm0, %xmm0 # sched: [0:0.25]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; ATOM-LABEL: test_fnop:
 ; ATOM:       # %bb.0:
 ; ATOM-NEXT:    xorps %xmm0, %xmm0 # sched: [1:0.50]
 ; ATOM-NEXT:    #APP
 ; ATOM-NEXT:    nop # sched: [1:0.50]
 ; ATOM-NEXT:    #NO_APP

 ; SLM-NEXT:    #NO_APP
 ; SLM-NEXT:    retq # sched: [4:1.00]
 ;
 ; SANDY-SSE-LABEL: test_fnop:
 ; SANDY-SSE:       # %bb.0:
 ; SANDY-SSE-NEXT:    #APP
 ; SANDY-SSE-NEXT:    nop # sched: [1:0.25]
 ; SANDY-SSE-NEXT:    #NO_APP
-; SANDY-SSE-NEXT:    xorps %xmm0, %xmm0 # sched: [1:1.00]
+; SANDY-SSE-NEXT:    xorps %xmm0, %xmm0 # sched: [0:0.25]
 ; SANDY-SSE-NEXT:    retq # sched: [1:1.00]
 ;
 ; SANDY-LABEL: test_fnop:
 ; SANDY:       # %bb.0:
 ; SANDY-NEXT:    #APP
 ; SANDY-NEXT:    nop # sched: [1:0.25]
 ; SANDY-NEXT:    #NO_APP
-; SANDY-NEXT:    vxorps %xmm0, %xmm0, %xmm0 # sched: [1:1.00]
+; SANDY-NEXT:    vxorps %xmm0, %xmm0, %xmm0 # sched: [0:0.25]
 ; SANDY-NEXT:    retq # sched: [1:1.00]
 ;
 ; HASWELL-SSE-LABEL: test_fnop:
 ; HASWELL-SSE:       # %bb.0:
 ; HASWELL-SSE-NEXT:    #APP
 ; HASWELL-SSE-NEXT:    nop # sched: [1:0.25]
 ; HASWELL-SSE-NEXT:    #NO_APP
 ; HASWELL-SSE-NEXT:    xorps %xmm0, %xmm0 # sched: [1:1.00]

test/tools/llvm-mca/X86/SandyBridge/zero-idioms.s

+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -timeline -register-file-stats -iterations=1 < %s | FileCheck %s
+
+subl  %eax, %eax
+subq  %rax, %rax
+xorl  %eax, %eax
+xorq  %rax, %rax
+
+pcmpgtb   %mm2, %mm2
+pcmpgtd   %mm2, %mm2
+# pcmpgtq   %mm2, %mm2 # invalid operand for instruction
+pcmpgtw   %mm2, %mm2
+
+pcmpgtb   %xmm2, %xmm2
+pcmpgtd   %xmm2, %xmm2
+pcmpgtq   %xmm2, %xmm2
+pcmpgtw   %xmm2, %xmm2
+
+vpcmpgtb  %xmm3, %xmm3, %xmm3
+vpcmpgtd  %xmm3, %xmm3, %xmm3
+vpcmpgtq  %xmm3, %xmm3, %xmm3
+vpcmpgtw  %xmm3, %xmm3, %xmm3
+
+vpcmpgtb  %xmm3, %xmm3, %xmm5
+vpcmpgtd  %xmm3, %xmm3, %xmm5
+vpcmpgtq  %xmm3, %xmm3, %xmm5
+vpcmpgtw  %xmm3, %xmm3, %xmm5
+
+psubb   %mm2, %mm2
+psubd   %mm2, %mm2
+psubq   %mm2, %mm2
+psubw   %mm2, %mm2
+psubb   %xmm2, %xmm2
+psubd   %xmm2, %xmm2
+psubq   %xmm2, %xmm2
+psubw   %xmm2, %xmm2
+vpsubb  %xmm3, %xmm3, %xmm3
+vpsubd  %xmm3, %xmm3, %xmm3
+vpsubq  %xmm3, %xmm3, %xmm3
+vpsubw  %xmm3, %xmm3, %xmm3
+
+vpsubb  %xmm3, %xmm3, %xmm5
+vpsubd  %xmm3, %xmm3, %xmm5
+vpsubq  %xmm3, %xmm3, %xmm5
+vpsubw  %xmm3, %xmm3, %xmm5
+
+andnps  %xmm0, %xmm0
+andnpd  %xmm1, %xmm1
+vandnps %xmm2, %xmm2, %xmm2
+vandnpd %xmm1, %xmm1, %xmm1
+pandn   %mm2, %mm2
+pandn   %xmm2, %xmm2
+vpandn  %xmm3, %xmm3, %xmm3
+
+vandnps %xmm2, %xmm2, %xmm5
+vandnpd %xmm1, %xmm1, %xmm5
+vpandn  %xmm3, %xmm3, %xmm5
+
+xorps  %xmm0, %xmm0
+xorpd  %xmm1, %xmm1
+vxorps %xmm2, %xmm2, %xmm2
+vxorpd %xmm1, %xmm1, %xmm1
+pxor   %mm2, %mm2
+pxor   %xmm2, %xmm2
+vpxor  %xmm3, %xmm3, %xmm3
+
+vxorps %xmm4, %xmm4, %xmm5
+vxorpd %xmm1, %xmm1, %xmm3
+vpxor  %xmm3, %xmm3, %xmm5
+
+# CHECK:      Iterations:        1
+# CHECK-NEXT: Instructions:      55
+# CHECK-NEXT: Total Cycles:      27
+# CHECK-NEXT: Total uOps:        55
+
+# CHECK:      Dispatch Width:    4
+# CHECK-NEXT: uOps Per Cycle:    2.04
+# CHECK-NEXT: IPC:               2.04
+# CHECK-NEXT: Block RThroughput: 13.8
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  1      0     0.25                        subl  %eax, %eax
+# CHECK-NEXT:  1      0     0.25                        subq  %rax, %rax
+# CHECK-NEXT:  1      0     0.25                        xorl  %eax, %eax
+# CHECK-NEXT:  1      0     0.25                        xorq  %rax, %rax
+# CHECK-NEXT:  1      3     1.00                        pcmpgtb %mm2, %mm2
+# CHECK-NEXT:  1      3     1.00                        pcmpgtd %mm2, %mm2
+# CHECK-NEXT:  1      3     1.00                        pcmpgtw %mm2, %mm2
+# CHECK-NEXT:  1      0     0.25                        pcmpgtb %xmm2, %xmm2
+# CHECK-NEXT:  1      0     0.25                        pcmpgtd %xmm2, %xmm2
+# CHECK-NEXT:  1      0     0.25                        pcmpgtq %xmm2, %xmm2
+# CHECK-NEXT:  1      0     0.25                        pcmpgtw %xmm2, %xmm2
+# CHECK-NEXT:  1      0     0.25                        vpcmpgtb  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT:  1      0     0.25                        vpcmpgtd  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT:  1      0     0.25                        vpcmpgtq  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT:  1      0     0.25                        vpcmpgtw  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT:  1      0     0.25                        vpcmpgtb  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT:  1      0     0.25                        vpcmpgtd  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT:  1      0     0.25                        vpcmpgtq  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT:  1      0     0.25                        vpcmpgtw  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT:  1      3     1.00                        psubb %mm2, %mm2
+# CHECK-NEXT:  1      3     1.00                        psubd %mm2, %mm2
+# CHECK-NEXT:  1      3     1.00                        psubq %mm2, %mm2
+# CHECK-NEXT:  1      3     1.00                        psubw %mm2, %mm2
+# CHECK-NEXT:  1      0     0.25                        psubb %xmm2, %xmm2
+# CHECK-NEXT:  1      0     0.25                        psubd %xmm2, %xmm2
+# CHECK-NEXT:  1      0     0.25                        psubq %xmm2, %xmm2
+# CHECK-NEXT:  1      0     0.25                        psubw %xmm2, %xmm2
+# CHECK-NEXT:  1      0     0.25                        vpsubb  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT:  1      0     0.25                        vpsubd  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT:  1      0     0.25                        vpsubq  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT:  1      0     0.25                        vpsubw  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT:  1      0     0.25                        vpsubb  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT:  1      0     0.25                        vpsubd  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT:  1      0     0.25                        vpsubq  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT:  1      0     0.25                        vpsubw  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT:  1      1     1.00                        andnps  %xmm0, %xmm0
+# CHECK-NEXT:  1      1     1.00                        andnpd  %xmm1, %xmm1
+# CHECK-NEXT:  1      1     1.00                        vandnps %xmm2, %xmm2, %xmm2
+# CHECK-NEXT:  1      1     1.00                        vandnpd %xmm1, %xmm1, %xmm1
+# CHECK-NEXT:  1      1     0.33                        pandn %mm2, %mm2
+# CHECK-NEXT:  1      1     0.33                        pandn %xmm2, %xmm2
+# CHECK-NEXT:  1      1     0.33                        vpandn  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT:  1      1     1.00                        vandnps %xmm2, %xmm2, %xmm5
+# CHECK-NEXT:  1      1     1.00                        vandnpd %xmm1, %xmm1, %xmm5
+# CHECK-NEXT:  1      1     0.33                        vpandn  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT:  1      0     0.25                        xorps %xmm0, %xmm0
+# CHECK-NEXT:  1      0     0.25                        xorpd %xmm1, %xmm1
+# CHECK-NEXT:  1      0     0.25                        vxorps  %xmm2, %xmm2, %xmm2
+# CHECK-NEXT:  1      0     0.25                        vxorpd  %xmm1, %xmm1, %xmm1
+# CHECK-NEXT:  1      1     0.33                        pxor  %mm2, %mm2
+# CHECK-NEXT:  1      0     0.25                        pxor  %xmm2, %xmm2
+# CHECK-NEXT:  1      0     0.25                        vpxor %xmm3, %xmm3, %xmm3
+# CHECK-NEXT:  1      0     0.25                        vxorps  %xmm4, %xmm4, %xmm5
+# CHECK-NEXT:  1      0     0.25                        vxorpd  %xmm1, %xmm1, %xmm3
+# CHECK-NEXT:  1      0     0.25                        vpxor %xmm3, %xmm3, %xmm5
+
+# CHECK:      Register File statistics:
+# CHECK-NEXT: Total number of mappings created:    59
+# CHECK-NEXT: Max number of mappings used:         42
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - SBDivider
+# CHECK-NEXT: [1]   - SBFPDivider
+# CHECK-NEXT: [2]   - SBPort0
+# CHECK-NEXT: [3]   - SBPort1
+# CHECK-NEXT: [4]   - SBPort4
+# CHECK-NEXT: [5]   - SBPort5
+# CHECK-NEXT: [6.0] - SBPort23
+# CHECK-NEXT: [6.1] - SBPort23
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]
+# CHECK-NEXT:  -      -     4.00   8.00    -     6.00    -      -
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  Instructions:
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     subl  %eax, %eax
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     subq  %rax, %rax
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     xorl  %eax, %eax
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     xorq  %rax, %rax
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pcmpgtb %mm2, %mm2
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pcmpgtd %mm2, %mm2
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pcmpgtw %mm2, %mm2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     pcmpgtb %xmm2, %xmm2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     pcmpgtd %xmm2, %xmm2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     pcmpgtq %xmm2, %xmm2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     pcmpgtw %xmm2, %xmm2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vpcmpgtb  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vpcmpgtd  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vpcmpgtq  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vpcmpgtw  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vpcmpgtb  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vpcmpgtd  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vpcmpgtq  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vpcmpgtw  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     psubb %mm2, %mm2
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     psubd %mm2, %mm2
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     psubq %mm2, %mm2
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     psubw %mm2, %mm2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     psubb %xmm2, %xmm2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     psubd %xmm2, %xmm2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     psubq %xmm2, %xmm2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     psubw %xmm2, %xmm2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vpsubb  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vpsubd  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vpsubq  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vpsubw  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vpsubb  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vpsubd  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vpsubq  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vpsubw  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     andnps  %xmm0, %xmm0
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     andnpd  %xmm1, %xmm1
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     vandnps %xmm2, %xmm2, %xmm2
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     vandnpd %xmm1, %xmm1, %xmm1
+# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     pandn %mm2, %mm2
+# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     pandn %xmm2, %xmm2
+# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vpandn  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     vandnps %xmm2, %xmm2, %xmm5
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     vandnpd %xmm1, %xmm1, %xmm5
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     vpandn  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     xorps %xmm0, %xmm0
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     xorpd %xmm1, %xmm1
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vxorps  %xmm2, %xmm2, %xmm2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vxorpd  %xmm1, %xmm1, %xmm1
+# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     pxor  %mm2, %mm2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     pxor  %xmm2, %xmm2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vpxor %xmm3, %xmm3, %xmm3
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vxorps  %xmm4, %xmm4, %xmm5
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vxorpd  %xmm1, %xmm1, %xmm3
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     vpxor %xmm3, %xmm3, %xmm5
+
+# CHECK:      Timeline view:
+# CHECK-NEXT:                     0123456789
+# CHECK-NEXT: Index     0123456789          0123456
+
+# CHECK:      [0,0]     DR   .    .    .    .    ..   subl  %eax, %eax
+# CHECK-NEXT: [0,1]     DR   .    .    .    .    ..   subq  %rax, %rax
+# CHECK-NEXT: [0,2]     DR   .    .    .    .    ..   xorl  %eax, %eax
+# CHECK-NEXT: [0,3]     DR   .    .    .    .    ..   xorq  %rax, %rax
+# CHECK-NEXT: [0,4]     .DeeeER   .    .    .    ..   pcmpgtb %mm2, %mm2
+# CHECK-NEXT: [0,5]     .D===eeeER.    .    .    ..   pcmpgtd %mm2, %mm2
+# CHECK-NEXT: [0,6]     .D======eeeER  .    .    ..   pcmpgtw %mm2, %mm2
+# CHECK-NEXT: [0,7]     .D----------R  .    .    ..   pcmpgtb %xmm2, %xmm2
+# CHECK-NEXT: [0,8]     . D---------R  .    .    ..   pcmpgtd %xmm2, %xmm2
+# CHECK-NEXT: [0,9]     . D---------R  .    .    ..   pcmpgtq %xmm2, %xmm2
+# CHECK-NEXT: [0,10]    . D---------R  .    .    ..   pcmpgtw %xmm2, %xmm2
+# CHECK-NEXT: [0,11]    . D---------R  .    .    ..   vpcmpgtb  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT: [0,12]    .  D--------R  .    .    ..   vpcmpgtd  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT: [0,13]    .  D--------R  .    .    ..   vpcmpgtq  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT: [0,14]    .  D--------R  .    .    ..   vpcmpgtw  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT: [0,15]    .  D--------R  .    .    ..   vpcmpgtb  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT: [0,16]    .   D-------R  .    .    ..   vpcmpgtd  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT: [0,17]    .   D-------R  .    .    ..   vpcmpgtq  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT: [0,18]    .   D-------R  .    .    ..   vpcmpgtw  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT: [0,19]    .   D======eeeER    .    ..   psubb %mm2, %mm2
+# CHECK-NEXT: [0,20]    .    D========eeeER .    ..   psubd %mm2, %mm2
+# CHECK-NEXT: [0,21]    .    D===========eeeER   ..   psubq %mm2, %mm2
+# CHECK-NEXT: [0,22]    .    D==============eeeER..   psubw %mm2, %mm2
+# CHECK-NEXT: [0,23]    .    D------------------R..   psubb %xmm2, %xmm2
+# CHECK-NEXT: [0,24]    .    .D-----------------R..   psubd %xmm2, %xmm2
+# CHECK-NEXT: [0,25]    .    .D-----------------R..   psubq %xmm2, %xmm2
+# CHECK-NEXT: [0,26]    .    .D-----------------R..   psubw %xmm2, %xmm2
+# CHECK-NEXT: [0,27]    .    .D-----------------R..   vpsubb  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT: [0,28]    .    . D----------------R..   vpsubd  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT: [0,29]    .    . D----------------R..   vpsubq  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT: [0,30]    .    . D----------------R..   vpsubw  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT: [0,31]    .    . D----------------R..   vpsubb  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT: [0,32]    .    .  D---------------R..   vpsubd  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT: [0,33]    .    .  D---------------R..   vpsubq  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT: [0,34]    .    .  D---------------R..   vpsubw  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT: [0,35]    .    .  DeE-------------R..   andnps  %xmm0, %xmm0
+# CHECK-NEXT: [0,36]    .    .   DeE------------R..   andnpd  %xmm1, %xmm1
+# CHECK-NEXT: [0,37]    .    .   D=eE-----------R..   vandnps %xmm2, %xmm2, %xmm2
+# CHECK-NEXT: [0,38]    .    .   D==eE----------R..   vandnpd %xmm1, %xmm1, %xmm1
+# CHECK-NEXT: [0,39]    .    .   D=============eER.   pandn %mm2, %mm2
+# CHECK-NEXT: [0,40]    .    .    D=eE-----------R.   pandn %xmm2, %xmm2
+# CHECK-NEXT: [0,41]    .    .    DeE------------R.   vpandn  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT: [0,42]    .    .    D==eE----------R.   vandnps %xmm2, %xmm2, %xmm5
+# CHECK-NEXT: [0,43]    .    .    D===eE---------R.   vandnpd %xmm1, %xmm1, %xmm5
+# CHECK-NEXT: [0,44]    .    .    .DeE-----------R.   vpandn  %xmm3, %xmm3, %xmm5
+# CHECK-NEXT: [0,45]    .    .    .D-------------R.   xorps %xmm0, %xmm0
+# CHECK-NEXT: [0,46]    .    .    .D=E-----------R.   xorpd %xmm1, %xmm1
+# CHECK-NEXT: [0,47]    .    .    .D=E-----------R.   vxorps  %xmm2, %xmm2, %xmm2
+# CHECK-NEXT: [0,48]    .    .    . DE-----------R.   vxorpd  %xmm1, %xmm1, %xmm1
+# CHECK-NEXT: [0,49]    .    .    . D===========eER   pxor  %mm2, %mm2
+# CHECK-NEXT: [0,50]    .    .    . DE------------R   pxor  %xmm2, %xmm2
+# CHECK-NEXT: [0,51]    .    .    . D-------------R   vpxor %xmm3, %xmm3, %xmm3
+# CHECK-NEXT: [0,52]    .    .    .  D------------R   vxorps  %xmm4, %xmm4, %xmm5
+# CHECK-NEXT: [0,53]    .    .    .  D------------R   vxorpd  %xmm1, %xmm1, %xmm3
+# CHECK-NEXT: [0,54]    .    .    .  D------------R   vpxor %xmm3, %xmm3, %xmm5
+
+# CHECK:      Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK:            [0]    [1]    [2]    [3]
+# CHECK-NEXT: 0.     1     0.0    0.0    0.0       subl %eax, %eax
+# CHECK-NEXT: 1.     1     0.0    0.0    0.0       subq %rax, %rax
+# CHECK-NEXT: 2.     1     0.0    0.0    0.0       xorl %eax, %eax
+# CHECK-NEXT: 3.     1     0.0    0.0    0.0       xorq %rax, %rax
+# CHECK-NEXT: 4.     1     1.0    1.0    0.0       pcmpgtb  %mm2, %mm2
+# CHECK-NEXT: 5.     1     4.0    0.0    0.0       pcmpgtd  %mm2, %mm2
+# CHECK-NEXT: 6.     1     7.0    0.0    0.0       pcmpgtw  %mm2, %mm2
+# CHECK-NEXT: 7.     1     0.0    0.0    10.0      pcmpgtb  %xmm2, %xmm2
+# CHECK-NEXT: 8.     1     0.0    0.0    9.0       pcmpgtd  %xmm2, %xmm2
+# CHECK-NEXT: 9.     1     0.0    0.0    9.0       pcmpgtq  %xmm2, %xmm2
+# CHECK-NEXT: 10.    1     0.0    0.0    9.0       pcmpgtw  %xmm2, %xmm2
+# CHECK-NEXT: 11.    1     0.0    0.0    9.0       vpcmpgtb %xmm3, %xmm3, %xmm3
+# CHECK-NEXT: 12.    1     0.0    0.0    8.0       vpcmpgtd %xmm3, %xmm3, %xmm3
+# CHECK-NEXT: 13.    1     0.0    0.0    8.0       vpcmpgtq %xmm3, %xmm3, %xmm3
+# CHECK-NEXT: 14.    1     0.0    0.0    8.0       vpcmpgtw %xmm3, %xmm3, %xmm3
+# CHECK-NEXT: 15.    1     0.0    0.0    8.0       vpcmpgtb %xmm3, %xmm3, %xmm5
+# CHECK-NEXT: 16.    1     0.0    0.0    7.0       vpcmpgtd %xmm3, %xmm3, %xmm5
+# CHECK-NEXT: 17.    1     0.0    0.0    7.0       vpcmpgtq %xmm3, %xmm3, %xmm5
+# CHECK-NEXT: 18.    1     0.0    0.0    7.0       vpcmpgtw %xmm3, %xmm3, %xmm5
+# CHECK-NEXT: 19.    1     7.0    0.0    0.0       psubb  %mm2, %mm2
+# CHECK-NEXT: 20.    1     9.0    0.0    0.0       psubd  %mm2, %mm2
+# CHECK-NEXT: 21.    1     12.0   0.0    0.0       psubq  %mm2, %mm2
+# CHECK-NEXT: 22.    1     15.0   0.0    0.0       psubw  %mm2, %mm2
+# CHECK-NEXT: 23.    1     0.0    0.0    18.0      psubb  %xmm2, %xmm2
+# CHECK-NEXT: 24.    1     0.0    0.0    17.0      psubd  %xmm2, %xmm2
+# CHECK-NEXT: 25.    1     0.0    0.0    17.0      psubq  %xmm2, %xmm2
+# CHECK-NEXT: 26.    1     0.0    0.0    17.0      psubw  %xmm2, %xmm2
+# CHECK-NEXT: 27.    1     0.0    0.0    17.0      vpsubb %xmm3, %xmm3, %xmm3
+# CHECK-NEXT: 28.    1     0.0    0.0    16.0      vpsubd %xmm3, %xmm3, %xmm3
+# CHECK-NEXT: 29.    1     0.0    0.0    16.0      vpsubq %xmm3, %xmm3, %xmm3
+# CHECK-NEXT: 30.    1     0.0    0.0    16.0      vpsubw %xmm3, %xmm3, %xmm3
+# CHECK-NEXT: 31.    1     0.0    0.0    16.0      vpsubb %xmm3, %xmm3, %xmm5
+# CHECK-NEXT: 32.    1     0.0    0.0    15.0      vpsubd %xmm3, %xmm3, %xmm5
+# CHECK-NEXT: 33.    1     0.0    0.0    15.0      vpsubq %xmm3, %xmm3, %xmm5
+# CHECK-NEXT: 34.    1     0.0    0.0    15.0      vpsubw %xmm3, %xmm3, %xmm5
+# CHECK-NEXT: 35.    1     1.0    1.0    13.0      andnps %xmm0, %xmm0
+# CHECK-NEXT: 36.    1     1.0    1.0    12.0      andnpd %xmm1, %xmm1
+# CHECK-NEXT: 37.    1     2.0    2.0    11.0      vandnps  %xmm2, %xmm2, %xmm2
+# CHECK-NEXT: 38.    1     3.0    1.0    10.0      vandnpd  %xmm1, %xmm1, %xmm1
+# CHECK-NEXT: 39.    1     14.0   0.0    0.0       pandn  %mm2, %mm2
+# CHECK-NEXT: 40.    1     2.0    0.0    11.0      pandn  %xmm2, %xmm2
+# CHECK-NEXT: 41.    1     1.0    1.0    12.0      vpandn %xmm3, %xmm3, %xmm3
+# CHECK-NEXT: 42.    1     3.0    0.0    10.0      vandnps  %xmm2, %xmm2, %xmm5
+# CHECK-NEXT: 43.    1     4.0    1.0    9.0       vandnpd  %xmm1, %xmm1, %xmm5
+# CHECK-NEXT: 44.    1     1.0    0.0    11.0      vpandn %xmm3, %xmm3, %xmm5
+# CHECK-NEXT: 45.    1     0.0    0.0    13.0      xorps  %xmm0, %xmm0
+# CHECK-NEXT: 46.    1     2.0    0.0    11.0      xorpd  %xmm1, %xmm1
+# CHECK-NEXT: 47.    1     2.0    0.0    11.0      vxorps %xmm2, %xmm2, %xmm2
+# CHECK-NEXT: 48.    1     1.0    0.0    11.0      vxorpd %xmm1, %xmm1, %xmm1
+# CHECK-NEXT: 49.    1     12.0   0.0    0.0       pxor %mm2, %mm2
+# CHECK-NEXT: 50.    1     1.0    0.0    12.0      pxor %xmm2, %xmm2
+# CHECK-NEXT: 51.    1     0.0    0.0    13.0      vpxor  %xmm3, %xmm3, %xmm3
+# CHECK-NEXT: 52.    1     0.0    0.0    12.0      vxorps %xmm4, %xmm4, %xmm5
+# CHECK-NEXT: 53.    1     0.0    0.0    12.0      vxorpd %xmm1, %xmm1, %xmm3
+# CHECK-NEXT: 54.    1     0.0    0.0    12.0      vpxor  %xmm3, %xmm3, %xmm5