This patch is to fix an ISEL failure around half float data type. The fix covers two things,
- Some bitcast patterns around v8f16 are missing in AArch64 back-end.
- The promotion of v8f16 to v8i16 for the operand of load/store is missing. Since for little-end we only generate ldr/str, we can use big-endian to capture the failure exposed by pattern match for instruction ld1/st1.