Page MenuHomePhabricator

Jiangning (Jiangning Liu)
User

Projects

User does not belong to any projects.

User Details

User Since
Sep 15 2013, 6:29 PM (313 w, 4 d)

Recent Activity

Mar 31 2015

Jiangning committed rL233778: Fix PR23065. Avoid optimizing bitcast of build_vector with constant input to….
Fix PR23065. Avoid optimizing bitcast of build_vector with constant input to…
Mar 31 2015, 6:55 PM

Mar 20 2015

Jiangning added a comment to D8408: Inliner Enhancement.

Hi Yin,

Mar 20 2015, 12:29 AM

Mar 19 2015

Jiangning added a comment to D8408: Inliner Enhancement.

Hi Yin,

Mar 19 2015, 7:53 PM

Mar 18 2015

Jiangning added a comment to D8408: Inliner Enhancement.

Hi Renato,

Mar 18 2015, 11:39 PM

Mar 17 2015

Jiangning updated D8408: Inliner Enhancement.
Mar 17 2015, 10:47 PM
Jiangning retitled D8408: Inliner Enhancement from to Inliner Enhancement.
Mar 17 2015, 10:46 PM

Jan 5 2015

Jiangning committed rL225159: Fixed a bug in memory dependence checking module of loop vectorization. The….
Fixed a bug in memory dependence checking module of loop vectorization. The…
Jan 5 2015, 2:10 AM
Jiangning updated the diff for D6735: [PATCH] Fix a bug about memory dependence checking in loop vectorization.

Following Hao's feedback, I got the test case simplified.

Jan 5 2015, 1:10 AM

Dec 19 2014

Jiangning updated D6735: [PATCH] Fix a bug about memory dependence checking in loop vectorization.
Dec 19 2014, 2:29 AM
Jiangning updated D6735: [PATCH] Fix a bug about memory dependence checking in loop vectorization.
Dec 19 2014, 2:28 AM
Jiangning updated D6735: [PATCH] Fix a bug about memory dependence checking in loop vectorization.
Dec 19 2014, 2:28 AM
Jiangning retitled D6735: [PATCH] Fix a bug about memory dependence checking in loop vectorization from to [PATCH] Fix a bug about memory dependence checking in loop vectorization.
Dec 19 2014, 2:27 AM

Sep 25 2014

Jiangning added a comment to D5372: [AArch64] Refines the Cortex-A57 Machine Model.

Hi Dave,

Sep 25 2014, 11:01 PM
Jiangning added a comment to D5372: [AArch64] Refines the Cortex-A57 Machine Model.

I'm running benchmark and will let you know the result as soon as I got it.

Sep 25 2014, 3:02 AM

Sep 18 2014

Jiangning added a comment to D5257: Optimize sext/zext insertion algorithm in back-end.

committed as r218101.

Sep 18 2014, 10:40 PM
Jiangning added inline comments to D5257: Optimize sext/zext insertion algorithm in back-end.
Sep 18 2014, 9:26 PM

Sep 17 2014

Jiangning added a comment to D5372: [AArch64] Refines the Cortex-A57 Machine Model.

Hi Dave,

Sep 17 2014, 1:21 AM

Sep 16 2014

Jiangning added inline comments to D5372: [AArch64] Refines the Cortex-A57 Machine Model.
Sep 16 2014, 11:10 PM

Sep 14 2014

Jiangning added a comment to D5257: Optimize sext/zext insertion algorithm in back-end.

Hi majnemer,

Sep 14 2014, 10:01 PM
Jiangning updated the diff for D5257: Optimize sext/zext insertion algorithm in back-end.

Patch is updated following feedbacks.

Sep 14 2014, 10:00 PM
Jiangning added a comment to D5322: Add threshold for lowering lattice value 'overdefined' in LVI.
In D5322#5, @hfinkel wrote:

I'd really prefer that we keep this count per block, instead of a global count. Is that possible?

Also, please upload full-context diffs in the future (see: http://llvm.org/docs/Phabricator.html).

Sep 14 2014, 8:50 PM
Jiangning updated the diff for D5322: Add threshold for lowering lattice value 'overdefined' in LVI.

Patch is updated following the feedback.

Sep 14 2014, 8:25 PM
Jiangning added a comment to D5322: Add threshold for lowering lattice value 'overdefined' in LVI.

Hi Hal, Jeorg and Chad,

Sep 14 2014, 8:18 PM

Sep 11 2014

Jiangning retitled D5322: Add threshold for lowering lattice value 'overdefined' in LVI from to Add threshold for lowering lattice value 'overdefined' in LVI.
Sep 11 2014, 8:45 PM

Sep 10 2014

Jiangning added a comment to D5278: [AArch64] Enable post-RA MI scheduler.

Hi Sanji,

Sep 10 2014, 2:03 AM

Sep 8 2014

Jiangning retitled D5257: Optimize sext/zext insertion algorithm in back-end from to Optimize sext/zext insertion algorithm in back-end.
Sep 8 2014, 8:01 PM

Sep 3 2014

Jiangning added a comment to D5044: [AArch64] Add pass to enable additional comparison optimizations by CSE.

Hi Sergey,

Sep 3 2014, 10:23 PM
Jiangning added a comment to D5103: [AArch64] Override useAA and remove unneeded edges in the scheduling graph. (Phabricator).

Hi Sanjin,

Sep 3 2014, 2:53 AM

Aug 31 2014

Jiangning added a comment to D4814: [MachineSink] Use the real post dominator tree.

Hi Jinyue,

Aug 31 2014, 8:35 PM

Aug 29 2014

Jiangning added a comment to D4814: [MachineSink] Use the real post dominator tree.

Hi Jingyue,

Aug 29 2014, 3:10 AM

Aug 28 2014

Jiangning added a comment to D5094: [AArch64] Fix an ISEL failure around half float data type.

Hi James and Renato,

Aug 28 2014, 3:43 AM
Jiangning retitled D5094: [AArch64] Fix an ISEL failure around half float data type from to [AArch64] Fix an ISEL failure around half float data type.
Aug 28 2014, 2:00 AM

Aug 25 2014

Jiangning added a comment to D5044: [AArch64] Add pass to enable additional comparison optimizations by CSE.

Hi Sergey,

Aug 25 2014, 8:11 PM

Aug 20 2014

Jiangning updated the diff for D4967: Change the policy of ZERO_EXTEND/SIGN_EXTEND for SelectionDAG builder and legalization.

Hi Tim,

Aug 20 2014, 2:48 AM

Aug 19 2014

Jiangning added a comment to D4967: Change the policy of ZERO_EXTEND/SIGN_EXTEND for SelectionDAG builder and legalization.

Hi Tim,

Aug 19 2014, 10:21 PM
Jiangning updated the diff for D4967: Change the policy of ZERO_EXTEND/SIGN_EXTEND for SelectionDAG builder and legalization.

Uploaded new patch.

Aug 19 2014, 10:18 PM

Aug 18 2014

Jiangning retitled D4967: Change the policy of ZERO_EXTEND/SIGN_EXTEND for SelectionDAG builder and legalization from to Change the policy of ZERO_EXTEND/SIGN_EXTEND for SelectionDAG builder and legalization.
Aug 18 2014, 7:17 PM

Aug 12 2014

Jiangning added a comment to D4814: [MachineSink] Use the real post dominator tree.

Hi Jingyue,

Aug 12 2014, 6:39 PM

Aug 7 2014

Jiangning added a comment to D4551: LLVM CFL Alias Analysis -- Algorithm.

Hi George,

Aug 7 2014, 8:38 PM · deleted
Jiangning added a comment to D4814: [MachineSink] Use the real post dominator tree.

Hi Jingyue,

Aug 7 2014, 6:34 PM
Jiangning added a comment to D4814: [MachineSink] Use the real post dominator tree.

Hi Jingyue,

Aug 7 2014, 3:41 AM
Jiangning added a comment to D4551: LLVM CFL Alias Analysis -- Algorithm.

Hi George,

Aug 7 2014, 2:51 AM · deleted

Aug 6 2014

Jiangning added a comment to D4814: [MachineSink] Use the real post dominator tree.

Hi Jingyue,

Aug 6 2014, 11:35 PM

Jul 31 2014

Jiangning added a comment to D4440: [AArch64] Generate tbz/tbnz when comparing against zero..

Hi Chad,

Jul 31 2014, 7:32 PM

Jul 30 2014

Jiangning retitled D4736: Enhance machine CSE to capture more opportunities from to Enhance machine CSE to capture more opportunities.
Jul 30 2014, 8:02 PM

Jul 29 2014

Jiangning added a comment to D4440: [AArch64] Generate tbz/tbnz when comparing against zero..

Hi Chad,

Jul 29 2014, 8:21 PM

Jul 22 2014

Jiangning added a comment to D4440: [AArch64] Generate tbz/tbnz when comparing against zero..

Hi Chad,

Jul 22 2014, 11:09 PM
Jiangning retitled D4637: Disable some optimization cases for type conversion from sint to fp from to Disable some optimization cases for type conversion from sint to fp.
Jul 22 2014, 9:01 PM

Jul 9 2014

Jiangning added a comment to D4361: [AArch64] Enhance rematerialization by adding a new API isAsCheapAsAMove in TargetInstroInfo.

Hi Quentin,

Jul 9 2014, 6:36 PM
Jiangning added a comment to D4361: [AArch64] Enhance rematerialization by adding a new API isAsCheapAsAMove in TargetInstroInfo.

Hi Eric,

Jul 9 2014, 6:15 PM

Jul 7 2014

Jiangning added a comment to D4361: [AArch64] Enhance rematerialization by adding a new API isAsCheapAsAMove in TargetInstroInfo.

Hi Eric,

Jul 7 2014, 11:34 PM
Jiangning added inline comments to D4361: [AArch64] Enhance rematerialization by adding a new API isAsCheapAsAMove in TargetInstroInfo.
Jul 7 2014, 11:30 PM

Jul 3 2014

Jiangning added a comment to D4361: [AArch64] Enhance rematerialization by adding a new API isAsCheapAsAMove in TargetInstroInfo.

Hi Quentin,

Jul 3 2014, 11:08 PM
Jiangning updated the diff for D4361: [AArch64] Enhance rematerialization by adding a new API isAsCheapAsAMove in TargetInstroInfo.
Jul 3 2014, 11:03 PM

Jul 2 2014

Jiangning added a comment to D4361: [AArch64] Enhance rematerialization by adding a new API isAsCheapAsAMove in TargetInstroInfo.

Hi Quentin,

Jul 2 2014, 10:27 PM
Jiangning updated the diff for D4361: [AArch64] Enhance rematerialization by adding a new API isAsCheapAsAMove in TargetInstroInfo.
Jul 2 2014, 10:04 PM
Jiangning added a comment to D4361: [AArch64] Enhance rematerialization by adding a new API isAsCheapAsAMove in TargetInstroInfo.

Hi Quentin,

Jul 2 2014, 3:22 AM

Jul 1 2014

Jiangning retitled D4361: [AArch64] Enhance rematerialization by adding a new API isAsCheapAsAMove in TargetInstroInfo from to [AArch64] Enhance rematerialization by adding a new API isAsCheapAsAMove in TargetInstroInfo.
Jul 1 2014, 10:14 PM

May 22 2014

Jiangning retitled D3867: Fix shuffle vector lowering for generating correct vext with reversed input vectors from to Fix shuffle vector lowering for generating correct vext with reversed input vectors.
May 22 2014, 3:00 AM

May 15 2014

Jiangning added a comment to D3432: Implement ADRP CSE for global symbols.

Hi Quentin,

May 15 2014, 4:54 PM
Jiangning added a comment to D3432: Implement ADRP CSE for global symbols.

Hi Quentin,

May 15 2014, 2:48 AM

May 14 2014

Jiangning added a comment to D3633: Fix fastcc/tailcallopt for ARM64.

Hi Tim,

May 14 2014, 6:59 PM
Jiangning added a comment to D3432: Implement ADRP CSE for global symbols.

Hi Quentin,

May 14 2014, 6:50 PM
Jiangning updated the diff for D3633: Fix fastcc/tailcallopt for ARM64.

No real code logic changes, and only make the following changes,

  1. Merged with trunk
  2. Reformat with git-clang-format
May 14 2014, 12:32 AM

May 12 2014

Jiangning updated the diff for D3432: Implement ADRP CSE for global symbols.

Hi Quentin,

May 12 2014, 12:06 AM

May 8 2014

Jiangning added inline comments to D3633: Fix fastcc/tailcallopt for ARM64.

Hi Tim,

May 8 2014, 2:26 AM
Jiangning updated the diff for D3633: Fix fastcc/tailcallopt for ARM64.

This new version of patch fixed the followings,

  1. Merged with TOT, and in particular, merged the logic around big-endian in LowerCall.
  2. Changed the argument of SDT_ARM64TCRET from -1 to 2.
  3. Fixed the 16-byte alignment requirement issue following Tim's feedback.
  4. The patch is formatted with tool git-clang-format.
May 8 2014, 2:13 AM

May 6 2014

Jiangning retitled D3633: Fix fastcc/tailcallopt for ARM64 from to Fix fastcc/tailcallopt for ARM64.
May 6 2014, 8:34 PM
Jiangning added inline comments to D3432: Implement ADRP CSE for global symbols.

The changes of this version are mainly the followings, and no other things.

May 6 2014, 6:53 PM
Jiangning updated the diff for D3432: Implement ADRP CSE for global symbols.

Hi Quentin,

May 6 2014, 6:49 PM

Apr 28 2014

Jiangning updated subscribers of D3240: Add 'musttail' marker to call instructions.
Apr 28 2014, 10:07 PM
Jiangning added a comment to D3432: Implement ADRP CSE for global symbols.

Hi Quentin,

Apr 28 2014, 5:52 PM

Apr 27 2014

Jiangning added a comment to D3432: Implement ADRP CSE for global symbols.

Hi Quentin,

Apr 27 2014, 8:48 PM

Apr 24 2014

Jiangning added a comment to D3432: Implement ADRP CSE for global symbols.

Hi Quentin,

Apr 24 2014, 6:25 PM
Jiangning added a comment to D3432: Implement ADRP CSE for global symbols.

Hi Quentin,

Apr 24 2014, 4:19 AM
Jiangning added inline comments to D3432: Implement ADRP CSE for global symbols.
Apr 24 2014, 2:58 AM
Jiangning updated the diff for D3432: Implement ADRP CSE for global symbols.

This patch make some more little changes,

  1. Remove file mode change
  2. Remove useless comments
Apr 24 2014, 1:24 AM
Jiangning updated the diff for D3432: Implement ADRP CSE for global symbols.

This new version fixed the followings,

Apr 24 2014, 1:16 AM