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[X86][SSE] Lower constant vXi8 ISD::SRL/ISD::SRA using PMULLW
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Authored by RKSimon on Aug 15 2018, 7:46 AM.

Details

Summary

Extending the concept introduced in D49562, this patch lowers constant vXi8 ISD::SRL/ISD::SRA by zero/sign extending to vXi16 and using PMULLW and then truncating the high 8 bits of the result.

Diff Detail

Repository
rL LLVM

Event Timeline

RKSimon created this revision.Aug 15 2018, 7:46 AM
craig.topper added inline comments.Aug 15 2018, 10:52 AM
lib/Target/X86/X86ISelLowering.cpp
23701 ↗(On Diff #160806)

hasBWI is unnecessary here right? BWI is only truly legal under useBWIRegs not hasBWI. But if you have a v64i8 type here, it must already be legal.

23715 ↗(On Diff #160806)

Can we do this for v32i8 and useBWIRegs?

RKSimon added inline comments.Aug 15 2018, 11:00 AM
lib/Target/X86/X86ISelLowering.cpp
23701 ↗(On Diff #160806)

Yup - I can simplify that cheers!

23715 ↗(On Diff #160806)

Its caught in code above it (line 32684).

RKSimon added inline comments.Aug 16 2018, 10:21 AM
lib/Target/X86/X86ISelLowering.cpp
23715 ↗(On Diff #160806)

Sorry that's line 23684

RKSimon updated this revision to Diff 161055.Aug 16 2018, 10:22 AM

Remove unnecessary hasBWI()

This revision is now accepted and ready to land.Aug 17 2018, 10:14 AM
This revision was automatically updated to reflect the committed changes.