[RISCV] Add mnemonic alias: move, sbreak and scall.

[kito-cheng]

Summary

as title.

[kito-cheng]

Rearrange order for testcase.

[asb]

Thanks Kito, this looks good to me. Some minor spelling issues in the comment.

lib/Target/RISCV/RISCVInstrInfo.td

586–588

"were renamed to ECALL and EBREAK in the User-Level ISA 2.1".

"accpet" -> "accept"

lib/Target/RISCV/RISCVInstrInfo.td

def : InstAlias<"sraw $rd, $rs1, $shamt",
                 (SRAIW  GPR:$rd, GPR:$rs1, uimm5:$shamt)>;
 } // Predicates = [IsRV64]
 def : InstAlias<"slt $rd, $rs1, $imm12",
                 (SLTI  GPR:$rd, GPR:$rs1, simm12:$imm12)>;
 def : InstAlias<"sltu $rd, $rs1, $imm12",
                 (SLTIU  GPR:$rd, GPR:$rs1, simm12:$imm12)>;
 }
 
+def : MnemonicAlias<"move", "mv">;
+
+// The SCALL and SBREAK instructions have been renamed to ECALL and EBREAK
+// User-Level ISA 2.1.
+// We still accpet the old name for backward compatibility like GNU toolchain.
+def : MnemonicAlias<"scall", "ecall">;
+def : MnemonicAlias<"sbreak", "ebreak">;
+
 //===----------------------------------------------------------------------===//
 // Pseudo-instructions and codegen patterns
 //
 // Naming convention: For 'generic' pattern classes, we use the naming
 // convention PatTy1Ty2. For pattern classes which offer a more complex
 // expension, prefix the class name, e.g. BccPat.
 //===----------------------------------------------------------------------===//
 

test/MC/RISCV/rvi-aliases-valid.s

 
 # CHECK-INST: slti a2, a3, 4
 # CHECK-ALIAS: slti a2, a3, 4
 slt a2,a3,4
 
 # CHECK-INST: sltiu a2, a3, 4
 # CHECK-ALIAS: sltiu a2, a3, 4
 sltu a2,a3,4
+
+# CHECK-INST: addi a2, a3, 0
+# CHECK-ALIAS: mv a2, a3
+move a2,a3
+
+# CHECK-INST: ebreak
+# CHECK-ALIAS: ebreak
+sbreak
+
+# CHECK-INST: ecall
+# CHECK-ALIAS: ecall
+scall