[ARM64][Windows] Create COMDAT symbols for sections containing constants

[ssijaric]

Summary

As of SVN r334523, eligible constants are put in COMDAT sections in COFF on ARM64 Windows. We need to create an appropriate COMDAT symbol, just as on X86. Otherwise, the MS linker complains with something like

fatal error LNK1143: invalid or corrupt file: no symbol for COMDAT section 0x4

and the dumpbin output shows that there is no COMDAT symbol in the section

SECTION HEADER #4

.rdata name
     0 physical address
     0 virtual address
     8 size of raw data
  6EA0 file pointer to raw data (00006EA0 to 00006EA7)
     0 file pointer to relocation table
     0 file pointer to line numbers
     0 number of relocations
     0 number of line numbers

40401040 flags

Initialized Data
COMDAT (no symbol)
8 byte align
Read Only

RAW DATA #4

00000000: .......

[mstorsjo]

Funny coincidence that you post this now, I also just investigated the same issue, from a different point of view. Interestingly enough, LLD hasn't warned about it, otherwise I would have noticed much sooner.

But I'd suggest fixing this differently; since the code causing this is now in arch independent TargetLoweringObjectFileCOFF, we should also move this to an arch independent superclass, see D49644.

I'm also trying to fix this for ARM64 mingw, see D49637.

test/CodeGen/AArch64/win_cst_pool.ll

1

This new file shouldn't have executable mode

[ssijaric]

Abandoning, as this will be fixed in D49644.

lib/Target/AArch64/AArch64AsmPrinter.cpp

 #include "llvm/ADT/Twine.h"
 #include "llvm/CodeGen/AsmPrinter.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/MachineConstantPool.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineOperand.h"

 #include "llvm/MC/MCContext.h"
 #include "llvm/MC/MCInst.h"
 #include "llvm/MC/MCInstBuilder.h"
+#include "llvm/MC/MCSectionCOFF.h"
 #include "llvm/MC/MCStreamer.h"
 #include "llvm/MC/MCSymbol.h"
 #include "llvm/Support/Casting.h"

 
 /// GetCPISymbol - Return the symbol for the specified constant pool entry.
 MCSymbol *AArch64AsmPrinter::GetCPISymbol(unsigned CPID) const {
+  // Steal this snippet from X86AsmPrinter::GetCPISymbol to create a COMDAT
+  // symbol for the specified constant poool entry with proper attributes.
+  if (STI->getTargetTriple().isKnownWindowsMSVCEnvironment()) {
+    const MachineConstantPoolEntry &CPE =
+        MF->getConstantPool()->getConstants()[CPID];
+    if (!CPE.isMachineConstantPoolEntry()) {
+      const DataLayout &DL = MF->getDataLayout();
+      SectionKind Kind = CPE.getSectionKind(&DL);
+      const Constant *C = CPE.Val.ConstVal;
+      unsigned Align = CPE.Alignment;
+      if (const MCSectionCOFF *S = dyn_cast<MCSectionCOFF>(
+              getObjFileLowering().getSectionForConstant(DL, Kind, C, Align))) {
+        if (MCSymbol *Sym = S->getCOMDATSymbol()) {
+          if (Sym->isUndefined())
+            OutStreamer->EmitSymbolAttribute(Sym, MCSA_Global);
+          return Sym;
+        }
+      }
+    }
+  }
+
   // Darwin uses a linker-private symbol name for constant-pools (to
   // avoid addends on the relocation?), ELF has no such concept and
   // uses a normal private symbol.

test/CodeGen/AArch64/win_cst_pool.ll

+; RUN: llc < %s -mtriple=aarch64-windows-msvc | FileCheck %s
+
+define double @double() {
+  ret double 0x0000000000800000
+}
+; CHECK:              .globl  __real@0000000000800000
+; CHECK-NEXT:         .section        .rdata,"dr",discard,__real@0000000000800000
+; CHECK-NEXT:         .p2align  3
+; CHECK-NEXT: __real@0000000000800000:
+; CHECK-NEXT:         .xword  8388608
+; CHECK:      double:
+; CHECK:        adrp  x8, __real@0000000000800000
+; CHECK-NEXT:       ldr d0, [x8, __real@0000000000800000]
+; CHECK-NEXT:       ret
+
+define <4 x i32> @vec1() {
+  ret <4 x i32> <i32 3, i32 2, i32 1, i32 0>
+}
+; CHECK:              .globl  __xmm@00000000000000010000000200000003
+; CHECK-NEXT:         .section        .rdata,"dr",discard,__xmm@00000000000000010000000200000003
+; CHECK-NEXT:         .p2align  4
+; CHECK-NEXT: __xmm@00000000000000010000000200000003:
+; CHECK-NEXT:         .word   3
+; CHECK-NEXT:         .word   2
+; CHECK-NEXT:         .word   1
+; CHECK-NEXT:         .word   0
+; CHECK:      vec1:
+; CHECK:               adrp    x8, __xmm@00000000000000010000000200000003
+; CHECK-NEXT:          ldr     q0, [x8, __xmm@00000000000000010000000200000003]
+; CHECK-NEXT:          ret
+
+define <8 x i16> @vec2() {
+  ret <8 x i16> <i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>
+}
+; CHECK:             .globl  __xmm@00000001000200030004000500060007
+; CHECK-NEXT:        .section        .rdata,"dr",discard,__xmm@00000001000200030004000500060007
+; CHECK-NEXT:        .p2align  4
+; CHECK-NEXT: __xmm@00000001000200030004000500060007:
+; CHECK-NEXT:        .hword  7
+; CHECK-NEXT:        .hword  6
+; CHECK-NEXT:        .hword  5
+; CHECK-NEXT:        .hword  4
+; CHECK-NEXT:        .hword  3
+; CHECK-NEXT:        .hword  2
+; CHECK-NEXT:        .hword  1
+; CHECK-NEXT:        .hword  0
+; CHECK:      vec2:
+; CHECK:             adrp    x8, __xmm@00000001000200030004000500060007
+; CHECK-NEXT:        ldr     q0, [x8, __xmm@00000001000200030004000500060007]
+; CHECK-NEXT:        ret
+
+define <4 x i64> @vec3() {
+entry:
+  ret <4 x i64> <i64 8589934593, i64 17179869187, i64 8589934592, i64 17179869186>
+}
+
+; CHECK:       .globl __xmm@00000004000000030000000200000001
+; CHECK-NEXT:      .section        .rdata,"dr",discard,__xmm@00000004000000030000000200000001
+; CHECK-NEXT:      .p2align 4
+; CHECK-NEXT: __xmm@00000004000000030000000200000001:
+; CHECK-NEXT:        .xword 8589934593
+; CHECK-NEXT:        .xword 17179869187
+; CHECK-NEXT:        .globl  __xmm@00000004000000020000000200000000
+; CHECK-NEXT:        .section        .rdata,"dr",discard,__xmm@00000004000000020000000200000000
+; CHECK-NEXT:        .p2align        4
+; CHECK-NEXT: __xmm@00000004000000020000000200000000:
+; CHECK-NEXT:        .xword  8589934592
+; CHECK-NEXT:        .xword  17179869186
+; CHECK:      vec3:
+; CHECK:             adrp    x8, __xmm@00000004000000030000000200000001
+; CHECK-NEXT:        adrp    x9, __xmm@00000004000000020000000200000000
+; CHECK-NEXT:        ldr     q0, [x8, __xmm@00000004000000030000000200000001]
+; CHECK-NEXT:        ldr     q1, [x9, __xmm@00000004000000020000000200000000]
+; CHECK-NEXT:        ret