[X86][SSE] Canonicalize scalar fp arithmetic shuffle patterns

[RKSimon]

Summary

As discussed on PR38197, this canonicalizes MOVS*(N0, OP(N0, N1)) --> MOVS*(N0, SCALAR_TO_VECTOR(OP(N0[0], N1[0])))

This returns the scalar-fp codegen lost by rL336971.

Additionally it handles the OP(N1, N0)) case for commutable (FADD/FMUL) ops.

@craig.topper - This interferes with D49280 but I've tried to make the merge as simple as possible.

[craig.topper]

LGTM

llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

if (Op0.isUndef() && Op1.getOpcode() == ISD::VECTOR_SHUFFLE) {
       auto ShufOp = Op1.getOperand(0);
       if (isShuffleEquivalent(Op1, ShufOp, Mask, ExpectedMask))
         return DAG.getNode(X86ISD::UNPCKH, DL, VT, N.getOperand(0), ShufOp);
     }
     return SDValue();
   }
   case X86ISD::MOVSD:
   case X86ISD::MOVSS: {
-    SDValue V0 = peekThroughBitcasts(N->getOperand(0));
-    SDValue V1 = peekThroughBitcasts(N->getOperand(1));
+    SDValue N0 = N.getOperand(0);
+    SDValue N1 = N.getOperand(1);
+
+    // Canonicalize scalar FPOps:
+    // MOVS*(N0, OP(N0, N1)) --> MOVS*(N0, SCALAR_TO_VECTOR(OP(N0[0], N1[0])))
+    // If commutable, allow OP(N1[0], N0[0]).
+    unsigned Opcode1 = N1.getOpcode();
+    if (Opcode1 == ISD::FADD || Opcode1 == ISD::FMUL || Opcode1 == ISD::FSUB ||
+        Opcode1 == ISD::FDIV) {
+      SDValue N10 = N1.getOperand(0);
+      SDValue N11 = N1.getOperand(1);
+      if (N10 == N0 ||
+          (N11 == N0 && (Opcode1 == ISD::FADD || Opcode1 == ISD::FMUL))) {
+        if (N10 != N0)
+          std::swap(N10, N11);
+        MVT SVT = VT.getVectorElementType();
+        SDValue ZeroIdx = DAG.getIntPtrConstant(0, DL);
+        N10 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, SVT, N10, ZeroIdx);
+        N11 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, SVT, N11, ZeroIdx);
+        SDValue Scl = DAG.getNode(Opcode1, DL, SVT, N10, N11);
+        SDValue SclVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VT, Scl);
+        DCI.AddToWorklist(N10.getNode());
+        DCI.AddToWorklist(N11.getNode());
+        DCI.AddToWorklist(Scl.getNode());
+        DCI.AddToWorklist(SclVec.getNode());
+        return DAG.getNode(Opcode, DL, VT, N0, SclVec);
+      }
+    }
+
+    SDValue V0 = peekThroughBitcasts(N0);
+    SDValue V1 = peekThroughBitcasts(N1);
     bool isZero0 = ISD::isBuildVectorAllZeros(V0.getNode());
     bool isZero1 = ISD::isBuildVectorAllZeros(V1.getNode());
     if (isZero0 && isZero1)
       return SDValue();
 
     // We often lower to MOVSD/MOVSS from integer as well as native float
     // types; remove unnecessary domain-crossing bitcasts if we can to make it
     // easier to combine shuffles later on. We've already accounted for the

llvm/trunk/test/CodeGen/X86/sse-scalar-fp-arith.ll

; X64-AVX-NEXT:    retq
   %shuf = shufflevector <2 x double> %ins, <2 x double> %a, <2 x i32> <i32 0, i32 3>
   ret <2 x double> %shuf
 }
 
 ; Ensure that the backend selects SSE/AVX scalar fp instructions
 ; from a packed fp instruction plus a vector insert.
 
 define <4 x float> @insert_test_add_ss(<4 x float> %a, <4 x float> %b) {
-; SSE2-LABEL: insert_test_add_ss:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    addps %xmm0, %xmm1
-; SSE2-NEXT:    movss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test_add_ss:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    addps %xmm0, %xmm1
-; SSE41-NEXT:    blendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test_add_ss:
+; SSE:       # %bb.0:
+; SSE-NEXT:    addss %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test_add_ss:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vaddps %xmm1, %xmm0, %xmm1
-; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
+; AVX-NEXT:    vaddss %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fadd <4 x float> %a, %b
   %2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
   ret <4 x float> %2
 }
 
 define <4 x float> @insert_test_sub_ss(<4 x float> %a, <4 x float> %b) {
-; SSE2-LABEL: insert_test_sub_ss:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    movaps %xmm0, %xmm2
-; SSE2-NEXT:    subps %xmm1, %xmm2
-; SSE2-NEXT:    movss {{.*#+}} xmm0 = xmm2[0],xmm0[1,2,3]
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test_sub_ss:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    movaps %xmm0, %xmm2
-; SSE41-NEXT:    subps %xmm1, %xmm2
-; SSE41-NEXT:    blendps {{.*#+}} xmm2 = xmm2[0],xmm0[1,2,3]
-; SSE41-NEXT:    movaps %xmm2, %xmm0
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test_sub_ss:
+; SSE:       # %bb.0:
+; SSE-NEXT:    subss %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test_sub_ss:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vsubps %xmm1, %xmm0, %xmm1
-; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
+; AVX-NEXT:    vsubss %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fsub <4 x float> %a, %b
   %2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
   ret <4 x float> %2
 }
 
 define <4 x float> @insert_test_mul_ss(<4 x float> %a, <4 x float> %b) {
-; SSE2-LABEL: insert_test_mul_ss:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    mulps %xmm0, %xmm1
-; SSE2-NEXT:    movss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test_mul_ss:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    mulps %xmm0, %xmm1
-; SSE41-NEXT:    blendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test_mul_ss:
+; SSE:       # %bb.0:
+; SSE-NEXT:    mulss %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test_mul_ss:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vmulps %xmm1, %xmm0, %xmm1
-; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
+; AVX-NEXT:    vmulss %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fmul <4 x float> %a, %b
   %2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
   ret <4 x float> %2
 }
 
 define <4 x float> @insert_test_div_ss(<4 x float> %a, <4 x float> %b) {
-; SSE2-LABEL: insert_test_div_ss:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    movaps %xmm0, %xmm2
-; SSE2-NEXT:    divps %xmm1, %xmm2
-; SSE2-NEXT:    movss {{.*#+}} xmm0 = xmm2[0],xmm0[1,2,3]
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test_div_ss:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    movaps %xmm0, %xmm2
-; SSE41-NEXT:    divps %xmm1, %xmm2
-; SSE41-NEXT:    blendps {{.*#+}} xmm2 = xmm2[0],xmm0[1,2,3]
-; SSE41-NEXT:    movaps %xmm2, %xmm0
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test_div_ss:
+; SSE:       # %bb.0:
+; SSE-NEXT:    divss %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test_div_ss:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vdivps %xmm1, %xmm0, %xmm1
-; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
+; AVX-NEXT:    vdivss %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fdiv <4 x float> %a, %b
   %2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
   ret <4 x float> %2
 }
 
 define <2 x double> @insert_test_add_sd(<2 x double> %a, <2 x double> %b) {
-; SSE2-LABEL: insert_test_add_sd:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    addpd %xmm0, %xmm1
-; SSE2-NEXT:    movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test_add_sd:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    addpd %xmm0, %xmm1
-; SSE41-NEXT:    blendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test_add_sd:
+; SSE:       # %bb.0:
+; SSE-NEXT:    addsd %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test_add_sd:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vaddpd %xmm1, %xmm0, %xmm1
-; AVX-NEXT:    vblendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
+; AVX-NEXT:    vaddsd %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fadd <2 x double> %a, %b
   %2 = shufflevector <2 x double> %1, <2 x double> %a, <2 x i32> <i32 0, i32 3>
   ret <2 x double> %2
 }
 
 define <2 x double> @insert_test_sub_sd(<2 x double> %a, <2 x double> %b) {
-; SSE2-LABEL: insert_test_sub_sd:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    movapd %xmm0, %xmm2
-; SSE2-NEXT:    subpd %xmm1, %xmm2
-; SSE2-NEXT:    movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1]
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test_sub_sd:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    movapd %xmm0, %xmm2
-; SSE41-NEXT:    subpd %xmm1, %xmm2
-; SSE41-NEXT:    blendpd {{.*#+}} xmm2 = xmm2[0],xmm0[1]
-; SSE41-NEXT:    movapd %xmm2, %xmm0
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test_sub_sd:
+; SSE:       # %bb.0:
+; SSE-NEXT:    subsd %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test_sub_sd:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vsubpd %xmm1, %xmm0, %xmm1
-; AVX-NEXT:    vblendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
+; AVX-NEXT:    vsubsd %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fsub <2 x double> %a, %b
   %2 = shufflevector <2 x double> %1, <2 x double> %a, <2 x i32> <i32 0, i32 3>
   ret <2 x double> %2
 }
 
 define <2 x double> @insert_test_mul_sd(<2 x double> %a, <2 x double> %b) {
-; SSE2-LABEL: insert_test_mul_sd:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    mulpd %xmm0, %xmm1
-; SSE2-NEXT:    movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test_mul_sd:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    mulpd %xmm0, %xmm1
-; SSE41-NEXT:    blendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test_mul_sd:
+; SSE:       # %bb.0:
+; SSE-NEXT:    mulsd %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test_mul_sd:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vmulpd %xmm1, %xmm0, %xmm1
-; AVX-NEXT:    vblendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
+; AVX-NEXT:    vmulsd %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fmul <2 x double> %a, %b
   %2 = shufflevector <2 x double> %1, <2 x double> %a, <2 x i32> <i32 0, i32 3>
   ret <2 x double> %2
 }
 
 define <2 x double> @insert_test_div_sd(<2 x double> %a, <2 x double> %b) {
-; SSE2-LABEL: insert_test_div_sd:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    movapd %xmm0, %xmm2
-; SSE2-NEXT:    divpd %xmm1, %xmm2
-; SSE2-NEXT:    movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1]
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test_div_sd:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    movapd %xmm0, %xmm2
-; SSE41-NEXT:    divpd %xmm1, %xmm2
-; SSE41-NEXT:    blendpd {{.*#+}} xmm2 = xmm2[0],xmm0[1]
-; SSE41-NEXT:    movapd %xmm2, %xmm0
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test_div_sd:
+; SSE:       # %bb.0:
+; SSE-NEXT:    divsd %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test_div_sd:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vdivpd %xmm1, %xmm0, %xmm1
-; AVX-NEXT:    vblendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
+; AVX-NEXT:    vdivsd %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fdiv <2 x double> %a, %b
   %2 = shufflevector <2 x double> %1, <2 x double> %a, <2 x i32> <i32 0, i32 3>
   ret <2 x double> %2
 }
 
 define <4 x float> @insert_test2_add_ss(<4 x float> %a, <4 x float> %b) {
-; SSE2-LABEL: insert_test2_add_ss:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    addps %xmm1, %xmm0
-; SSE2-NEXT:    movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
-; SSE2-NEXT:    movaps %xmm1, %xmm0
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test2_add_ss:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    addps %xmm1, %xmm0
-; SSE41-NEXT:    blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test2_add_ss:
+; SSE:       # %bb.0:
+; SSE-NEXT:    addss %xmm0, %xmm1
+; SSE-NEXT:    movaps %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test2_add_ss:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vaddps %xmm0, %xmm1, %xmm0
-; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT:    vaddss %xmm0, %xmm1, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fadd <4 x float> %b, %a
   %2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
   ret <4 x float> %2
 }
 
 define <4 x float> @insert_test2_sub_ss(<4 x float> %a, <4 x float> %b) {
-; SSE2-LABEL: insert_test2_sub_ss:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    movaps %xmm1, %xmm2
-; SSE2-NEXT:    subps %xmm0, %xmm2
-; SSE2-NEXT:    movss {{.*#+}} xmm1 = xmm2[0],xmm1[1,2,3]
-; SSE2-NEXT:    movaps %xmm1, %xmm0
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test2_sub_ss:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    movaps %xmm1, %xmm2
-; SSE41-NEXT:    subps %xmm0, %xmm2
-; SSE41-NEXT:    blendps {{.*#+}} xmm2 = xmm2[0],xmm1[1,2,3]
-; SSE41-NEXT:    movaps %xmm2, %xmm0
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test2_sub_ss:
+; SSE:       # %bb.0:
+; SSE-NEXT:    subss %xmm0, %xmm1
+; SSE-NEXT:    movaps %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test2_sub_ss:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vsubps %xmm0, %xmm1, %xmm0
-; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT:    vsubss %xmm0, %xmm1, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fsub <4 x float> %b, %a
   %2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
   ret <4 x float> %2
 }
 
 define <4 x float> @insert_test2_mul_ss(<4 x float> %a, <4 x float> %b) {
-; SSE2-LABEL: insert_test2_mul_ss:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    mulps %xmm1, %xmm0
-; SSE2-NEXT:    movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
-; SSE2-NEXT:    movaps %xmm1, %xmm0
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test2_mul_ss:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    mulps %xmm1, %xmm0
-; SSE41-NEXT:    blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test2_mul_ss:
+; SSE:       # %bb.0:
+; SSE-NEXT:    mulss %xmm0, %xmm1
+; SSE-NEXT:    movaps %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test2_mul_ss:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vmulps %xmm0, %xmm1, %xmm0
-; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT:    vmulss %xmm0, %xmm1, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fmul <4 x float> %b, %a
   %2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
   ret <4 x float> %2
 }
 
 define <4 x float> @insert_test2_div_ss(<4 x float> %a, <4 x float> %b) {
-; SSE2-LABEL: insert_test2_div_ss:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    movaps %xmm1, %xmm2
-; SSE2-NEXT:    divps %xmm0, %xmm2
-; SSE2-NEXT:    movss {{.*#+}} xmm1 = xmm2[0],xmm1[1,2,3]
-; SSE2-NEXT:    movaps %xmm1, %xmm0
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test2_div_ss:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    movaps %xmm1, %xmm2
-; SSE41-NEXT:    divps %xmm0, %xmm2
-; SSE41-NEXT:    blendps {{.*#+}} xmm2 = xmm2[0],xmm1[1,2,3]
-; SSE41-NEXT:    movaps %xmm2, %xmm0
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test2_div_ss:
+; SSE:       # %bb.0:
+; SSE-NEXT:    divss %xmm0, %xmm1
+; SSE-NEXT:    movaps %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test2_div_ss:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vdivps %xmm0, %xmm1, %xmm0
-; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT:    vdivss %xmm0, %xmm1, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fdiv <4 x float> %b, %a
   %2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
   ret <4 x float> %2
 }
 
 define <2 x double> @insert_test2_add_sd(<2 x double> %a, <2 x double> %b) {
-; SSE2-LABEL: insert_test2_add_sd:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    addpd %xmm1, %xmm0
-; SSE2-NEXT:    movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
-; SSE2-NEXT:    movapd %xmm1, %xmm0
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test2_add_sd:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    addpd %xmm1, %xmm0
-; SSE41-NEXT:    blendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test2_add_sd:
+; SSE:       # %bb.0:
+; SSE-NEXT:    addsd %xmm0, %xmm1
+; SSE-NEXT:    movapd %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test2_add_sd:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vaddpd %xmm0, %xmm1, %xmm0
-; AVX-NEXT:    vblendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
+; AVX-NEXT:    vaddsd %xmm0, %xmm1, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fadd <2 x double> %b, %a
   %2 = shufflevector <2 x double> %1, <2 x double> %b, <2 x i32> <i32 0, i32 3>
   ret <2 x double> %2
 }
 
 define <2 x double> @insert_test2_sub_sd(<2 x double> %a, <2 x double> %b) {
-; SSE2-LABEL: insert_test2_sub_sd:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    movapd %xmm1, %xmm2
-; SSE2-NEXT:    subpd %xmm0, %xmm2
-; SSE2-NEXT:    movsd {{.*#+}} xmm1 = xmm2[0],xmm1[1]
-; SSE2-NEXT:    movapd %xmm1, %xmm0
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test2_sub_sd:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    movapd %xmm1, %xmm2
-; SSE41-NEXT:    subpd %xmm0, %xmm2
-; SSE41-NEXT:    blendpd {{.*#+}} xmm2 = xmm2[0],xmm1[1]
-; SSE41-NEXT:    movapd %xmm2, %xmm0
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test2_sub_sd:
+; SSE:       # %bb.0:
+; SSE-NEXT:    subsd %xmm0, %xmm1
+; SSE-NEXT:    movapd %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test2_sub_sd:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vsubpd %xmm0, %xmm1, %xmm0
-; AVX-NEXT:    vblendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
+; AVX-NEXT:    vsubsd %xmm0, %xmm1, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fsub <2 x double> %b, %a
   %2 = shufflevector <2 x double> %1, <2 x double> %b, <2 x i32> <i32 0, i32 3>
   ret <2 x double> %2
 }
 
 define <2 x double> @insert_test2_mul_sd(<2 x double> %a, <2 x double> %b) {
-; SSE2-LABEL: insert_test2_mul_sd:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    mulpd %xmm1, %xmm0
-; SSE2-NEXT:    movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
-; SSE2-NEXT:    movapd %xmm1, %xmm0
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test2_mul_sd:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    mulpd %xmm1, %xmm0
-; SSE41-NEXT:    blendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test2_mul_sd:
+; SSE:       # %bb.0:
+; SSE-NEXT:    mulsd %xmm0, %xmm1
+; SSE-NEXT:    movapd %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test2_mul_sd:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vmulpd %xmm0, %xmm1, %xmm0
-; AVX-NEXT:    vblendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
+; AVX-NEXT:    vmulsd %xmm0, %xmm1, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fmul <2 x double> %b, %a
   %2 = shufflevector <2 x double> %1, <2 x double> %b, <2 x i32> <i32 0, i32 3>
   ret <2 x double> %2
 }
 
 define <2 x double> @insert_test2_div_sd(<2 x double> %a, <2 x double> %b) {
-; SSE2-LABEL: insert_test2_div_sd:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    movapd %xmm1, %xmm2
-; SSE2-NEXT:    divpd %xmm0, %xmm2
-; SSE2-NEXT:    movsd {{.*#+}} xmm1 = xmm2[0],xmm1[1]
-; SSE2-NEXT:    movapd %xmm1, %xmm0
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test2_div_sd:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    movapd %xmm1, %xmm2
-; SSE41-NEXT:    divpd %xmm0, %xmm2
-; SSE41-NEXT:    blendpd {{.*#+}} xmm2 = xmm2[0],xmm1[1]
-; SSE41-NEXT:    movapd %xmm2, %xmm0
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test2_div_sd:
+; SSE:       # %bb.0:
+; SSE-NEXT:    divsd %xmm0, %xmm1
+; SSE-NEXT:    movapd %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test2_div_sd:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vdivpd %xmm0, %xmm1, %xmm0
-; AVX-NEXT:    vblendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
+; AVX-NEXT:    vdivsd %xmm0, %xmm1, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fdiv <2 x double> %b, %a
   %2 = shufflevector <2 x double> %1, <2 x double> %b, <2 x i32> <i32 0, i32 3>
   ret <2 x double> %2
 }
 
 define <4 x float> @insert_test3_add_ss(<4 x float> %a, <4 x float> %b) {
-; SSE2-LABEL: insert_test3_add_ss:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    addps %xmm0, %xmm1
-; SSE2-NEXT:    movss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test3_add_ss:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    addps %xmm0, %xmm1
-; SSE41-NEXT:    blendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test3_add_ss:
+; SSE:       # %bb.0:
+; SSE-NEXT:    addss %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test3_add_ss:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vaddps %xmm1, %xmm0, %xmm1
-; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
+; AVX-NEXT:    vaddss %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fadd <4 x float> %a, %b
   %2 = select <4 x i1> <i1 false, i1 true, i1 true, i1 true>, <4 x float> %a, <4 x float> %1
   ret <4 x float> %2
 }
 
 define <4 x float> @insert_test3_sub_ss(<4 x float> %a, <4 x float> %b) {
-; SSE2-LABEL: insert_test3_sub_ss:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    movaps %xmm0, %xmm2
-; SSE2-NEXT:    subps %xmm1, %xmm2
-; SSE2-NEXT:    movss {{.*#+}} xmm0 = xmm2[0],xmm0[1,2,3]
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test3_sub_ss:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    movaps %xmm0, %xmm2
-; SSE41-NEXT:    subps %xmm1, %xmm2
-; SSE41-NEXT:    blendps {{.*#+}} xmm2 = xmm2[0],xmm0[1,2,3]
-; SSE41-NEXT:    movaps %xmm2, %xmm0
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test3_sub_ss:
+; SSE:       # %bb.0:
+; SSE-NEXT:    subss %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test3_sub_ss:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vsubps %xmm1, %xmm0, %xmm1
-; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
+; AVX-NEXT:    vsubss %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fsub <4 x float> %a, %b
   %2 = select <4 x i1> <i1 false, i1 true, i1 true, i1 true>, <4 x float> %a, <4 x float> %1
   ret <4 x float> %2
 }
 
 define <4 x float> @insert_test3_mul_ss(<4 x float> %a, <4 x float> %b) {
-; SSE2-LABEL: insert_test3_mul_ss:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    mulps %xmm0, %xmm1
-; SSE2-NEXT:    movss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test3_mul_ss:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    mulps %xmm0, %xmm1
-; SSE41-NEXT:    blendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test3_mul_ss:
+; SSE:       # %bb.0:
+; SSE-NEXT:    mulss %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test3_mul_ss:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vmulps %xmm1, %xmm0, %xmm1
-; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
+; AVX-NEXT:    vmulss %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fmul <4 x float> %a, %b
   %2 = select <4 x i1> <i1 false, i1 true, i1 true, i1 true>, <4 x float> %a, <4 x float> %1
   ret <4 x float> %2
 }
 
 define <4 x float> @insert_test3_div_ss(<4 x float> %a, <4 x float> %b) {
-; SSE2-LABEL: insert_test3_div_ss:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    movaps %xmm0, %xmm2
-; SSE2-NEXT:    divps %xmm1, %xmm2
-; SSE2-NEXT:    movss {{.*#+}} xmm0 = xmm2[0],xmm0[1,2,3]
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test3_div_ss:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    movaps %xmm0, %xmm2
-; SSE41-NEXT:    divps %xmm1, %xmm2
-; SSE41-NEXT:    blendps {{.*#+}} xmm2 = xmm2[0],xmm0[1,2,3]
-; SSE41-NEXT:    movaps %xmm2, %xmm0
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test3_div_ss:
+; SSE:       # %bb.0:
+; SSE-NEXT:    divss %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test3_div_ss:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vdivps %xmm1, %xmm0, %xmm1
-; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
+; AVX-NEXT:    vdivss %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fdiv <4 x float> %a, %b
   %2 = select <4 x i1> <i1 false, i1 true, i1 true, i1 true>, <4 x float> %a, <4 x float> %1
   ret <4 x float> %2
 }
 
 define <2 x double> @insert_test3_add_sd(<2 x double> %a, <2 x double> %b) {
-; SSE2-LABEL: insert_test3_add_sd:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    addpd %xmm0, %xmm1
-; SSE2-NEXT:    movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test3_add_sd:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    addpd %xmm0, %xmm1
-; SSE41-NEXT:    blendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test3_add_sd:
+; SSE:       # %bb.0:
+; SSE-NEXT:    addsd %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test3_add_sd:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vaddpd %xmm1, %xmm0, %xmm1
-; AVX-NEXT:    vblendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
+; AVX-NEXT:    vaddsd %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fadd <2 x double> %a, %b
   %2 = select <2 x i1> <i1 false, i1 true>, <2 x double> %a, <2 x double> %1
   ret <2 x double> %2
 }
 
 define <2 x double> @insert_test3_sub_sd(<2 x double> %a, <2 x double> %b) {
-; SSE2-LABEL: insert_test3_sub_sd:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    movapd %xmm0, %xmm2
-; SSE2-NEXT:    subpd %xmm1, %xmm2
-; SSE2-NEXT:    movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1]
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test3_sub_sd:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    movapd %xmm0, %xmm2
-; SSE41-NEXT:    subpd %xmm1, %xmm2
-; SSE41-NEXT:    blendpd {{.*#+}} xmm2 = xmm2[0],xmm0[1]
-; SSE41-NEXT:    movapd %xmm2, %xmm0
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test3_sub_sd:
+; SSE:       # %bb.0:
+; SSE-NEXT:    subsd %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test3_sub_sd:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vsubpd %xmm1, %xmm0, %xmm1
-; AVX-NEXT:    vblendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
+; AVX-NEXT:    vsubsd %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fsub <2 x double> %a, %b
   %2 = select <2 x i1> <i1 false, i1 true>, <2 x double> %a, <2 x double> %1
   ret <2 x double> %2
 }
 
 define <2 x double> @insert_test3_mul_sd(<2 x double> %a, <2 x double> %b) {
-; SSE2-LABEL: insert_test3_mul_sd:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    mulpd %xmm0, %xmm1
-; SSE2-NEXT:    movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test3_mul_sd:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    mulpd %xmm0, %xmm1
-; SSE41-NEXT:    blendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test3_mul_sd:
+; SSE:       # %bb.0:
+; SSE-NEXT:    mulsd %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test3_mul_sd:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vmulpd %xmm1, %xmm0, %xmm1
-; AVX-NEXT:    vblendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
+; AVX-NEXT:    vmulsd %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fmul <2 x double> %a, %b
   %2 = select <2 x i1> <i1 false, i1 true>, <2 x double> %a, <2 x double> %1
   ret <2 x double> %2
 }
 
 define <2 x double> @insert_test3_div_sd(<2 x double> %a, <2 x double> %b) {
-; SSE2-LABEL: insert_test3_div_sd:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    movapd %xmm0, %xmm2
-; SSE2-NEXT:    divpd %xmm1, %xmm2
-; SSE2-NEXT:    movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1]
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test3_div_sd:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    movapd %xmm0, %xmm2
-; SSE41-NEXT:    divpd %xmm1, %xmm2
-; SSE41-NEXT:    blendpd {{.*#+}} xmm2 = xmm2[0],xmm0[1]
-; SSE41-NEXT:    movapd %xmm2, %xmm0
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test3_div_sd:
+; SSE:       # %bb.0:
+; SSE-NEXT:    divsd %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test3_div_sd:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vdivpd %xmm1, %xmm0, %xmm1
-; AVX-NEXT:    vblendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
+; AVX-NEXT:    vdivsd %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fdiv <2 x double> %a, %b
   %2 = select <2 x i1> <i1 false, i1 true>, <2 x double> %a, <2 x double> %1
   ret <2 x double> %2
 }
 
 define <4 x float> @insert_test4_add_ss(<4 x float> %a, <4 x float> %b) {
-; SSE2-LABEL: insert_test4_add_ss:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    addps %xmm1, %xmm0
-; SSE2-NEXT:    movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
-; SSE2-NEXT:    movaps %xmm1, %xmm0
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test4_add_ss:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    addps %xmm1, %xmm0
-; SSE41-NEXT:    blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test4_add_ss:
+; SSE:       # %bb.0:
+; SSE-NEXT:    addss %xmm0, %xmm1
+; SSE-NEXT:    movaps %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test4_add_ss:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vaddps %xmm0, %xmm1, %xmm0
-; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT:    vaddss %xmm0, %xmm1, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fadd <4 x float> %b, %a
   %2 = select <4 x i1> <i1 false, i1 true, i1 true, i1 true>, <4 x float> %b, <4 x float> %1
   ret <4 x float> %2
 }
 
 define <4 x float> @insert_test4_sub_ss(<4 x float> %a, <4 x float> %b) {
-; SSE2-LABEL: insert_test4_sub_ss:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    movaps %xmm1, %xmm2
-; SSE2-NEXT:    subps %xmm0, %xmm2
-; SSE2-NEXT:    movss {{.*#+}} xmm1 = xmm2[0],xmm1[1,2,3]
-; SSE2-NEXT:    movaps %xmm1, %xmm0
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test4_sub_ss:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    movaps %xmm1, %xmm2
-; SSE41-NEXT:    subps %xmm0, %xmm2
-; SSE41-NEXT:    blendps {{.*#+}} xmm2 = xmm2[0],xmm1[1,2,3]
-; SSE41-NEXT:    movaps %xmm2, %xmm0
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test4_sub_ss:
+; SSE:       # %bb.0:
+; SSE-NEXT:    subss %xmm0, %xmm1
+; SSE-NEXT:    movaps %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test4_sub_ss:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vsubps %xmm0, %xmm1, %xmm0
-; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT:    vsubss %xmm0, %xmm1, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fsub <4 x float> %b, %a
   %2 = select <4 x i1> <i1 false, i1 true, i1 true, i1 true>, <4 x float> %b, <4 x float> %1
   ret <4 x float> %2
 }
 
 define <4 x float> @insert_test4_mul_ss(<4 x float> %a, <4 x float> %b) {
-; SSE2-LABEL: insert_test4_mul_ss:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    mulps %xmm1, %xmm0
-; SSE2-NEXT:    movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
-; SSE2-NEXT:    movaps %xmm1, %xmm0
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test4_mul_ss:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    mulps %xmm1, %xmm0
-; SSE41-NEXT:    blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test4_mul_ss:
+; SSE:       # %bb.0:
+; SSE-NEXT:    mulss %xmm0, %xmm1
+; SSE-NEXT:    movaps %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test4_mul_ss:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vmulps %xmm0, %xmm1, %xmm0
-; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT:    vmulss %xmm0, %xmm1, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fmul <4 x float> %b, %a
   %2 = select <4 x i1> <i1 false, i1 true, i1 true, i1 true>, <4 x float> %b, <4 x float> %1
   ret <4 x float> %2
 }
 
 define <4 x float> @insert_test4_div_ss(<4 x float> %a, <4 x float> %b) {
-; SSE2-LABEL: insert_test4_div_ss:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    movaps %xmm1, %xmm2
-; SSE2-NEXT:    divps %xmm0, %xmm2
-; SSE2-NEXT:    movss {{.*#+}} xmm1 = xmm2[0],xmm1[1,2,3]
-; SSE2-NEXT:    movaps %xmm1, %xmm0
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test4_div_ss:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    movaps %xmm1, %xmm2
-; SSE41-NEXT:    divps %xmm0, %xmm2
-; SSE41-NEXT:    blendps {{.*#+}} xmm2 = xmm2[0],xmm1[1,2,3]
-; SSE41-NEXT:    movaps %xmm2, %xmm0
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test4_div_ss:
+; SSE:       # %bb.0:
+; SSE-NEXT:    divss %xmm0, %xmm1
+; SSE-NEXT:    movaps %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test4_div_ss:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vdivps %xmm0, %xmm1, %xmm0
-; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT:    vdivss %xmm0, %xmm1, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fdiv <4 x float> %b, %a
   %2 = select <4 x i1> <i1 false, i1 true, i1 true, i1 true>, <4 x float> %b, <4 x float> %1
   ret <4 x float> %2
 }
 
 define <2 x double> @insert_test4_add_sd(<2 x double> %a, <2 x double> %b) {
-; SSE2-LABEL: insert_test4_add_sd:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    addpd %xmm1, %xmm0
-; SSE2-NEXT:    movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
-; SSE2-NEXT:    movapd %xmm1, %xmm0
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test4_add_sd:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    addpd %xmm1, %xmm0
-; SSE41-NEXT:    blendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test4_add_sd:
+; SSE:       # %bb.0:
+; SSE-NEXT:    addsd %xmm0, %xmm1
+; SSE-NEXT:    movapd %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test4_add_sd:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vaddpd %xmm0, %xmm1, %xmm0
-; AVX-NEXT:    vblendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
+; AVX-NEXT:    vaddsd %xmm0, %xmm1, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fadd <2 x double> %b, %a
   %2 = select <2 x i1> <i1 false, i1 true>, <2 x double> %b, <2 x double> %1
   ret <2 x double> %2
 }
 
 define <2 x double> @insert_test4_sub_sd(<2 x double> %a, <2 x double> %b) {
-; SSE2-LABEL: insert_test4_sub_sd:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    movapd %xmm1, %xmm2
-; SSE2-NEXT:    subpd %xmm0, %xmm2
-; SSE2-NEXT:    movsd {{.*#+}} xmm1 = xmm2[0],xmm1[1]
-; SSE2-NEXT:    movapd %xmm1, %xmm0
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test4_sub_sd:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    movapd %xmm1, %xmm2
-; SSE41-NEXT:    subpd %xmm0, %xmm2
-; SSE41-NEXT:    blendpd {{.*#+}} xmm2 = xmm2[0],xmm1[1]
-; SSE41-NEXT:    movapd %xmm2, %xmm0
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test4_sub_sd:
+; SSE:       # %bb.0:
+; SSE-NEXT:    subsd %xmm0, %xmm1
+; SSE-NEXT:    movapd %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test4_sub_sd:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vsubpd %xmm0, %xmm1, %xmm0
-; AVX-NEXT:    vblendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
+; AVX-NEXT:    vsubsd %xmm0, %xmm1, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fsub <2 x double> %b, %a
   %2 = select <2 x i1> <i1 false, i1 true>, <2 x double> %b, <2 x double> %1
   ret <2 x double> %2
 }
 
 define <2 x double> @insert_test4_mul_sd(<2 x double> %a, <2 x double> %b) {
-; SSE2-LABEL: insert_test4_mul_sd:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    mulpd %xmm1, %xmm0
-; SSE2-NEXT:    movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
-; SSE2-NEXT:    movapd %xmm1, %xmm0
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test4_mul_sd:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    mulpd %xmm1, %xmm0
-; SSE41-NEXT:    blendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test4_mul_sd:
+; SSE:       # %bb.0:
+; SSE-NEXT:    mulsd %xmm0, %xmm1
+; SSE-NEXT:    movapd %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test4_mul_sd:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vmulpd %xmm0, %xmm1, %xmm0
-; AVX-NEXT:    vblendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
+; AVX-NEXT:    vmulsd %xmm0, %xmm1, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fmul <2 x double> %b, %a
   %2 = select <2 x i1> <i1 false, i1 true>, <2 x double> %b, <2 x double> %1
   ret <2 x double> %2
 }
 
 define <2 x double> @insert_test4_div_sd(<2 x double> %a, <2 x double> %b) {
-; SSE2-LABEL: insert_test4_div_sd:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    movapd %xmm1, %xmm2
-; SSE2-NEXT:    divpd %xmm0, %xmm2
-; SSE2-NEXT:    movsd {{.*#+}} xmm1 = xmm2[0],xmm1[1]
-; SSE2-NEXT:    movapd %xmm1, %xmm0
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test4_div_sd:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    movapd %xmm1, %xmm2
-; SSE41-NEXT:    divpd %xmm0, %xmm2
-; SSE41-NEXT:    blendpd {{.*#+}} xmm2 = xmm2[0],xmm1[1]
-; SSE41-NEXT:    movapd %xmm2, %xmm0
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test4_div_sd:
+; SSE:       # %bb.0:
+; SSE-NEXT:    divsd %xmm0, %xmm1
+; SSE-NEXT:    movapd %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test4_div_sd:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vdivpd %xmm0, %xmm1, %xmm0
-; AVX-NEXT:    vblendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
+; AVX-NEXT:    vdivsd %xmm0, %xmm1, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fdiv <2 x double> %b, %a
   %2 = select <2 x i1> <i1 false, i1 true>, <2 x double> %b, <2 x double> %1
   ret <2 x double> %2
 }
 
 define <4 x float> @insert_test5_add_ss(<4 x float> %a, <4 x float> %b) {
-; SSE2-LABEL: insert_test5_add_ss:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    addps %xmm0, %xmm1
-; SSE2-NEXT:    movss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test5_add_ss:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    addps %xmm0, %xmm1
-; SSE41-NEXT:    blendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test5_add_ss:
+; SSE:       # %bb.0:
+; SSE-NEXT:    addss %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test5_add_ss:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vaddps %xmm0, %xmm1, %xmm1
-; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
+; AVX-NEXT:    vaddss %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fadd <4 x float> %b, %a
   %2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
   ret <4 x float> %2
 }
 
 define <4 x float> @insert_test5_sub_ss(<4 x float> %a, <4 x float> %b) {
 ; SSE2-LABEL: insert_test5_sub_ss:

 ; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fsub <4 x float> %b, %a
   %2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
   ret <4 x float> %2
 }
 
 define <4 x float> @insert_test5_mul_ss(<4 x float> %a, <4 x float> %b) {
-; SSE2-LABEL: insert_test5_mul_ss:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    mulps %xmm0, %xmm1
-; SSE2-NEXT:    movss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test5_mul_ss:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    mulps %xmm0, %xmm1
-; SSE41-NEXT:    blendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test5_mul_ss:
+; SSE:       # %bb.0:
+; SSE-NEXT:    mulss %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test5_mul_ss:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vmulps %xmm0, %xmm1, %xmm1
-; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
+; AVX-NEXT:    vmulss %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fmul <4 x float> %b, %a
   %2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
   ret <4 x float> %2
 }
 
 define <4 x float> @insert_test5_div_ss(<4 x float> %a, <4 x float> %b) {
 ; SSE2-LABEL: insert_test5_div_ss:

 ; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fdiv <4 x float> %b, %a
   %2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
   ret <4 x float> %2
 }
 
 define <2 x double> @insert_test5_add_sd(<2 x double> %a, <2 x double> %b) {
-; SSE2-LABEL: insert_test5_add_sd:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    addpd %xmm0, %xmm1
-; SSE2-NEXT:    movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test5_add_sd:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    addpd %xmm0, %xmm1
-; SSE41-NEXT:    blendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test5_add_sd:
+; SSE:       # %bb.0:
+; SSE-NEXT:    addsd %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test5_add_sd:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vaddpd %xmm0, %xmm1, %xmm1
-; AVX-NEXT:    vblendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
+; AVX-NEXT:    vaddsd %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fadd <2 x double> %b, %a
   %2 = shufflevector <2 x double> %1, <2 x double> %a, <2 x i32> <i32 0, i32 3>
   ret <2 x double> %2
 }
 
 define <2 x double> @insert_test5_sub_sd(<2 x double> %a, <2 x double> %b) {
 ; SSE2-LABEL: insert_test5_sub_sd:

 ; AVX-NEXT:    vblendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fsub <2 x double> %b, %a
   %2 = shufflevector <2 x double> %1, <2 x double> %a, <2 x i32> <i32 0, i32 3>
   ret <2 x double> %2
 }
 
 define <2 x double> @insert_test5_mul_sd(<2 x double> %a, <2 x double> %b) {
-; SSE2-LABEL: insert_test5_mul_sd:
-; SSE2:       # %bb.0:
-; SSE2-NEXT:    mulpd %xmm0, %xmm1
-; SSE2-NEXT:    movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
-; SSE2-NEXT:    ret{{[l|q]}}
-;
-; SSE41-LABEL: insert_test5_mul_sd:
-; SSE41:       # %bb.0:
-; SSE41-NEXT:    mulpd %xmm0, %xmm1
-; SSE41-NEXT:    blendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
-; SSE41-NEXT:    ret{{[l|q]}}
+; SSE-LABEL: insert_test5_mul_sd:
+; SSE:       # %bb.0:
+; SSE-NEXT:    mulsd %xmm1, %xmm0
+; SSE-NEXT:    ret{{[l|q]}}
 ;
 ; AVX-LABEL: insert_test5_mul_sd:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vmulpd %xmm0, %xmm1, %xmm1
-; AVX-NEXT:    vblendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
+; AVX-NEXT:    vmulsd %xmm1, %xmm0, %xmm0
 ; AVX-NEXT:    ret{{[l|q]}}
   %1 = fmul <2 x double> %b, %a
   %2 = shufflevector <2 x double> %1, <2 x double> %a, <2 x i32> <i32 0, i32 3>
   ret <2 x double> %2
 }
 
 define <2 x double> @insert_test5_div_sd(<2 x double> %a, <2 x double> %b) {
 ; SSE2-LABEL: insert_test5_div_sd: