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Differential D48992

[WebAssembly] Add missing _S opcodes of atomic stores to InstPrinter
ClosedPublic

Authored by aheejin on Jul 5 2018, 12:55 PM.

Details

Reviewers
aardappel
Commits
rG80d9f1708f78: [WebAssembly] Add missing _S opcodes of atomic stores to InstPrinter
rL336390: [WebAssembly] Add missing _S opcodes of atomic stores to InstPrinter
Summary

This was missing in D48839 (rL336145).

Diff Detail

Repository
rL LLVM

Event Timeline

aheejin created this revision.Jul 5 2018, 12:55 PM
Herald added subscribers: llvm-commits, sunfish, jgravelle-google and 2 others. · View Herald TranscriptJul 5 2018, 12:55 PM
Harbormaster completed remote builds in B20073: Diff 154295.Jul 5 2018, 12:56 PM
aardappel accepted this revision.Jul 5 2018, 1:07 PM

Ah yes, I added these too in my WiP.

This revision is now accepted and ready to land.Jul 5 2018, 1:07 PM
Closed by commit rL336390: [WebAssembly] Add missing _S opcodes of atomic stores to InstPrinter (authored by aheejin). · Explain WhyJul 5 2018, 2:32 PM
This revision was automatically updated to reflect the committed changes.
aheejin mentioned this in D48985: [WebAssembly] Converted to stack based instructions in MC..Jul 5 2018, 8:00 PM
aheejin mentioned this in D49160: [WebAssembly] Added default stack-only instruction mode for MC..Jul 16 2018, 2:58 PM

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
WebAssembly/
MCTargetDesc/
7 lines

Diff 154317

llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h

Show First 20 Lines • Show All 119 Lines • ▼ Show 20 Linesinline unsigned GetDefaultP2Align(unsigned Opcode) {
case WebAssembly::ATOMIC_LOAD8_U_I32_S: case WebAssembly::ATOMIC_LOAD8_U_I32_S:
case WebAssembly::ATOMIC_LOAD8_U_I64: case WebAssembly::ATOMIC_LOAD8_U_I64:
case WebAssembly::ATOMIC_LOAD8_U_I64_S: case WebAssembly::ATOMIC_LOAD8_U_I64_S:
case WebAssembly::STORE8_I32: case WebAssembly::STORE8_I32:
case WebAssembly::STORE8_I32_S: case WebAssembly::STORE8_I32_S:
case WebAssembly::STORE8_I64: case WebAssembly::STORE8_I64:
case WebAssembly::STORE8_I64_S: case WebAssembly::STORE8_I64_S:
case WebAssembly::ATOMIC_STORE8_I32: case WebAssembly::ATOMIC_STORE8_I32:
case WebAssembly::ATOMIC_STORE8_I32_S:
case WebAssembly::ATOMIC_STORE8_I64: case WebAssembly::ATOMIC_STORE8_I64:
case WebAssembly::ATOMIC_STORE8_I64_S:
return 0; return 0;
case WebAssembly::LOAD16_S_I32: case WebAssembly::LOAD16_S_I32:
case WebAssembly::LOAD16_S_I32_S: case WebAssembly::LOAD16_S_I32_S:
case WebAssembly::LOAD16_U_I32: case WebAssembly::LOAD16_U_I32:
case WebAssembly::LOAD16_U_I32_S: case WebAssembly::LOAD16_U_I32_S:
case WebAssembly::LOAD16_S_I64: case WebAssembly::LOAD16_S_I64:
case WebAssembly::LOAD16_S_I64_S: case WebAssembly::LOAD16_S_I64_S:
case WebAssembly::LOAD16_U_I64: case WebAssembly::LOAD16_U_I64:
case WebAssembly::LOAD16_U_I64_S: case WebAssembly::LOAD16_U_I64_S:
case WebAssembly::ATOMIC_LOAD16_U_I32: case WebAssembly::ATOMIC_LOAD16_U_I32:
case WebAssembly::ATOMIC_LOAD16_U_I32_S: case WebAssembly::ATOMIC_LOAD16_U_I32_S:
case WebAssembly::ATOMIC_LOAD16_U_I64: case WebAssembly::ATOMIC_LOAD16_U_I64:
case WebAssembly::ATOMIC_LOAD16_U_I64_S: case WebAssembly::ATOMIC_LOAD16_U_I64_S:
case WebAssembly::STORE16_I32: case WebAssembly::STORE16_I32:
case WebAssembly::STORE16_I32_S: case WebAssembly::STORE16_I32_S:
case WebAssembly::STORE16_I64: case WebAssembly::STORE16_I64:
case WebAssembly::STORE16_I64_S: case WebAssembly::STORE16_I64_S:
case WebAssembly::ATOMIC_STORE16_I32: case WebAssembly::ATOMIC_STORE16_I32:
case WebAssembly::ATOMIC_STORE16_I32_S:
case WebAssembly::ATOMIC_STORE16_I64: case WebAssembly::ATOMIC_STORE16_I64:
case WebAssembly::ATOMIC_STORE16_I64_S:
return 1; return 1;
case WebAssembly::LOAD_I32: case WebAssembly::LOAD_I32:
case WebAssembly::LOAD_I32_S: case WebAssembly::LOAD_I32_S:
case WebAssembly::LOAD_F32: case WebAssembly::LOAD_F32:
case WebAssembly::LOAD_F32_S: case WebAssembly::LOAD_F32_S:
case WebAssembly::STORE_I32: case WebAssembly::STORE_I32:
case WebAssembly::STORE_I32_S: case WebAssembly::STORE_I32_S:
case WebAssembly::STORE_F32: case WebAssembly::STORE_F32:
case WebAssembly::STORE_F32_S: case WebAssembly::STORE_F32_S:
case WebAssembly::LOAD32_S_I64: case WebAssembly::LOAD32_S_I64:
case WebAssembly::LOAD32_S_I64_S: case WebAssembly::LOAD32_S_I64_S:
case WebAssembly::LOAD32_U_I64: case WebAssembly::LOAD32_U_I64:
case WebAssembly::LOAD32_U_I64_S: case WebAssembly::LOAD32_U_I64_S:
case WebAssembly::STORE32_I64: case WebAssembly::STORE32_I64:
case WebAssembly::STORE32_I64_S: case WebAssembly::STORE32_I64_S:
case WebAssembly::ATOMIC_LOAD_I32: case WebAssembly::ATOMIC_LOAD_I32:
case WebAssembly::ATOMIC_LOAD_I32_S: case WebAssembly::ATOMIC_LOAD_I32_S:
case WebAssembly::ATOMIC_LOAD32_U_I64: case WebAssembly::ATOMIC_LOAD32_U_I64:
case WebAssembly::ATOMIC_LOAD32_U_I64_S: case WebAssembly::ATOMIC_LOAD32_U_I64_S:
case WebAssembly::ATOMIC_STORE_I32: case WebAssembly::ATOMIC_STORE_I32:
case WebAssembly::ATOMIC_STORE_I32_S:
case WebAssembly::ATOMIC_STORE32_I64: case WebAssembly::ATOMIC_STORE32_I64:
case WebAssembly::ATOMIC_STORE32_I64_S:
return 2; return 2;
case WebAssembly::LOAD_I64: case WebAssembly::LOAD_I64:
case WebAssembly::LOAD_I64_S: case WebAssembly::LOAD_I64_S:
case WebAssembly::LOAD_F64: case WebAssembly::LOAD_F64:
case WebAssembly::LOAD_F64_S: case WebAssembly::LOAD_F64_S:
case WebAssembly::STORE_I64: case WebAssembly::STORE_I64:
case WebAssembly::STORE_I64_S: case WebAssembly::STORE_I64_S:
case WebAssembly::STORE_F64: case WebAssembly::STORE_F64:
case WebAssembly::STORE_F64_S: case WebAssembly::STORE_F64_S:
case WebAssembly::ATOMIC_LOAD_I64: case WebAssembly::ATOMIC_LOAD_I64:
case WebAssembly::ATOMIC_LOAD_I64_S: case WebAssembly::ATOMIC_LOAD_I64_S:
case WebAssembly::ATOMIC_STORE_I64: case WebAssembly::ATOMIC_STORE_I64:
case WebAssembly::ATOMIC_STORE_I64_S:
return 3; return 3;
default: default:
llvm_unreachable("Only loads and stores have p2align values"); llvm_unreachable("Only loads and stores have p2align values");
} }
} }
/// The operand number of the load or store address in load/store instructions. /// The operand number of the load or store address in load/store instructions.
static const unsigned LoadAddressOperandNo = 3; static const unsigned LoadAddressOperandNo = 3;
Show All 33 Lines