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[llvm-exegesis] ExegisX86Target::setRegToConstant() should depend on the subtarget features.
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Authored by courbet on Jul 2 2018, 1:02 AM.

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courbet created this revision.Jul 2 2018, 1:02 AM
RKSimon added inline comments.Jul 2 2018, 2:40 AM
tools/llvm-exegesis/lib/X86/Target.cpp
145–158

I think MMX instructions are working but we're missing VR64 handling - is that a problem?

courbet updated this revision to Diff 153693.Jul 2 2018, 4:04 AM
  • implement MMX registers
  • Fix opcode
courbet marked an inline comment as done.Jul 2 2018, 4:14 AM
courbet added inline comments.
tools/llvm-exegesis/lib/X86/Target.cpp
145–158

Not really: they still work, it's just that we do not generate the "initialization code" for them. While I'm at it, I've implemented them :)

RKSimon added inline comments.Jul 2 2018, 6:23 AM
tools/llvm-exegesis/lib/X86/Target.cpp
151

Isn't VMOVDQU16Zrm BWI only?

courbet updated this revision to Diff 153715.Jul 2 2018, 7:46 AM
courbet marked an inline comment as done.

Fix mnemonic for AVX512.

tools/llvm-exegesis/lib/X86/Target.cpp
151

Thanks for the catch: I mixed up the size of the scalars and the size of the vector register :( I meant VMOVDQU32Z128rm: move 32-*bit* scalars into a 16-*byte* vector register :(

RKSimon accepted this revision.Jul 2 2018, 9:54 AM

LGTM with one minor

unittests/tools/llvm-exegesis/X86/TargetTest.cpp
93

Please can you YMM and ZMM tests as well.

This revision is now accepted and ready to land.Jul 2 2018, 9:54 AM
courbet updated this revision to Diff 153857.Jul 2 2018, 11:21 PM

add YMM/ZMM tests.

courbet marked an inline comment as done.Jul 2 2018, 11:21 PM

Thanks !

This revision was automatically updated to reflect the committed changes.