[WebAssembly] Convert remaining tests from elf to wasm output

[sbc100]

Please take a close look. I'm not sure about negative-base-reg.ll in particular

[aardappel]

test/CodeGen/WebAssembly/negative-base-reg.ll

13 ↗

(On Diff #153410)

ah, what probably happens is that this is followed by a "get_local 0" now, which this test ignores. Maybe make it into 2 CHECK-NEXT instead?

13 ↗

(On Diff #153410)

I meant "set_local 0, $pop"

test/CodeGen/WebAssembly/offset-fastisel.ll

19 ↗

(On Diff #153410)

same here, makes these CHECK-NEXT to ensure we're not missing things.

[sbc100]

• feedback

test/CodeGen/WebAssembly/offset-fastisel.ll

19 ↗

(On Diff #153410)

But don't the register names mean that even if there are instructions inbetween we are still OK? Maybe with the change you are proposing we will require more NEXTs? but i'm not sure if I should add them here are part of this change.

[aardappel]

test/CodeGen/WebAssembly/offset-fastisel.ll

19 ↗

(On Diff #153410)

Yes, fine either way, as I'll have to go thru these anyway.

llvm/trunk/test/CodeGen/WebAssembly/negative-base-reg.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt | FileCheck %s
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
-target triple = "wasm32---elf"
+target triple = "wasm32-unknown-unknown"
 
 @args = hidden local_unnamed_addr global [32 x i32] zeroinitializer, align 16
 
 ; Function Attrs: norecurse nounwind
 define hidden i32 @main() local_unnamed_addr #0 {
 
 ; If LSR stops selecting a negative base reg value, then this test will no
 ; longer be useful as written.
-; CHECK: i32.const $0=, -128
+; CHECK:      i32.const $push[[L0:[0-9]+]]=, -128
+; CHECK-NEXT: set_local 0, $pop[[L0]]
 entry:
   br label %for.body
 
 for.body:                                         ; preds = %for.body, %entry
   %i.04 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
 ; The offset should not be folded into the store.
 ; CHECK: i32.const $push{{[0-9]+}}=, args+128
-; CHECK: i32.add
-; CHECK: i32.store 0(
+; CHECK: i32.add   $push[[L1:[0-9]+]]=,
+; CHECK: i32.store 0($pop[[L1]])
   %arrayidx = getelementptr inbounds [32 x i32], [32 x i32]* @args, i32 0, i32 %i.04
   store i32 1, i32* %arrayidx, align 4, !tbaa !1
   %inc = add nuw nsw i32 %i.04, 1
   %exitcond = icmp eq i32 %inc, 32
   br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !5
 
 for.end:                                          ; preds = %for.body
   ret i32 0

llvm/trunk/test/CodeGen/WebAssembly/offset-fastisel.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-explicit-locals -fast-isel -fast-isel-abort=1 | FileCheck %s
 
 ; TODO: Merge this with offset.ll when fast-isel matches better.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
-target triple = "wasm32-unknown-unknown-elf"
+target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: store_i8_with_variable_gep_offset:
 ; CHECK: i32.add    $push[[L0:[0-9]+]]=, $0, $1{{$}}
 ; CHECK: i32.const  $push[[L1:[0-9]+]]=, 0{{$}}
 ; CHECK: i32.store8 0($pop[[L0]]), $pop[[L1]]{{$}}
 define void @store_i8_with_variable_gep_offset(i8* %p, i32 %idx) {
   %s = getelementptr inbounds i8, i8* %p, i32 %idx
   store i8 0, i8* %s
   ret void
 }
 
 ; CHECK-LABEL: store_i8_with_array_alloca_gep:
-; CHECK: i32.const   $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK: i32.load    $push[[L1:[0-9]+]]=, __stack_pointer($pop[[L0]]){{$}}
-; CHECK: i32.const   $push[[L2:[0-9]+]]=, 32{{$}}
-; CHECK: i32.sub     $push{{[0-9]+}}=, $pop[[L1]], $pop[[L2]]{{$}}
-; CHECK: i32.add     $push[[L4:[0-9]+]]=, $pop{{[0-9]+}}, $0{{$}}
+; CHECK: get_global  $push[[L0:[0-9]+]]=, __stack_pointer
+; CHECK: i32.const   $push[[L1:[0-9]+]]=, 32{{$}}
+; CHECK: i32.sub     $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
+; CHECK: copy_local  $push[[L3:[0-9]+]]=, $pop[[L2]]
+; CHECK: i32.add     $push[[L4:[0-9]+]]=, $pop[[L3]], $0{{$}}
 ; CHECK: i32.const   $push[[L5:[0-9]+]]=, 0{{$}}
 ; CHECK: i32.store8  0($pop[[L4]]), $pop[[L5]]{{$}}
 define hidden void @store_i8_with_array_alloca_gep(i32 %idx) {
   %A = alloca [30 x i8], align 16
   %s = getelementptr inbounds [30 x i8], [30 x i8]* %A, i32 0, i32 %idx
   store i8 0, i8* %s, align 1
   ret void
 }

llvm/trunk/test/CodeGen/WebAssembly/vector-sdiv.ll

 ; RUN: llc < %s -asm-verbose=false -fast-isel=false -disable-wasm-fallthrough-return-opt | FileCheck %s
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
-target triple = "wasm32-unknown-unknown-elf"
+target triple = "wasm32-unknown-unknown"
 
 ; This should be treated as a non-splat vector of pow2 divisor, so sdivs will be
 ; transformed to shrs in DAGCombiner. There will be 4 stores and 3 shrs (For '1'
 ; entry we don't need a shr).
 
 ; CHECK-LABEL: vector_sdiv:
 ; CHECK-DAG:  i32.store
 ; CHECK-DAG:  i32.shr_u