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[AMDGPU] setcc (select cc, CT, CF), CF, eq | ne -> xor cc, -1 | cc
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Authored by rampitec on Jun 15 2018, 3:44 PM.

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Summary

This is the common case in the BE when we serialize condition and then rematerialize it. Use either original or inverted condition.

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rL LLVM

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rampitec created this revision.Jun 15 2018, 3:44 PM
This revision is now accepted and ready to land.Jun 15 2018, 5:10 PM
This revision was automatically updated to reflect the committed changes.
arsenm added inline comments.Jun 17 2018, 12:32 AM
llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
7493

Don't these combines exist in DAGCombiner already?

rampitec added inline comments.Jun 17 2018, 12:45 AM
llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
7493

sext part? I did not check, I have just indented existing code here. Although I doubt. The target specific part here is call to isBoolSGPR for both sext and select part.