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Differential D48079

[X86] Add sched class WriteLAHFSAHF and fix values.
ClosedPublic

Authored by courbet on Jun 12 2018, 8:28 AM.

Details

Reviewers
RKSimon
craig.topper
andreadb
Commits
rG7b9913fb9f08: [X86] Add sched class WriteLAHFSAHF and fix values.
rL335097: [X86] Add sched class WriteLAHFSAHF and fix values.
Summary

I ran llvm-exegesis on SKX, SKL, BDW, HSW, SNB.
Atom is from Agner and SLM is a guess.
I've left AMD processors alone.

Diff Detail

Event Timeline

courbet created this revision.Jun 12 2018, 8:28 AM
Harbormaster completed remote builds in B19230: Diff 150949.Jun 12 2018, 8:28 AM
RKSimon added a comment.Jun 18 2018, 12:53 PM

Please can you LAHF/SAHF tests to the resources-x86_64.s llvm-mca test files

@craig.topper Any comments? You added the TODOs to the models IIRC.

courbet updated this revision to Diff 151859.Jun 19 2018, 12:52 AM

Add mca tests.

Herald added a reviewer: andreadb. · View Herald TranscriptJun 19 2018, 12:52 AM
Herald added a subscriber: gbedwell. · View Herald Transcript
Harbormaster completed remote builds in B19455: Diff 151859.Jun 19 2018, 12:53 AM
RKSimon added inline comments.Jun 19 2018, 8:37 AM
test/tools/llvm-mca/X86/BtVer2/partial-reg-update-2.s
1

revert this? @gbedwell any idea why this got inserted?

gbedwell added inline comments.Jun 19 2018, 9:03 AM
test/tools/llvm-mca/X86/BtVer2/partial-reg-update-2.s
1

Merely because I regenerated all tests using a wildcard. It's regenerated the checks which happen to be identical to the previous manually inserted checks. I can revert, but we should probably re-add this line in a separate commit just to reduce noise from wildcard regenerating tests.

RKSimon added inline comments.Jun 19 2018, 9:16 AM
test/tools/llvm-mca/X86/BtVer2/partial-reg-update-2.s
1

Something I didn't realise - Andrea's commit yesterday already added this line - @courbet if you rebase then this diff should just go away.....

gbedwell added inline comments.Jun 19 2018, 9:32 AM
test/tools/llvm-mca/X86/BtVer2/partial-reg-update-2.s
1

Aha. I thought I was replying to a different review (hence why I wrote "I regenerated") as I have exactly the same diff in D48276 :)

craig.topper added a comment.Jun 19 2018, 10:02 AM

This change seems fine to me.

RKSimon accepted this revision.Jun 19 2018, 10:53 AM

LGTM - after ensuring that the partial-reg-update-2.s diff is gone - thanks everyone.

This revision is now accepted and ready to land.Jun 19 2018, 10:53 AM
courbet marked an inline comment as done.Jun 19 2018, 11:16 PM

Thanks !

courbet updated this revision to Diff 152024.Jun 19 2018, 11:17 PM

rebase

Closed by commit rL335097: [X86] Add sched class WriteLAHFSAHF and fix values. (authored by courbet). · Explain WhyJun 19 2018, 11:18 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
lib/
Target/
X86/
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test/
CodeGen/
X86/
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tools/
llvm-mca/
X86/
Atom/
10 lines
Broadwell/
10 lines
BtVer2/
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Generic/
4 lines
Haswell/
10 lines
SLM/
10 lines
SandyBridge/
10 lines
SkylakeClient/
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SkylakeServer/
10 lines
Znver1/
10 lines

Diff 151859

lib/Target/X86/X86InstrInfo.td

Show First 20 Lines • Show All 193 Lines • ▼ Show 20 Linesdef X86callseq_end :
SDNode<"ISD::CALLSEQ_END", SDT_X86CallSeqEnd, SDNode<"ISD::CALLSEQ_END", SDT_X86CallSeqEnd,
[SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>; [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>;
def X86call : SDNode<"X86ISD::CALL", SDT_X86Call, def X86call : SDNode<"X86ISD::CALL", SDT_X86Call,
[SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
SDNPVariadic]>; SDNPVariadic]>;
def X86NoTrackCall : SDNode<"X86ISD::NT_CALL", SDT_X86Call, def X86NoTrackCall : SDNode<"X86ISD::NT_CALL", SDT_X86Call,
[SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
SDNPVariadic]>; SDNPVariadic]>;
def X86NoTrackBrind : SDNode<"X86ISD::NT_BRIND", SDT_X86NtBrind, def X86NoTrackBrind : SDNode<"X86ISD::NT_BRIND", SDT_X86NtBrind,
[SDNPHasChain]>; [SDNPHasChain]>;
def X86rep_stos: SDNode<"X86ISD::REP_STOS", SDTX86RepStr, def X86rep_stos: SDNode<"X86ISD::REP_STOS", SDTX86RepStr,
[SDNPHasChain, SDNPInGlue, SDNPOutGlue, SDNPMayStore]>; [SDNPHasChain, SDNPInGlue, SDNPOutGlue, SDNPMayStore]>;
def X86rep_movs: SDNode<"X86ISD::REP_MOVS", SDTX86RepStr, def X86rep_movs: SDNode<"X86ISD::REP_MOVS", SDTX86RepStr,
[SDNPHasChain, SDNPInGlue, SDNPOutGlue, SDNPMayStore, [SDNPHasChain, SDNPInGlue, SDNPOutGlue, SDNPMayStore,
SDNPMayLoad]>; SDNPMayLoad]>;
▲ Show 20 Lines • Show All 971 Lines • ▼ Show 20 Lineslet isBarrier = 1, hasSideEffects = 1, usesCustomInserter = 1,
SchedRW = [WriteSystem] in SchedRW = [WriteSystem] in
def Int_eh_sjlj_setup_dispatch def Int_eh_sjlj_setup_dispatch
: PseudoI<(outs), (ins), [(X86eh_sjlj_setup_dispatch)]>; : PseudoI<(outs), (ins), [(X86eh_sjlj_setup_dispatch)]>;
let Defs = [ESP], Uses = [ESP], hasSideEffects=0 in { let Defs = [ESP], Uses = [ESP], hasSideEffects=0 in {
let mayLoad = 1, SchedRW = [WriteLoad] in { let mayLoad = 1, SchedRW = [WriteLoad] in {
def POP16r : I<0x58, AddRegFrm, (outs GR16:$reg), (ins), "pop{w}\t$reg", []>, def POP16r : I<0x58, AddRegFrm, (outs GR16:$reg), (ins), "pop{w}\t$reg", []>,
OpSize16; OpSize16;
def POP32r : I<0x58, AddRegFrm, (outs GR32:$reg), (ins), "pop{l}\t$reg", []>, def POP32r : I<0x58, AddRegFrm, (outs GR32:$reg), (ins), "pop{l}\t$reg", []>,
OpSize32, Requires<[Not64BitMode]>; OpSize32, Requires<[Not64BitMode]>;
// Long form for the disassembler. // Long form for the disassembler.
let isCodeGenOnly = 1, ForceDisassemble = 1 in { let isCodeGenOnly = 1, ForceDisassemble = 1 in {
def POP16rmr: I<0x8F, MRM0r, (outs GR16:$reg), (ins), "pop{w}\t$reg", []>, def POP16rmr: I<0x8F, MRM0r, (outs GR16:$reg), (ins), "pop{w}\t$reg", []>,
OpSize16, NotMemoryFoldable; OpSize16, NotMemoryFoldable;
def POP32rmr: I<0x8F, MRM0r, (outs GR32:$reg), (ins), "pop{l}\t$reg", []>, def POP32rmr: I<0x8F, MRM0r, (outs GR32:$reg), (ins), "pop{l}\t$reg", []>,
OpSize32, Requires<[Not64BitMode]>, NotMemoryFoldable; OpSize32, Requires<[Not64BitMode]>, NotMemoryFoldable;
} // isCodeGenOnly = 1, ForceDisassemble = 1 } // isCodeGenOnly = 1, ForceDisassemble = 1
▲ Show 20 Lines • Show All 518 Lines • ▼ Show 20 Lines
def MOV8rm_NOREX : I<0x8A, MRMSrcMem, def MOV8rm_NOREX : I<0x8A, MRMSrcMem,
(outs GR8_NOREX:$dst), (ins i8mem_NOREX:$src), (outs GR8_NOREX:$dst), (ins i8mem_NOREX:$src),
"mov{b}\t{$src, $dst|$dst, $src}", []>, "mov{b}\t{$src, $dst|$dst, $src}", []>,
Sched<[WriteLoad]>; Sched<[WriteLoad]>;
} }
// Condition code ops, incl. set if equal/not equal/... // Condition code ops, incl. set if equal/not equal/...
let SchedRW = [WriteALU] in { let SchedRW = [WriteLAHFSAHF] in {
let Defs = [EFLAGS], Uses = [AH] in let Defs = [EFLAGS], Uses = [AH] in
def SAHF : I<0x9E, RawFrm, (outs), (ins), "sahf", def SAHF : I<0x9E, RawFrm, (outs), (ins), "sahf",
[(set EFLAGS, (X86sahf AH))]>, [(set EFLAGS, (X86sahf AH))]>,
Requires<[HasLAHFSAHF]>; Requires<[HasLAHFSAHF]>;
let Defs = [AH], Uses = [EFLAGS], hasSideEffects = 0 in let Defs = [AH], Uses = [EFLAGS], hasSideEffects = 0 in
def LAHF : I<0x9F, RawFrm, (outs), (ins), "lahf", []>, // AH = flags def LAHF : I<0x9F, RawFrm, (outs), (ins), "lahf", []>, // AH = flags
Requires<[HasLAHFSAHF]>; Requires<[HasLAHFSAHF]>;
} // SchedRW } // SchedRW
▲ Show 20 Lines • Show All 1,755 Lines • Show Last 20 Lines

lib/Target/X86/X86SchedBroadwell.td

Show First 20 Lines • Show All 128 Lines • ▼ Show 20 Lines
defm : BWWriteResPair<WriteCMOV2, [BWPort06,BWPort0156], 2, [1,1], 2>; // // Conditional (CF + ZF flag) move. defm : BWWriteResPair<WriteCMOV2, [BWPort06,BWPort0156], 2, [1,1], 2>; // // Conditional (CF + ZF flag) move.
defm : X86WriteRes<WriteFCMOV, [BWPort1], 3, [1], 1>; // x87 conditional move. defm : X86WriteRes<WriteFCMOV, [BWPort1], 3, [1], 1>; // x87 conditional move.
def : WriteRes<WriteSETCC, [BWPort06]>; // Setcc. def : WriteRes<WriteSETCC, [BWPort06]>; // Setcc.
def : WriteRes<WriteSETCCStore, [BWPort06,BWPort4,BWPort237]> { def : WriteRes<WriteSETCCStore, [BWPort06,BWPort4,BWPort237]> {
let Latency = 2; let Latency = 2;
let NumMicroOps = 3; let NumMicroOps = 3;
} }
def : WriteRes<WriteLAHFSAHF, [BWPort06]>;
// Bit counts. // Bit counts.
defm : BWWriteResPair<WriteBitScan, [BWPort1], 3>; defm : BWWriteResPair<WriteBitScan, [BWPort1], 3>;
defm : BWWriteResPair<WriteLZCNT, [BWPort1], 3>; defm : BWWriteResPair<WriteLZCNT, [BWPort1], 3>;
defm : BWWriteResPair<WriteTZCNT, [BWPort1], 3>; defm : BWWriteResPair<WriteTZCNT, [BWPort1], 3>;
defm : BWWriteResPair<WritePOPCNT, [BWPort1], 3>; defm : BWWriteResPair<WritePOPCNT, [BWPort1], 3>;
// Integer shifts and rotates. // Integer shifts and rotates.
▲ Show 20 Lines • Show All 474 Lines • ▼ Show 20 Lines
} }
def: InstRW<[BWWriteResGroup8], (instregex "VPBLENDD(Y?)rri")>; def: InstRW<[BWWriteResGroup8], (instregex "VPBLENDD(Y?)rri")>;
def BWWriteResGroup9 : SchedWriteRes<[BWPort0156]> { def BWWriteResGroup9 : SchedWriteRes<[BWPort0156]> {
let Latency = 1; let Latency = 1;
let NumMicroOps = 1; let NumMicroOps = 1;
let ResourceCycles = [1]; let ResourceCycles = [1];
} }
def: InstRW<[BWWriteResGroup9], (instrs LAHF, SAHF)>; // TODO: This doesnt match Agner's data
def: InstRW<[BWWriteResGroup9], (instregex "SGDT64m", def: InstRW<[BWWriteResGroup9], (instregex "SGDT64m",
"SIDT64m", "SIDT64m",
"SMSW16m", "SMSW16m",
"STRm", "STRm",
"SYSCALL")>; "SYSCALL")>;
def BWWriteResGroup10 : SchedWriteRes<[BWPort4,BWPort237]> { def BWWriteResGroup10 : SchedWriteRes<[BWPort4,BWPort237]> {
let Latency = 1; let Latency = 1;
▲ Show 20 Lines • Show All 1,095 Lines • Show Last 20 Lines

lib/Target/X86/X86SchedHaswell.td

Show First 20 Lines • Show All 129 Lines • ▼ Show 20 Lines
defm : HWWriteResPair<WriteCMOV, [HWPort06,HWPort0156], 2, [1,1], 2>; // Conditional move. defm : HWWriteResPair<WriteCMOV, [HWPort06,HWPort0156], 2, [1,1], 2>; // Conditional move.
defm : HWWriteResPair<WriteCMOV2, [HWPort06,HWPort0156], 3, [1,2], 3>; // Conditional (CF + ZF flag) move. defm : HWWriteResPair<WriteCMOV2, [HWPort06,HWPort0156], 3, [1,2], 3>; // Conditional (CF + ZF flag) move.
defm : X86WriteRes<WriteFCMOV, [HWPort1], 3, [1], 1>; // x87 conditional move. defm : X86WriteRes<WriteFCMOV, [HWPort1], 3, [1], 1>; // x87 conditional move.
def : WriteRes<WriteSETCC, [HWPort06]>; // Setcc. def : WriteRes<WriteSETCC, [HWPort06]>; // Setcc.
def : WriteRes<WriteSETCCStore, [HWPort06,HWPort4,HWPort237]> { def : WriteRes<WriteSETCCStore, [HWPort06,HWPort4,HWPort237]> {
let Latency = 2; let Latency = 2;
let NumMicroOps = 3; let NumMicroOps = 3;
} }
def : WriteRes<WriteLAHFSAHF, [HWPort06]>;
// This is for simple LEAs with one or two input operands. // This is for simple LEAs with one or two input operands.
// The complex ones can only execute on port 1, and they require two cycles on // The complex ones can only execute on port 1, and they require two cycles on
// the port to read all inputs. We don't model that. // the port to read all inputs. We don't model that.
def : WriteRes<WriteLEA, [HWPort15]>; def : WriteRes<WriteLEA, [HWPort15]>;
// Bit counts. // Bit counts.
defm : HWWriteResPair<WriteBitScan, [HWPort1], 3>; defm : HWWriteResPair<WriteBitScan, [HWPort1], 3>;
▲ Show 20 Lines • Show All 761 Lines • ▼ Show 20 Lines
def HWWriteResGroup10 : SchedWriteRes<[HWPort0156]> { def HWWriteResGroup10 : SchedWriteRes<[HWPort0156]> {
let Latency = 1; let Latency = 1;
let NumMicroOps = 1; let NumMicroOps = 1;
let ResourceCycles = [1]; let ResourceCycles = [1];
} }
def: InstRW<[HWWriteResGroup10], (instrs CBW, CWDE, CDQE, def: InstRW<[HWWriteResGroup10], (instrs CBW, CWDE, CDQE,
CMC, STC)>; CMC, STC)>;
def: InstRW<[HWWriteResGroup10], (instrs LAHF, SAHF)>; // TODO: This doesn't match Agner's data
def: InstRW<[HWWriteResGroup10], (instregex "SGDT64m", def: InstRW<[HWWriteResGroup10], (instregex "SGDT64m",
"SIDT64m", "SIDT64m",
"SMSW16m", "SMSW16m",
"STRm", "STRm",
"SYSCALL")>; "SYSCALL")>;
def HWWriteResGroup11 : SchedWriteRes<[HWPort0,HWPort23]> { def HWWriteResGroup11 : SchedWriteRes<[HWPort0,HWPort23]> {
let Latency = 6; let Latency = 6;
▲ Show 20 Lines • Show All 1,084 Lines • Show Last 20 Lines

lib/Target/X86/X86SchedSandyBridge.td

Show First 20 Lines • Show All 128 Lines • ▼ Show 20 Lines
defm : SBWriteResPair<WriteCMOV, [SBPort05,SBPort015], 2, [1,1], 2>; // Conditional move. defm : SBWriteResPair<WriteCMOV, [SBPort05,SBPort015], 2, [1,1], 2>; // Conditional move.
defm : SBWriteResPair<WriteCMOV2, [SBPort05,SBPort015], 3, [2,1], 3>; // Conditional (CF + ZF flag) move. defm : SBWriteResPair<WriteCMOV2, [SBPort05,SBPort015], 3, [2,1], 3>; // Conditional (CF + ZF flag) move.
defm : X86WriteRes<WriteFCMOV, [SBPort5,SBPort05], 3, [2,1], 3>; // x87 conditional move. defm : X86WriteRes<WriteFCMOV, [SBPort5,SBPort05], 3, [2,1], 3>; // x87 conditional move.
def : WriteRes<WriteSETCC, [SBPort05]>; // Setcc. def : WriteRes<WriteSETCC, [SBPort05]>; // Setcc.
def : WriteRes<WriteSETCCStore, [SBPort05,SBPort4,SBPort23]> { def : WriteRes<WriteSETCCStore, [SBPort05,SBPort4,SBPort23]> {
let Latency = 2; let Latency = 2;
let NumMicroOps = 3; let NumMicroOps = 3;
} }
def : WriteRes<WriteLAHFSAHF, [SBPort05]>;
// This is for simple LEAs with one or two input operands. // This is for simple LEAs with one or two input operands.
// The complex ones can only execute on port 1, and they require two cycles on // The complex ones can only execute on port 1, and they require two cycles on
// the port to read all inputs. We don't model that. // the port to read all inputs. We don't model that.
def : WriteRes<WriteLEA, [SBPort01]>; def : WriteRes<WriteLEA, [SBPort01]>;
// Bit counts. // Bit counts.
defm : SBWriteResPair<WriteBitScan, [SBPort1], 3, [1], 1, 5>; defm : SBWriteResPair<WriteBitScan, [SBPort1], 3, [1], 1, 5>;
▲ Show 20 Lines • Show All 408 Lines • ▼ Show 20 Lines
def: InstRW<[SBWriteResGroup2], (instrs RETQ)>; def: InstRW<[SBWriteResGroup2], (instrs RETQ)>;
def SBWriteResGroup4 : SchedWriteRes<[SBPort05]> { def SBWriteResGroup4 : SchedWriteRes<[SBPort05]> {
let Latency = 1; let Latency = 1;
let NumMicroOps = 1; let NumMicroOps = 1;
let ResourceCycles = [1]; let ResourceCycles = [1];
} }
def: InstRW<[SBWriteResGroup4], (instrs CDQ, CQO)>; def: InstRW<[SBWriteResGroup4], (instrs CDQ, CQO)>;
def: InstRW<[SBWriteResGroup4], (instrs LAHF, SAHF)>;
def: InstRW<[SBWriteResGroup4], (instregex "BT(16|32|64)ri8", def: InstRW<[SBWriteResGroup4], (instregex "BT(16|32|64)ri8",
"BT(16|32|64)rr", "BT(16|32|64)rr",
"BTC(16|32|64)ri8", "BTC(16|32|64)ri8",
"BTC(16|32|64)rr", "BTC(16|32|64)rr",
"BTR(16|32|64)ri8", "BTR(16|32|64)ri8",
"BTR(16|32|64)rr", "BTR(16|32|64)rr",
"BTS(16|32|64)ri8", "BTS(16|32|64)ri8",
"BTS(16|32|64)rr")>; "BTS(16|32|64)rr")>;
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lib/Target/X86/X86SchedSkylakeClient.td

Show First 20 Lines • Show All 126 Lines • ▼ Show 20 Lines
defm : SKLWriteResPair<WriteCMOV, [SKLPort06], 1, [1], 1>; // Conditional move. defm : SKLWriteResPair<WriteCMOV, [SKLPort06], 1, [1], 1>; // Conditional move.
defm : SKLWriteResPair<WriteCMOV2, [SKLPort06], 2, [2], 2>; // Conditional (CF + ZF flag) move. defm : SKLWriteResPair<WriteCMOV2, [SKLPort06], 2, [2], 2>; // Conditional (CF + ZF flag) move.
defm : X86WriteRes<WriteFCMOV, [SKLPort1], 3, [1], 1>; // x87 conditional move. defm : X86WriteRes<WriteFCMOV, [SKLPort1], 3, [1], 1>; // x87 conditional move.
def : WriteRes<WriteSETCC, [SKLPort06]>; // Setcc. def : WriteRes<WriteSETCC, [SKLPort06]>; // Setcc.
def : WriteRes<WriteSETCCStore, [SKLPort06,SKLPort4,SKLPort237]> { def : WriteRes<WriteSETCCStore, [SKLPort06,SKLPort4,SKLPort237]> {
let Latency = 2; let Latency = 2;
let NumMicroOps = 3; let NumMicroOps = 3;
} }
def : WriteRes<WriteLAHFSAHF, [SKLPort06]>;
// Bit counts. // Bit counts.
defm : SKLWriteResPair<WriteBitScan, [SKLPort1], 3>; defm : SKLWriteResPair<WriteBitScan, [SKLPort1], 3>;
defm : SKLWriteResPair<WriteLZCNT, [SKLPort1], 3>; defm : SKLWriteResPair<WriteLZCNT, [SKLPort1], 3>;
defm : SKLWriteResPair<WriteTZCNT, [SKLPort1], 3>; defm : SKLWriteResPair<WriteTZCNT, [SKLPort1], 3>;
defm : SKLWriteResPair<WritePOPCNT, [SKLPort1], 3>; defm : SKLWriteResPair<WritePOPCNT, [SKLPort1], 3>;
// Integer shifts and rotates. // Integer shifts and rotates.
▲ Show 20 Lines • Show All 481 Lines • ▼ Show 20 Lines
def SKLWriteResGroup10 : SchedWriteRes<[SKLPort0156]> { def SKLWriteResGroup10 : SchedWriteRes<[SKLPort0156]> {
let Latency = 1; let Latency = 1;
let NumMicroOps = 1; let NumMicroOps = 1;
let ResourceCycles = [1]; let ResourceCycles = [1];
} }
def: InstRW<[SKLWriteResGroup10], (instrs CBW, CWDE, CDQE, def: InstRW<[SKLWriteResGroup10], (instrs CBW, CWDE, CDQE,
CMC, STC)>; CMC, STC)>;
def: InstRW<[SKLWriteResGroup10], (instrs LAHF, SAHF)>; // TODO: This doesn't match Agner's data
def: InstRW<[SKLWriteResGroup10], (instregex "SGDT64m", def: InstRW<[SKLWriteResGroup10], (instregex "SGDT64m",
"SIDT64m", "SIDT64m",
"SMSW16m", "SMSW16m",
"STRm", "STRm",
"SYSCALL")>; "SYSCALL")>;
def SKLWriteResGroup11 : SchedWriteRes<[SKLPort4,SKLPort237]> { def SKLWriteResGroup11 : SchedWriteRes<[SKLPort4,SKLPort237]> {
let Latency = 1; let Latency = 1;
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lib/Target/X86/X86SchedSkylakeServer.td

Show First 20 Lines • Show All 126 Lines • ▼ Show 20 Lines
defm : SKXWriteResPair<WriteCMOV, [SKXPort06], 1, [1], 1>; // Conditional move. defm : SKXWriteResPair<WriteCMOV, [SKXPort06], 1, [1], 1>; // Conditional move.
defm : SKXWriteResPair<WriteCMOV2, [SKXPort06], 2, [2], 2>; // Conditional (CF + ZF flag) move. defm : SKXWriteResPair<WriteCMOV2, [SKXPort06], 2, [2], 2>; // Conditional (CF + ZF flag) move.
defm : X86WriteRes<WriteFCMOV, [SKXPort1], 3, [1], 1>; // x87 conditional move. defm : X86WriteRes<WriteFCMOV, [SKXPort1], 3, [1], 1>; // x87 conditional move.
def : WriteRes<WriteSETCC, [SKXPort06]>; // Setcc. def : WriteRes<WriteSETCC, [SKXPort06]>; // Setcc.
def : WriteRes<WriteSETCCStore, [SKXPort06,SKXPort4,SKXPort237]> { def : WriteRes<WriteSETCCStore, [SKXPort06,SKXPort4,SKXPort237]> {
let Latency = 2; let Latency = 2;
let NumMicroOps = 3; let NumMicroOps = 3;
} }
def : WriteRes<WriteLAHFSAHF, [SKXPort06]>;
// Integer shifts and rotates. // Integer shifts and rotates.
defm : SKXWriteResPair<WriteShift, [SKXPort06], 1>; defm : SKXWriteResPair<WriteShift, [SKXPort06], 1>;
// Bit counts. // Bit counts.
defm : SKXWriteResPair<WriteBitScan, [SKXPort1], 3>; defm : SKXWriteResPair<WriteBitScan, [SKXPort1], 3>;
defm : SKXWriteResPair<WriteLZCNT, [SKXPort1], 3>; defm : SKXWriteResPair<WriteLZCNT, [SKXPort1], 3>;
defm : SKXWriteResPair<WriteTZCNT, [SKXPort1], 3>; defm : SKXWriteResPair<WriteTZCNT, [SKXPort1], 3>;
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def SKXWriteResGroup10 : SchedWriteRes<[SKXPort0156]> { def SKXWriteResGroup10 : SchedWriteRes<[SKXPort0156]> {
let Latency = 1; let Latency = 1;
let NumMicroOps = 1; let NumMicroOps = 1;
let ResourceCycles = [1]; let ResourceCycles = [1];
} }
def: InstRW<[SKXWriteResGroup10], (instrs CBW, CWDE, CDQE, def: InstRW<[SKXWriteResGroup10], (instrs CBW, CWDE, CDQE,
CMC, STC)>; CMC, STC)>;
def: InstRW<[SKXWriteResGroup10], (instrs LAHF, SAHF)>; // TODO: This doesn't match Agner's data
def: InstRW<[SKXWriteResGroup10], (instregex "SGDT64m", def: InstRW<[SKXWriteResGroup10], (instregex "SGDT64m",
"SIDT64m", "SIDT64m",
"SMSW16m", "SMSW16m",
"STRm", "STRm",
"SYSCALL")>; "SYSCALL")>;
def SKXWriteResGroup11 : SchedWriteRes<[SKXPort4,SKXPort237]> { def SKXWriteResGroup11 : SchedWriteRes<[SKXPort4,SKXPort237]> {
let Latency = 1; let Latency = 1;
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lib/Target/X86/X86Schedule.td

Show First 20 Lines • Show All 131 Lines • ▼ Show 20 Lines
defm WritePOPCNT : X86SchedWritePair; // Bit population count. defm WritePOPCNT : X86SchedWritePair; // Bit population count.
defm WriteLZCNT : X86SchedWritePair; // Leading zero count. defm WriteLZCNT : X86SchedWritePair; // Leading zero count.
defm WriteTZCNT : X86SchedWritePair; // Trailing zero count. defm WriteTZCNT : X86SchedWritePair; // Trailing zero count.
defm WriteCMOV : X86SchedWritePair; // Conditional move. defm WriteCMOV : X86SchedWritePair; // Conditional move.
defm WriteCMOV2 : X86SchedWritePair; // Conditional (CF + ZF flag) move. defm WriteCMOV2 : X86SchedWritePair; // Conditional (CF + ZF flag) move.
def WriteFCMOV : SchedWrite; // X87 conditional move. def WriteFCMOV : SchedWrite; // X87 conditional move.
def WriteSETCC : SchedWrite; // Set register based on condition code. def WriteSETCC : SchedWrite; // Set register based on condition code.
def WriteSETCCStore : SchedWrite; def WriteSETCCStore : SchedWrite;
def WriteLAHFSAHF : SchedWrite; // Load/Store flags in AH.
// Integer shifts and rotates. // Integer shifts and rotates.
defm WriteShift : X86SchedWritePair; defm WriteShift : X86SchedWritePair;
// BMI1 BEXTR, BMI2 BZHI // BMI1 BEXTR, BMI2 BZHI
defm WriteBEXTR : X86SchedWritePair; defm WriteBEXTR : X86SchedWritePair;
defm WriteBZHI : X86SchedWritePair; defm WriteBZHI : X86SchedWritePair;
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lib/Target/X86/X86ScheduleAtom.td

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defm : AtomWriteResPair<WriteCMOV2, [AtomPort01], [AtomPort0]>; defm : AtomWriteResPair<WriteCMOV2, [AtomPort01], [AtomPort0]>;
defm : X86WriteRes<WriteFCMOV, [AtomPort01], 9, [9], 1>; // x87 conditional move. defm : X86WriteRes<WriteFCMOV, [AtomPort01], 9, [9], 1>; // x87 conditional move.
def : WriteRes<WriteSETCC, [AtomPort01]>; def : WriteRes<WriteSETCC, [AtomPort01]>;
def : WriteRes<WriteSETCCStore, [AtomPort01]> { def : WriteRes<WriteSETCCStore, [AtomPort01]> {
let Latency = 2; let Latency = 2;
let ResourceCycles = [2]; let ResourceCycles = [2];
} }
def : WriteRes<WriteLAHFSAHF, [AtomPort01]> {
let Latency = 2;
let ResourceCycles = [2];
}
defm : X86WriteResUnsupported<WriteIMulH>; defm : X86WriteResUnsupported<WriteIMulH>;
// This is for simple LEAs with one or two input operands. // This is for simple LEAs with one or two input operands.
def : WriteRes<WriteLEA, [AtomPort1]>; def : WriteRes<WriteLEA, [AtomPort1]>;
def AtomWriteIMul16Ld : SchedWriteRes<[AtomPort01]> { def AtomWriteIMul16Ld : SchedWriteRes<[AtomPort01]> {
let Latency = 8; let Latency = 8;
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lib/Target/X86/X86ScheduleBtVer2.td

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defm : JWriteResIntPair<WriteCRC32, [JALU01], 3, [4], 3>; defm : JWriteResIntPair<WriteCRC32, [JALU01], 3, [4], 3>;
defm : JWriteResIntPair<WriteCMOV, [JALU01], 1>; // Conditional move. defm : JWriteResIntPair<WriteCMOV, [JALU01], 1>; // Conditional move.
defm : JWriteResIntPair<WriteCMOV2, [JALU01], 1>; // Conditional (CF + ZF flag) move. defm : JWriteResIntPair<WriteCMOV2, [JALU01], 1>; // Conditional (CF + ZF flag) move.
defm : X86WriteRes<WriteFCMOV, [JFPU0, JFPA], 3, [1,1], 1>; // x87 conditional move. defm : X86WriteRes<WriteFCMOV, [JFPU0, JFPA], 3, [1,1], 1>; // x87 conditional move.
def : WriteRes<WriteSETCC, [JALU01]>; // Setcc. def : WriteRes<WriteSETCC, [JALU01]>; // Setcc.
def : WriteRes<WriteSETCCStore, [JALU01,JSAGU]>; def : WriteRes<WriteSETCCStore, [JALU01,JSAGU]>;
def : WriteRes<WriteLAHFSAHF, [JALU01]>;
// This is for simple LEAs with one or two input operands. // This is for simple LEAs with one or two input operands.
// FIXME: SAGU 3-operand LEA // FIXME: SAGU 3-operand LEA
def : WriteRes<WriteLEA, [JALU01]>; def : WriteRes<WriteLEA, [JALU01]>;
// Bit counts. // Bit counts.
defm : JWriteResIntPair<WriteBitScan, [JALU01], 5, [4], 8>; defm : JWriteResIntPair<WriteBitScan, [JALU01], 5, [4], 8>;
defm : JWriteResIntPair<WritePOPCNT, [JALU01], 1>; defm : JWriteResIntPair<WritePOPCNT, [JALU01], 1>;
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lib/Target/X86/X86ScheduleSLM.td

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defm : SLMWriteResPair<WriteCMOV, [SLM_IEC_RSV01], 2, [2]>; defm : SLMWriteResPair<WriteCMOV, [SLM_IEC_RSV01], 2, [2]>;
defm : SLMWriteResPair<WriteCMOV2, [SLM_IEC_RSV01], 2, [2]>; defm : SLMWriteResPair<WriteCMOV2, [SLM_IEC_RSV01], 2, [2]>;
defm : X86WriteRes<WriteFCMOV, [SLM_FPC_RSV1], 3, [1], 1>; // x87 conditional move. defm : X86WriteRes<WriteFCMOV, [SLM_FPC_RSV1], 3, [1], 1>; // x87 conditional move.
def : WriteRes<WriteSETCC, [SLM_IEC_RSV01]>; def : WriteRes<WriteSETCC, [SLM_IEC_RSV01]>;
def : WriteRes<WriteSETCCStore, [SLM_IEC_RSV01, SLM_MEC_RSV]> { def : WriteRes<WriteSETCCStore, [SLM_IEC_RSV01, SLM_MEC_RSV]> {
// FIXME Latency and NumMicrOps? // FIXME Latency and NumMicrOps?
let ResourceCycles = [2,1]; let ResourceCycles = [2,1];
} }
def : WriteRes<WriteLAHFSAHF, [SLM_IEC_RSV01]>;
// This is for simple LEAs with one or two input operands. // This is for simple LEAs with one or two input operands.
// The complex ones can only execute on port 1, and they require two cycles on // The complex ones can only execute on port 1, and they require two cycles on
// the port to read all inputs. We don't model that. // the port to read all inputs. We don't model that.
def : WriteRes<WriteLEA, [SLM_IEC_RSV1]>; def : WriteRes<WriteLEA, [SLM_IEC_RSV1]>;
// Bit counts. // Bit counts.
defm : SLMWriteResPair<WriteBitScan, [SLM_IEC_RSV01], 10, [20], 10>; defm : SLMWriteResPair<WriteBitScan, [SLM_IEC_RSV01], 10, [20], 10>;
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lib/Target/X86/X86ScheduleZnver1.td

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defm : ZnWriteResPair<WriteShift, [ZnALU], 1>; defm : ZnWriteResPair<WriteShift, [ZnALU], 1>;
defm : ZnWriteResPair<WriteJump, [ZnALU], 1>; defm : ZnWriteResPair<WriteJump, [ZnALU], 1>;
defm : ZnWriteResFpuPair<WriteCRC32, [ZnFPU0], 3>; defm : ZnWriteResFpuPair<WriteCRC32, [ZnFPU0], 3>;
defm : ZnWriteResPair<WriteCMOV, [ZnALU], 1>; defm : ZnWriteResPair<WriteCMOV, [ZnALU], 1>;
defm : ZnWriteResPair<WriteCMOV2, [ZnALU], 1>; defm : ZnWriteResPair<WriteCMOV2, [ZnALU], 1>;
def : WriteRes<WriteSETCC, [ZnALU]>; def : WriteRes<WriteSETCC, [ZnALU]>;
def : WriteRes<WriteSETCCStore, [ZnALU, ZnAGU]>; def : WriteRes<WriteSETCCStore, [ZnALU, ZnAGU]>;
defm : X86WriteRes<WriteLAHFSAHF, [ZnALU], 2, [1], 2>;
// Bit counts. // Bit counts.
defm : ZnWriteResPair<WriteBitScan, [ZnALU], 3>; defm : ZnWriteResPair<WriteBitScan, [ZnALU], 3>;
defm : ZnWriteResPair<WriteLZCNT, [ZnALU], 2>; defm : ZnWriteResPair<WriteLZCNT, [ZnALU], 2>;
defm : ZnWriteResPair<WriteTZCNT, [ZnALU], 2>; defm : ZnWriteResPair<WriteTZCNT, [ZnALU], 2>;
defm : ZnWriteResPair<WritePOPCNT, [ZnALU], 1>; defm : ZnWriteResPair<WritePOPCNT, [ZnALU], 1>;
// Treat misc copies as a move. // Treat misc copies as a move.
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def ZnWritePushA : SchedWriteRes<[ZnAGU]> { def ZnWritePushA : SchedWriteRes<[ZnAGU]> {
let Latency = 8; let Latency = 8;
} }
def : InstRW<[ZnWritePushA], (instregex "PUSHA(16|32)")>; def : InstRW<[ZnWritePushA], (instregex "PUSHA(16|32)")>;
//LAHF //LAHF
def : InstRW<[WriteMicrocoded], (instrs LAHF)>; def : InstRW<[WriteMicrocoded], (instrs LAHF)>;
// SAHF.
def ZnWriteSAHF : SchedWriteRes<[ZnALU]> {
let Latency = 2;
let NumMicroOps = 2;
}
def : InstRW<[ZnWriteSAHF], (instrs SAHF)>;
// BSWAP. // BSWAP.
def ZnWriteBSwap : SchedWriteRes<[ZnALU]> { def ZnWriteBSwap : SchedWriteRes<[ZnALU]> {
let ResourceCycles = [4]; let ResourceCycles = [4];
} }
def : InstRW<[ZnWriteBSwap], (instregex "BSWAP")>; def : InstRW<[ZnWriteBSwap], (instregex "BSWAP")>;
// MOVBE. // MOVBE.
// r,m. // r,m.
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test/CodeGen/X86/schedule-x86_64.ll

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
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; GENERIC-NEXT: lahf # sched: [1:0.50] ; GENERIC-NEXT: lahf # sched: [1:0.50]
; GENERIC-NEXT: sahf # sched: [1:0.50] ; GENERIC-NEXT: sahf # sched: [1:0.50]
; GENERIC-NEXT: #NO_APP ; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retq # sched: [1:1.00] ; GENERIC-NEXT: retq # sched: [1:1.00]
; ;
; ATOM-LABEL: test_lahf_sahf: ; ATOM-LABEL: test_lahf_sahf:
; ATOM: # %bb.0: ; ATOM: # %bb.0:
; ATOM-NEXT: #APP ; ATOM-NEXT: #APP
; ATOM-NEXT: lahf # sched: [1:0.50] ; ATOM-NEXT: lahf # sched: [2:1.00]
; ATOM-NEXT: sahf # sched: [1:0.50] ; ATOM-NEXT: sahf # sched: [2:1.00]
; ATOM-NEXT: #NO_APP ; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retq # sched: [79:39.50] ; ATOM-NEXT: retq # sched: [79:39.50]
; ;
; SLM-LABEL: test_lahf_sahf: ; SLM-LABEL: test_lahf_sahf:
; SLM: # %bb.0: ; SLM: # %bb.0:
; SLM-NEXT: #APP ; SLM-NEXT: #APP
; SLM-NEXT: lahf # sched: [1:0.50] ; SLM-NEXT: lahf # sched: [1:0.50]
; SLM-NEXT: sahf # sched: [1:0.50] ; SLM-NEXT: sahf # sched: [1:0.50]
; SLM-NEXT: #NO_APP ; SLM-NEXT: #NO_APP
; SLM-NEXT: retq # sched: [4:1.00] ; SLM-NEXT: retq # sched: [4:1.00]
; ;
; SANDY-LABEL: test_lahf_sahf: ; SANDY-LABEL: test_lahf_sahf:
; SANDY: # %bb.0: ; SANDY: # %bb.0:
; SANDY-NEXT: #APP ; SANDY-NEXT: #APP
; SANDY-NEXT: lahf # sched: [1:0.50] ; SANDY-NEXT: lahf # sched: [1:0.50]
; SANDY-NEXT: sahf # sched: [1:0.50] ; SANDY-NEXT: sahf # sched: [1:0.50]
; SANDY-NEXT: #NO_APP ; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retq # sched: [1:1.00] ; SANDY-NEXT: retq # sched: [1:1.00]
; ;
; HASWELL-LABEL: test_lahf_sahf: ; HASWELL-LABEL: test_lahf_sahf:
; HASWELL: # %bb.0: ; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP ; HASWELL-NEXT: #APP
; HASWELL-NEXT: lahf # sched: [1:0.25] ; HASWELL-NEXT: lahf # sched: [1:0.50]
; HASWELL-NEXT: sahf # sched: [1:0.25] ; HASWELL-NEXT: sahf # sched: [1:0.50]
; HASWELL-NEXT: #NO_APP ; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retq # sched: [7:1.00] ; HASWELL-NEXT: retq # sched: [7:1.00]
; ;
; BROADWELL-LABEL: test_lahf_sahf: ; BROADWELL-LABEL: test_lahf_sahf:
; BROADWELL: # %bb.0: ; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP ; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: lahf # sched: [1:0.25] ; BROADWELL-NEXT: lahf # sched: [1:0.50]
; BROADWELL-NEXT: sahf # sched: [1:0.25] ; BROADWELL-NEXT: sahf # sched: [1:0.50]
; BROADWELL-NEXT: #NO_APP ; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retq # sched: [7:1.00] ; BROADWELL-NEXT: retq # sched: [7:1.00]
; ;
; SKYLAKE-LABEL: test_lahf_sahf: ; SKYLAKE-LABEL: test_lahf_sahf:
; SKYLAKE: # %bb.0: ; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP ; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: lahf # sched: [1:0.25] ; SKYLAKE-NEXT: lahf # sched: [1:0.50]
; SKYLAKE-NEXT: sahf # sched: [1:0.25] ; SKYLAKE-NEXT: sahf # sched: [1:0.50]
; SKYLAKE-NEXT: #NO_APP ; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retq # sched: [7:1.00] ; SKYLAKE-NEXT: retq # sched: [7:1.00]
; ;
; SKX-LABEL: test_lahf_sahf: ; SKX-LABEL: test_lahf_sahf:
; SKX: # %bb.0: ; SKX: # %bb.0:
; SKX-NEXT: #APP ; SKX-NEXT: #APP
; SKX-NEXT: lahf # sched: [1:0.25] ; SKX-NEXT: lahf # sched: [1:0.50]
; SKX-NEXT: sahf # sched: [1:0.25] ; SKX-NEXT: sahf # sched: [1:0.50]
; SKX-NEXT: #NO_APP ; SKX-NEXT: #NO_APP
; SKX-NEXT: retq # sched: [7:1.00] ; SKX-NEXT: retq # sched: [7:1.00]
; ;
; BTVER2-LABEL: test_lahf_sahf: ; BTVER2-LABEL: test_lahf_sahf:
; BTVER2: # %bb.0: ; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP ; BTVER2-NEXT: #APP
; BTVER2-NEXT: lahf # sched: [1:0.50] ; BTVER2-NEXT: lahf # sched: [1:0.50]
; BTVER2-NEXT: sahf # sched: [1:0.50] ; BTVER2-NEXT: sahf # sched: [1:0.50]
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test/tools/llvm-mca/X86/Atom/resources-x86_64.s

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incb (%rax) incb (%rax)
incw %di incw %di
incw (%rax) incw (%rax)
incl %edi incl %edi
incl (%rax) incl (%rax)
incq %rdi incq %rdi
incq (%rax) incq (%rax)
lahf
mulb %dil mulb %dil
mulb (%rax) mulb (%rax)
mulw %si mulw %si
mulw (%rax) mulw (%rax)
mull %edx mull %edx
mull (%rax) mull (%rax)
mulq %rcx mulq %rcx
mulq (%rax) mulq (%rax)
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rorq $7, %rdi rorq $7, %rdi
rolq $7, (%rax) rolq $7, (%rax)
rorq $7, (%rax) rorq $7, (%rax)
rolq %cl, %rdi rolq %cl, %rdi
rorq %cl, %rdi rorq %cl, %rdi
rolq %cl, (%rax) rolq %cl, (%rax)
rorq %cl, (%rax) rorq %cl, (%rax)
sahf
sarb %dil sarb %dil
shlb %dil shlb %dil
shrb %dil shrb %dil
sarb (%rax) sarb (%rax)
shlb (%rax) shlb (%rax)
shrb (%rax) shrb (%rax)
sarb $7, %dil sarb $7, %dil
shlb $7, %dil shlb $7, %dil
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# CHECK-NEXT: 1 1 0.50 incb %dil # CHECK-NEXT: 1 1 0.50 incb %dil
# CHECK-NEXT: 1 1 1.00 * * incb (%rax) # CHECK-NEXT: 1 1 1.00 * * incb (%rax)
# CHECK-NEXT: 1 1 0.50 incw %di # CHECK-NEXT: 1 1 0.50 incw %di
# CHECK-NEXT: 1 1 1.00 * * incw (%rax) # CHECK-NEXT: 1 1 1.00 * * incw (%rax)
# CHECK-NEXT: 1 1 0.50 incl %edi # CHECK-NEXT: 1 1 0.50 incl %edi
# CHECK-NEXT: 1 1 1.00 * * incl (%rax) # CHECK-NEXT: 1 1 1.00 * * incl (%rax)
# CHECK-NEXT: 1 1 0.50 incq %rdi # CHECK-NEXT: 1 1 0.50 incq %rdi
# CHECK-NEXT: 1 1 1.00 * * incq (%rax) # CHECK-NEXT: 1 1 1.00 * * incq (%rax)
# CHECK-NEXT: 1 2 1.00 lahf
# CHECK-NEXT: 1 7 3.50 mulb %dil # CHECK-NEXT: 1 7 3.50 mulb %dil
# CHECK-NEXT: 1 7 3.50 * mulb (%rax) # CHECK-NEXT: 1 7 3.50 * mulb (%rax)
# CHECK-NEXT: 1 7 3.50 mulw %si # CHECK-NEXT: 1 7 3.50 mulw %si
# CHECK-NEXT: 1 8 4.00 * mulw (%rax) # CHECK-NEXT: 1 8 4.00 * mulw (%rax)
# CHECK-NEXT: 1 6 3.00 mull %edx # CHECK-NEXT: 1 6 3.00 mull %edx
# CHECK-NEXT: 1 7 3.50 * mull (%rax) # CHECK-NEXT: 1 7 3.50 * mull (%rax)
# CHECK-NEXT: 1 12 6.00 mulq %rcx # CHECK-NEXT: 1 12 6.00 mulq %rcx
# CHECK-NEXT: 1 12 6.00 * mulq (%rax) # CHECK-NEXT: 1 12 6.00 * mulq (%rax)
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# CHECK-NEXT: 1 1 1.00 rolq $7, %rdi # CHECK-NEXT: 1 1 1.00 rolq $7, %rdi
# CHECK-NEXT: 1 1 1.00 rorq $7, %rdi # CHECK-NEXT: 1 1 1.00 rorq $7, %rdi
# CHECK-NEXT: 1 1 1.00 * * rolq $7, (%rax) # CHECK-NEXT: 1 1 1.00 * * rolq $7, (%rax)
# CHECK-NEXT: 1 1 1.00 * * rorq $7, (%rax) # CHECK-NEXT: 1 1 1.00 * * rorq $7, (%rax)
# CHECK-NEXT: 1 1 1.00 rolq %cl, %rdi # CHECK-NEXT: 1 1 1.00 rolq %cl, %rdi
# CHECK-NEXT: 1 1 1.00 rorq %cl, %rdi # CHECK-NEXT: 1 1 1.00 rorq %cl, %rdi
# CHECK-NEXT: 1 1 1.00 * * rolq %cl, (%rax) # CHECK-NEXT: 1 1 1.00 * * rolq %cl, (%rax)
# CHECK-NEXT: 1 1 1.00 * * rorq %cl, (%rax) # CHECK-NEXT: 1 1 1.00 * * rorq %cl, (%rax)
# CHECK-NEXT: 1 2 1.00 sahf
# CHECK-NEXT: 1 1 1.00 sarb %dil # CHECK-NEXT: 1 1 1.00 sarb %dil
# CHECK-NEXT: 1 1 1.00 shlb %dil # CHECK-NEXT: 1 1 1.00 shlb %dil
# CHECK-NEXT: 1 1 1.00 shrb %dil # CHECK-NEXT: 1 1 1.00 shrb %dil
# CHECK-NEXT: 1 1 1.00 * * sarb (%rax) # CHECK-NEXT: 1 1 1.00 * * sarb (%rax)
# CHECK-NEXT: 1 1 1.00 * * shlb (%rax) # CHECK-NEXT: 1 1 1.00 * * shlb (%rax)
# CHECK-NEXT: 1 1 1.00 * * shrb (%rax) # CHECK-NEXT: 1 1 1.00 * * shrb (%rax)
# CHECK-NEXT: 1 1 1.00 sarb $7, %dil # CHECK-NEXT: 1 1 1.00 sarb $7, %dil
# CHECK-NEXT: 1 1 1.00 shlb $7, %dil # CHECK-NEXT: 1 1 1.00 shlb $7, %dil
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# CHECK-NEXT: 1 1 1.00 * xorq (%rax), %rdi # CHECK-NEXT: 1 1 1.00 * xorq (%rax), %rdi
# CHECK: Resources: # CHECK: Resources:
# CHECK-NEXT: [0] - AtomPort0 # CHECK-NEXT: [0] - AtomPort0
# CHECK-NEXT: [1] - AtomPort1 # CHECK-NEXT: [1] - AtomPort1
# CHECK: Resource pressure per iteration: # CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] # CHECK-NEXT: [0] [1]
# CHECK-NEXT: 1258.50 963.50 # CHECK-NEXT: 1260.50 965.50
# CHECK: Resource pressure by instruction: # CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] Instructions: # CHECK-NEXT: [0] [1] Instructions:
# CHECK-NEXT: 0.50 0.50 adcb $7, %al # CHECK-NEXT: 0.50 0.50 adcb $7, %al
# CHECK-NEXT: 0.50 0.50 adcb $7, %dil # CHECK-NEXT: 0.50 0.50 adcb $7, %dil
# CHECK-NEXT: 1.00 - adcb $7, (%rax) # CHECK-NEXT: 1.00 - adcb $7, (%rax)
# CHECK-NEXT: 0.50 0.50 adcb %sil, %dil # CHECK-NEXT: 0.50 0.50 adcb %sil, %dil
# CHECK-NEXT: 1.00 - adcb %sil, (%rax) # CHECK-NEXT: 1.00 - adcb %sil, (%rax)
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# CHECK-NEXT: 0.50 0.50 incb %dil # CHECK-NEXT: 0.50 0.50 incb %dil
# CHECK-NEXT: 1.00 - incb (%rax) # CHECK-NEXT: 1.00 - incb (%rax)
# CHECK-NEXT: 0.50 0.50 incw %di # CHECK-NEXT: 0.50 0.50 incw %di
# CHECK-NEXT: 1.00 - incw (%rax) # CHECK-NEXT: 1.00 - incw (%rax)
# CHECK-NEXT: 0.50 0.50 incl %edi # CHECK-NEXT: 0.50 0.50 incl %edi
# CHECK-NEXT: 1.00 - incl (%rax) # CHECK-NEXT: 1.00 - incl (%rax)
# CHECK-NEXT: 0.50 0.50 incq %rdi # CHECK-NEXT: 0.50 0.50 incq %rdi
# CHECK-NEXT: 1.00 - incq (%rax) # CHECK-NEXT: 1.00 - incq (%rax)
# CHECK-NEXT: 1.00 1.00 lahf
# CHECK-NEXT: 3.50 3.50 mulb %dil # CHECK-NEXT: 3.50 3.50 mulb %dil
# CHECK-NEXT: 3.50 3.50 mulb (%rax) # CHECK-NEXT: 3.50 3.50 mulb (%rax)
# CHECK-NEXT: 3.50 3.50 mulw %si # CHECK-NEXT: 3.50 3.50 mulw %si
# CHECK-NEXT: 4.00 4.00 mulw (%rax) # CHECK-NEXT: 4.00 4.00 mulw (%rax)
# CHECK-NEXT: 3.00 3.00 mull %edx # CHECK-NEXT: 3.00 3.00 mull %edx
# CHECK-NEXT: 3.50 3.50 mull (%rax) # CHECK-NEXT: 3.50 3.50 mull (%rax)
# CHECK-NEXT: 6.00 6.00 mulq %rcx # CHECK-NEXT: 6.00 6.00 mulq %rcx
# CHECK-NEXT: 6.00 6.00 mulq (%rax) # CHECK-NEXT: 6.00 6.00 mulq (%rax)
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# CHECK-NEXT: 1.00 - rolq $7, %rdi # CHECK-NEXT: 1.00 - rolq $7, %rdi
# CHECK-NEXT: 1.00 - rorq $7, %rdi # CHECK-NEXT: 1.00 - rorq $7, %rdi
# CHECK-NEXT: 1.00 - rolq $7, (%rax) # CHECK-NEXT: 1.00 - rolq $7, (%rax)
# CHECK-NEXT: 1.00 - rorq $7, (%rax) # CHECK-NEXT: 1.00 - rorq $7, (%rax)
# CHECK-NEXT: 1.00 - rolq %cl, %rdi # CHECK-NEXT: 1.00 - rolq %cl, %rdi
# CHECK-NEXT: 1.00 - rorq %cl, %rdi # CHECK-NEXT: 1.00 - rorq %cl, %rdi
# CHECK-NEXT: 1.00 - rolq %cl, (%rax) # CHECK-NEXT: 1.00 - rolq %cl, (%rax)
# CHECK-NEXT: 1.00 - rorq %cl, (%rax) # CHECK-NEXT: 1.00 - rorq %cl, (%rax)
# CHECK-NEXT: 1.00 1.00 sahf
# CHECK-NEXT: 1.00 - sarb %dil # CHECK-NEXT: 1.00 - sarb %dil
# CHECK-NEXT: 1.00 - shlb %dil # CHECK-NEXT: 1.00 - shlb %dil
# CHECK-NEXT: 1.00 - shrb %dil # CHECK-NEXT: 1.00 - shrb %dil
# CHECK-NEXT: 1.00 - sarb (%rax) # CHECK-NEXT: 1.00 - sarb (%rax)
# CHECK-NEXT: 1.00 - shlb (%rax) # CHECK-NEXT: 1.00 - shlb (%rax)
# CHECK-NEXT: 1.00 - shrb (%rax) # CHECK-NEXT: 1.00 - shrb (%rax)
# CHECK-NEXT: 1.00 - sarb $7, %dil # CHECK-NEXT: 1.00 - sarb $7, %dil
# CHECK-NEXT: 1.00 - shlb $7, %dil # CHECK-NEXT: 1.00 - shlb $7, %dil
▲ Show 20 Lines • Show All 178 Lines • Show Last 20 Lines

test/tools/llvm-mca/X86/Broadwell/resources-x86_64.s

Show First 20 Lines • Show All 216 Lines • ▼ Show 20 Lines
incb (%rax) incb (%rax)
incw %di incw %di
incw (%rax) incw (%rax)
incl %edi incl %edi
incl (%rax) incl (%rax)
incq %rdi incq %rdi
incq (%rax) incq (%rax)
lahf
mulb %dil mulb %dil
mulb (%rax) mulb (%rax)
mulw %si mulw %si
mulw (%rax) mulw (%rax)
mull %edx mull %edx
mull (%rax) mull (%rax)
mulq %rcx mulq %rcx
mulq (%rax) mulq (%rax)
▲ Show 20 Lines • Show All 157 Lines • ▼ Show 20 Lines
rorq $7, %rdi rorq $7, %rdi
rolq $7, (%rax) rolq $7, (%rax)
rorq $7, (%rax) rorq $7, (%rax)
rolq %cl, %rdi rolq %cl, %rdi
rorq %cl, %rdi rorq %cl, %rdi
rolq %cl, (%rax) rolq %cl, (%rax)
rorq %cl, (%rax) rorq %cl, (%rax)
sahf
sarb %dil sarb %dil
shlb %dil shlb %dil
shrb %dil shrb %dil
sarb (%rax) sarb (%rax)
shlb (%rax) shlb (%rax)
shrb (%rax) shrb (%rax)
sarb $7, %dil sarb $7, %dil
shlb $7, %dil shlb $7, %dil
▲ Show 20 Lines • Show All 395 Lines • ▼ Show 20 Lines
# CHECK-NEXT: 1 1 0.25 incb %dil # CHECK-NEXT: 1 1 0.25 incb %dil
# CHECK-NEXT: 3 7 1.00 * * incb (%rax) # CHECK-NEXT: 3 7 1.00 * * incb (%rax)
# CHECK-NEXT: 1 1 0.25 incw %di # CHECK-NEXT: 1 1 0.25 incw %di
# CHECK-NEXT: 3 7 1.00 * * incw (%rax) # CHECK-NEXT: 3 7 1.00 * * incw (%rax)
# CHECK-NEXT: 1 1 0.25 incl %edi # CHECK-NEXT: 1 1 0.25 incl %edi
# CHECK-NEXT: 3 7 1.00 * * incl (%rax) # CHECK-NEXT: 3 7 1.00 * * incl (%rax)
# CHECK-NEXT: 1 1 0.25 incq %rdi # CHECK-NEXT: 1 1 0.25 incq %rdi
# CHECK-NEXT: 3 7 1.00 * * incq (%rax) # CHECK-NEXT: 3 7 1.00 * * incq (%rax)
# CHECK-NEXT: 1 1 0.50 lahf
# CHECK-NEXT: 1 3 1.00 mulb %dil # CHECK-NEXT: 1 3 1.00 mulb %dil
# CHECK-NEXT: 2 8 1.00 * mulb (%rax) # CHECK-NEXT: 2 8 1.00 * mulb (%rax)
# CHECK-NEXT: 4 4 1.00 mulw %si # CHECK-NEXT: 4 4 1.00 mulw %si
# CHECK-NEXT: 5 9 1.00 * mulw (%rax) # CHECK-NEXT: 5 9 1.00 * mulw (%rax)
# CHECK-NEXT: 3 4 1.00 mull %edx # CHECK-NEXT: 3 4 1.00 mull %edx
# CHECK-NEXT: 4 9 1.00 * mull (%rax) # CHECK-NEXT: 4 9 1.00 * mull (%rax)
# CHECK-NEXT: 2 4 1.00 mulq %rcx # CHECK-NEXT: 2 4 1.00 mulq %rcx
# CHECK-NEXT: 3 9 1.00 * mulq (%rax) # CHECK-NEXT: 3 9 1.00 * mulq (%rax)
▲ Show 20 Lines • Show All 141 Lines • ▼ Show 20 Lines
# CHECK-NEXT: 2 2 1.00 rolq $7, %rdi # CHECK-NEXT: 2 2 1.00 rolq $7, %rdi
# CHECK-NEXT: 2 2 1.00 rorq $7, %rdi # CHECK-NEXT: 2 2 1.00 rorq $7, %rdi
# CHECK-NEXT: 5 7 1.00 * * rolq $7, (%rax) # CHECK-NEXT: 5 7 1.00 * * rolq $7, (%rax)
# CHECK-NEXT: 5 7 1.00 * * rorq $7, (%rax) # CHECK-NEXT: 5 7 1.00 * * rorq $7, (%rax)
# CHECK-NEXT: 3 3 1.00 rolq %cl, %rdi # CHECK-NEXT: 3 3 1.00 rolq %cl, %rdi
# CHECK-NEXT: 3 3 1.00 rorq %cl, %rdi # CHECK-NEXT: 3 3 1.00 rorq %cl, %rdi
# CHECK-NEXT: 6 8 1.00 * * rolq %cl, (%rax) # CHECK-NEXT: 6 8 1.00 * * rolq %cl, (%rax)
# CHECK-NEXT: 5 8 1.00 * * rorq %cl, (%rax) # CHECK-NEXT: 5 8 1.00 * * rorq %cl, (%rax)
# CHECK-NEXT: 1 1 0.50 sahf
# CHECK-NEXT: 1 1 0.50 sarb %dil # CHECK-NEXT: 1 1 0.50 sarb %dil
# CHECK-NEXT: 1 1 0.50 shlb %dil # CHECK-NEXT: 1 1 0.50 shlb %dil
# CHECK-NEXT: 1 1 0.50 shrb %dil # CHECK-NEXT: 1 1 0.50 shrb %dil
# CHECK-NEXT: 4 6 1.00 * * sarb (%rax) # CHECK-NEXT: 4 6 1.00 * * sarb (%rax)
# CHECK-NEXT: 4 6 1.00 * * shlb (%rax) # CHECK-NEXT: 4 6 1.00 * * shlb (%rax)
# CHECK-NEXT: 4 6 1.00 * * shrb (%rax) # CHECK-NEXT: 4 6 1.00 * * shrb (%rax)
# CHECK-NEXT: 1 1 0.50 sarb $7, %dil # CHECK-NEXT: 1 1 0.50 sarb $7, %dil
# CHECK-NEXT: 1 1 0.50 shlb $7, %dil # CHECK-NEXT: 1 1 0.50 shlb $7, %dil
▲ Show 20 Lines • Show All 185 Lines • ▼ Show 20 Lines
# CHECK-NEXT: [5] - BWPort3 # CHECK-NEXT: [5] - BWPort3
# CHECK-NEXT: [6] - BWPort4 # CHECK-NEXT: [6] - BWPort4
# CHECK-NEXT: [7] - BWPort5 # CHECK-NEXT: [7] - BWPort5
# CHECK-NEXT: [8] - BWPort6 # CHECK-NEXT: [8] - BWPort6
# CHECK-NEXT: [9] - BWPort7 # CHECK-NEXT: [9] - BWPort7
# CHECK: Resource pressure per iteration: # CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9]
# CHECK-NEXT: 50.00 - 362.00 242.50 202.00 202.00 167.00 148.00 327.50 69.00 # CHECK-NEXT: 50.00 - 363.00 242.50 202.00 202.00 167.00 148.00 328.50 69.00
# CHECK: Resource pressure by instruction: # CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: - - 0.75 0.25 - - - 0.25 0.75 - adcb $7, %al # CHECK-NEXT: - - 0.75 0.25 - - - 0.25 0.75 - adcb $7, %al
# CHECK-NEXT: - - 0.75 0.25 - - - 0.25 0.75 - adcb $7, %dil # CHECK-NEXT: - - 0.75 0.25 - - - 0.25 0.75 - adcb $7, %dil
# CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 adcb $7, (%rax) # CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 adcb $7, (%rax)
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - adcb %sil, %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - adcb %sil, %dil
# CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 adcb %sil, (%rax) # CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 adcb %sil, (%rax)
▲ Show 20 Lines • Show All 184 Lines • ▼ Show 20 Lines
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incb %dil # CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incb %dil
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incb (%rax) # CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incb (%rax)
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incw %di # CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incw %di
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incw (%rax) # CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incw (%rax)
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incl %edi # CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incl %edi
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incl (%rax) # CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incl (%rax)
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incq %rdi # CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incq %rdi
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incq (%rax) # CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incq (%rax)
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - lahf
# CHECK-NEXT: - - - 1.00 - - - - - - mulb %dil # CHECK-NEXT: - - - 1.00 - - - - - - mulb %dil
# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - mulb (%rax) # CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - mulb (%rax)
# CHECK-NEXT: - - 1.00 1.50 - - - 0.50 1.00 - mulw %si # CHECK-NEXT: - - 1.00 1.50 - - - 0.50 1.00 - mulw %si
# CHECK-NEXT: - - 1.00 1.50 0.50 0.50 - 0.50 1.00 - mulw (%rax) # CHECK-NEXT: - - 1.00 1.50 0.50 0.50 - 0.50 1.00 - mulw (%rax)
# CHECK-NEXT: - - 0.75 1.25 - - - 0.25 0.75 - mull %edx # CHECK-NEXT: - - 0.75 1.25 - - - 0.25 0.75 - mull %edx
# CHECK-NEXT: - - 0.75 1.25 0.50 0.50 - 0.25 0.75 - mull (%rax) # CHECK-NEXT: - - 0.75 1.25 0.50 0.50 - 0.25 0.75 - mull (%rax)
# CHECK-NEXT: - - - 1.00 - - - 1.00 - - mulq %rcx # CHECK-NEXT: - - - 1.00 - - - 1.00 - - mulq %rcx
# CHECK-NEXT: - - - 1.00 0.50 0.50 - 1.00 - - mulq (%rax) # CHECK-NEXT: - - - 1.00 0.50 0.50 - 1.00 - - mulq (%rax)
▲ Show 20 Lines • Show All 141 Lines • ▼ Show 20 Lines
# CHECK-NEXT: - - 1.00 - - - - - 1.00 - rolq $7, %rdi # CHECK-NEXT: - - 1.00 - - - - - 1.00 - rolq $7, %rdi
# CHECK-NEXT: - - 1.00 - - - - - 1.00 - rorq $7, %rdi # CHECK-NEXT: - - 1.00 - - - - - 1.00 - rorq $7, %rdi
# CHECK-NEXT: - - 1.00 - 0.83 0.83 1.00 - 1.00 0.33 rolq $7, (%rax) # CHECK-NEXT: - - 1.00 - 0.83 0.83 1.00 - 1.00 0.33 rolq $7, (%rax)
# CHECK-NEXT: - - 1.00 - 0.83 0.83 1.00 - 1.00 0.33 rorq $7, (%rax) # CHECK-NEXT: - - 1.00 - 0.83 0.83 1.00 - 1.00 0.33 rorq $7, (%rax)
# CHECK-NEXT: - - 1.25 0.25 - - - 0.25 1.25 - rolq %cl, %rdi # CHECK-NEXT: - - 1.25 0.25 - - - 0.25 1.25 - rolq %cl, %rdi
# CHECK-NEXT: - - 1.25 0.25 - - - 0.25 1.25 - rorq %cl, %rdi # CHECK-NEXT: - - 1.25 0.25 - - - 0.25 1.25 - rorq %cl, %rdi
# CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 rolq %cl, (%rax) # CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 rolq %cl, (%rax)
# CHECK-NEXT: - - 1.25 0.25 0.83 0.83 - 0.25 1.25 0.33 rorq %cl, (%rax) # CHECK-NEXT: - - 1.25 0.25 0.83 0.83 - 0.25 1.25 0.33 rorq %cl, (%rax)
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sahf
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarb %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarb %dil
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlb %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlb %dil
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shrb %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - shrb %dil
# CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 sarb (%rax) # CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 sarb (%rax)
# CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 shlb (%rax) # CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 shlb (%rax)
# CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 shrb (%rax) # CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 shrb (%rax)
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarb $7, %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarb $7, %dil
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlb $7, %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlb $7, %dil
▲ Show 20 Lines • Show All 178 Lines • Show Last 20 Lines

test/tools/llvm-mca/X86/BtVer2/partial-reg-update-2.s

# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
RKSimonUnsubmitted
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revert this? @gbedwell any idea why this got inserted?

RKSimon: revert this? @gbedwell any idea why this got inserted?
gbedwellUnsubmitted
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Merely because I regenerated all tests using a wildcard. It's regenerated the checks which happen to be identical to the previous manually inserted checks. I can revert, but we should probably re-add this line in a separate commit just to reduce noise from wildcard regenerating tests.

gbedwell: Merely because I regenerated all tests using a wildcard. It's regenerated the checks which…
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Something I didn't realise - Andrea's commit yesterday already added this line - @courbet if you rebase then this diff should just go away.....

RKSimon: Something I didn't realise - Andrea's commit yesterday already added this line - @courbet if…
gbedwellUnsubmitted
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Aha. I thought I was replying to a different review (hence why I wrote "I regenerated") as I have exactly the same diff in D48276 :)

gbedwell: Aha. I thought I was replying to a different review (hence why I wrote "I regenerated") as I…
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -resource-pressure=false -timeline < %s | FileCheck %s # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -resource-pressure=false -timeline < %s | FileCheck %s
imul %rax, %rbx imul %rax, %rbx
lzcnt %ax, %bx lzcnt %ax, %bx
add %ecx, %ebx add %ecx, %ebx
# CHECK: Iterations: 1 # CHECK: Iterations: 1
# CHECK-NEXT: Instructions: 3 # CHECK-NEXT: Instructions: 3
Show All 35 Lines

test/tools/llvm-mca/X86/BtVer2/resources-x86_64.s

Show First 20 Lines • Show All 216 Lines • ▼ Show 20 Lines
incb (%rax) incb (%rax)
incw %di incw %di
incw (%rax) incw (%rax)
incl %edi incl %edi
incl (%rax) incl (%rax)
incq %rdi incq %rdi
incq (%rax) incq (%rax)
lahf
mulb %dil mulb %dil
mulb (%rax) mulb (%rax)
mulw %si mulw %si
mulw (%rax) mulw (%rax)
mull %edx mull %edx
mull (%rax) mull (%rax)
mulq %rcx mulq %rcx
mulq (%rax) mulq (%rax)
▲ Show 20 Lines • Show All 157 Lines • ▼ Show 20 Lines
rorq $7, %rdi rorq $7, %rdi
rolq $7, (%rax) rolq $7, (%rax)
rorq $7, (%rax) rorq $7, (%rax)
rolq %cl, %rdi rolq %cl, %rdi
rorq %cl, %rdi rorq %cl, %rdi
rolq %cl, (%rax) rolq %cl, (%rax)
rorq %cl, (%rax) rorq %cl, (%rax)
sahf
sarb %dil sarb %dil
shlb %dil shlb %dil
shrb %dil shrb %dil
sarb (%rax) sarb (%rax)
shlb (%rax) shlb (%rax)
shrb (%rax) shrb (%rax)
sarb $7, %dil sarb $7, %dil
shlb $7, %dil shlb $7, %dil
▲ Show 20 Lines • Show All 395 Lines • ▼ Show 20 Lines
# CHECK-NEXT: 1 1 0.50 incb %dil # CHECK-NEXT: 1 1 0.50 incb %dil
# CHECK-NEXT: 2 5 1.00 * * incb (%rax) # CHECK-NEXT: 2 5 1.00 * * incb (%rax)
# CHECK-NEXT: 1 1 0.50 incw %di # CHECK-NEXT: 1 1 0.50 incw %di
# CHECK-NEXT: 2 5 1.00 * * incw (%rax) # CHECK-NEXT: 2 5 1.00 * * incw (%rax)
# CHECK-NEXT: 1 1 0.50 incl %edi # CHECK-NEXT: 1 1 0.50 incl %edi
# CHECK-NEXT: 2 5 1.00 * * incl (%rax) # CHECK-NEXT: 2 5 1.00 * * incl (%rax)
# CHECK-NEXT: 1 1 0.50 incq %rdi # CHECK-NEXT: 1 1 0.50 incq %rdi
# CHECK-NEXT: 2 5 1.00 * * incq (%rax) # CHECK-NEXT: 2 5 1.00 * * incq (%rax)
# CHECK-NEXT: 1 1 0.50 lahf
# CHECK-NEXT: 2 3 1.00 mulb %dil # CHECK-NEXT: 2 3 1.00 mulb %dil
# CHECK-NEXT: 2 6 1.00 * mulb (%rax) # CHECK-NEXT: 2 6 1.00 * mulb (%rax)
# CHECK-NEXT: 2 3 1.00 mulw %si # CHECK-NEXT: 2 3 1.00 mulw %si
# CHECK-NEXT: 2 6 1.00 * mulw (%rax) # CHECK-NEXT: 2 6 1.00 * mulw (%rax)
# CHECK-NEXT: 2 3 1.00 mull %edx # CHECK-NEXT: 2 3 1.00 mull %edx
# CHECK-NEXT: 2 6 1.00 * mull (%rax) # CHECK-NEXT: 2 6 1.00 * mull (%rax)
# CHECK-NEXT: 2 6 4.00 mulq %rcx # CHECK-NEXT: 2 6 4.00 mulq %rcx
# CHECK-NEXT: 2 9 4.00 * mulq (%rax) # CHECK-NEXT: 2 9 4.00 * mulq (%rax)
▲ Show 20 Lines • Show All 141 Lines • ▼ Show 20 Lines
# CHECK-NEXT: 1 1 0.50 rolq $7, %rdi # CHECK-NEXT: 1 1 0.50 rolq $7, %rdi
# CHECK-NEXT: 1 1 0.50 rorq $7, %rdi # CHECK-NEXT: 1 1 0.50 rorq $7, %rdi
# CHECK-NEXT: 2 4 1.00 * * rolq $7, (%rax) # CHECK-NEXT: 2 4 1.00 * * rolq $7, (%rax)
# CHECK-NEXT: 2 4 1.00 * * rorq $7, (%rax) # CHECK-NEXT: 2 4 1.00 * * rorq $7, (%rax)
# CHECK-NEXT: 1 1 0.50 rolq %cl, %rdi # CHECK-NEXT: 1 1 0.50 rolq %cl, %rdi
# CHECK-NEXT: 1 1 0.50 rorq %cl, %rdi # CHECK-NEXT: 1 1 0.50 rorq %cl, %rdi
# CHECK-NEXT: 2 4 1.00 * * rolq %cl, (%rax) # CHECK-NEXT: 2 4 1.00 * * rolq %cl, (%rax)
# CHECK-NEXT: 2 4 1.00 * * rorq %cl, (%rax) # CHECK-NEXT: 2 4 1.00 * * rorq %cl, (%rax)
# CHECK-NEXT: 1 1 0.50 sahf
# CHECK-NEXT: 1 1 0.50 sarb %dil # CHECK-NEXT: 1 1 0.50 sarb %dil
# CHECK-NEXT: 1 1 0.50 shlb %dil # CHECK-NEXT: 1 1 0.50 shlb %dil
# CHECK-NEXT: 1 1 0.50 shrb %dil # CHECK-NEXT: 1 1 0.50 shrb %dil
# CHECK-NEXT: 2 4 1.00 * * sarb (%rax) # CHECK-NEXT: 2 4 1.00 * * sarb (%rax)
# CHECK-NEXT: 2 4 1.00 * * shlb (%rax) # CHECK-NEXT: 2 4 1.00 * * shlb (%rax)
# CHECK-NEXT: 2 4 1.00 * * shrb (%rax) # CHECK-NEXT: 2 4 1.00 * * shrb (%rax)
# CHECK-NEXT: 1 1 0.50 sarb $7, %dil # CHECK-NEXT: 1 1 0.50 sarb $7, %dil
# CHECK-NEXT: 1 1 0.50 shlb $7, %dil # CHECK-NEXT: 1 1 0.50 shlb $7, %dil
▲ Show 20 Lines • Show All 189 Lines • ▼ Show 20 Lines
# CHECK-NEXT: [9] - JSAGU # CHECK-NEXT: [9] - JSAGU
# CHECK-NEXT: [10] - JSTC # CHECK-NEXT: [10] - JSTC
# CHECK-NEXT: [11] - JVALU0 # CHECK-NEXT: [11] - JVALU0
# CHECK-NEXT: [12] - JVALU1 # CHECK-NEXT: [12] - JVALU1
# CHECK-NEXT: [13] - JVIMUL # CHECK-NEXT: [13] - JVIMUL
# CHECK: Resource pressure per iteration: # CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13]
# CHECK-NEXT: 437.00 487.00 380.00 - - - - 263.00 64.00 195.00 - - - - # CHECK-NEXT: 438.00 488.00 380.00 - - - - 263.00 64.00 195.00 - - - -
# CHECK: Resource pressure by instruction: # CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] Instructions: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] Instructions:
# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - adcb $7, %al # CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - adcb $7, %al
# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - adcb $7, %dil # CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - adcb $7, %dil
# CHECK-NEXT: 1.00 1.00 - - - - - 1.00 - 1.00 - - - - adcb $7, (%rax) # CHECK-NEXT: 1.00 1.00 - - - - - 1.00 - 1.00 - - - - adcb $7, (%rax)
# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - adcb %sil, %dil # CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - adcb %sil, %dil
# CHECK-NEXT: 1.00 1.00 - - - - - 1.00 - 1.00 - - - - adcb %sil, (%rax) # CHECK-NEXT: 1.00 1.00 - - - - - 1.00 - 1.00 - - - - adcb %sil, (%rax)
▲ Show 20 Lines • Show All 184 Lines • ▼ Show 20 Lines
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - incb %dil # CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - incb %dil
# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - incb (%rax) # CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - incb (%rax)
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - incw %di # CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - incw %di
# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - incw (%rax) # CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - incw (%rax)
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - incl %edi # CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - incl %edi
# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - incl (%rax) # CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - incl (%rax)
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - incq %rdi # CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - incq %rdi
# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - incq (%rax) # CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - incq (%rax)
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - lahf
# CHECK-NEXT: - 1.00 - - - - - - 1.00 - - - - - mulb %dil # CHECK-NEXT: - 1.00 - - - - - - 1.00 - - - - - mulb %dil
# CHECK-NEXT: - 1.00 - - - - - 1.00 1.00 - - - - - mulb (%rax) # CHECK-NEXT: - 1.00 - - - - - 1.00 1.00 - - - - - mulb (%rax)
# CHECK-NEXT: - 1.00 - - - - - - 1.00 - - - - - mulw %si # CHECK-NEXT: - 1.00 - - - - - - 1.00 - - - - - mulw %si
# CHECK-NEXT: - 1.00 - - - - - 1.00 1.00 - - - - - mulw (%rax) # CHECK-NEXT: - 1.00 - - - - - 1.00 1.00 - - - - - mulw (%rax)
# CHECK-NEXT: - 1.00 - - - - - - 1.00 - - - - - mull %edx # CHECK-NEXT: - 1.00 - - - - - - 1.00 - - - - - mull %edx
# CHECK-NEXT: - 1.00 - - - - - 1.00 1.00 - - - - - mull (%rax) # CHECK-NEXT: - 1.00 - - - - - 1.00 1.00 - - - - - mull (%rax)
# CHECK-NEXT: - 1.00 - - - - - - 4.00 - - - - - mulq %rcx # CHECK-NEXT: - 1.00 - - - - - - 4.00 - - - - - mulq %rcx
# CHECK-NEXT: - 1.00 - - - - - 1.00 4.00 - - - - - mulq (%rax) # CHECK-NEXT: - 1.00 - - - - - 1.00 4.00 - - - - - mulq (%rax)
▲ Show 20 Lines • Show All 141 Lines • ▼ Show 20 Lines
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - rolq $7, %rdi # CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - rolq $7, %rdi
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - rorq $7, %rdi # CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - rorq $7, %rdi
# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - rolq $7, (%rax) # CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - rolq $7, (%rax)
# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - rorq $7, (%rax) # CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - rorq $7, (%rax)
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - rolq %cl, %rdi # CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - rolq %cl, %rdi
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - rorq %cl, %rdi # CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - rorq %cl, %rdi
# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - rolq %cl, (%rax) # CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - rolq %cl, (%rax)
# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - rorq %cl, (%rax) # CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - rorq %cl, (%rax)
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - sahf
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - sarb %dil # CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - sarb %dil
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - shlb %dil # CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - shlb %dil
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - shrb %dil # CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - shrb %dil
# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - sarb (%rax) # CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - sarb (%rax)
# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - shlb (%rax) # CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - shlb (%rax)
# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - shrb (%rax) # CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - 1.00 - - - - shrb (%rax)
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - sarb $7, %dil # CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - sarb $7, %dil
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - shlb $7, %dil # CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - shlb $7, %dil
▲ Show 20 Lines • Show All 178 Lines • Show Last 20 Lines

test/tools/llvm-mca/X86/Generic/resources-x86_64.s

Show First 20 Lines • Show All 216 Lines • ▼ Show 20 Lines
incb (%rax) incb (%rax)
incw %di incw %di
incw (%rax) incw (%rax)
incl %edi incl %edi
incl (%rax) incl (%rax)
incq %rdi incq %rdi
incq (%rax) incq (%rax)
lahf
mulb %dil mulb %dil
mulb (%rax) mulb (%rax)
mulw %si mulw %si
mulw (%rax) mulw (%rax)
mull %edx mull %edx
mull (%rax) mull (%rax)
mulq %rcx mulq %rcx
mulq (%rax) mulq (%rax)
▲ Show 20 Lines • Show All 157 Lines • ▼ Show 20 Lines
rorq $7, %rdi rorq $7, %rdi
rolq $7, (%rax) rolq $7, (%rax)
rorq $7, (%rax) rorq $7, (%rax)
rolq %cl, %rdi rolq %cl, %rdi
rorq %cl, %rdi rorq %cl, %rdi
rolq %cl, (%rax) rolq %cl, (%rax)
rorq %cl, (%rax) rorq %cl, (%rax)
sahf
sarb %dil sarb %dil
shlb %dil shlb %dil
shrb %dil shrb %dil
sarb (%rax) sarb (%rax)
shlb (%rax) shlb (%rax)
shrb (%rax) shrb (%rax)
sarb $7, %dil sarb $7, %dil
shlb $7, %dil shlb $7, %dil
▲ Show 20 Lines • Show All 1,303 Lines • Show Last 20 Lines

test/tools/llvm-mca/X86/Haswell/resources-x86_64.s

Show First 20 Lines • Show All 216 Lines • ▼ Show 20 Lines
incb (%rax) incb (%rax)
incw %di incw %di
incw (%rax) incw (%rax)
incl %edi incl %edi
incl (%rax) incl (%rax)
incq %rdi incq %rdi
incq (%rax) incq (%rax)
lahf
mulb %dil mulb %dil
mulb (%rax) mulb (%rax)
mulw %si mulw %si
mulw (%rax) mulw (%rax)
mull %edx mull %edx
mull (%rax) mull (%rax)
mulq %rcx mulq %rcx
mulq (%rax) mulq (%rax)
▲ Show 20 Lines • Show All 157 Lines • ▼ Show 20 Lines
rorq $7, %rdi rorq $7, %rdi
rolq $7, (%rax) rolq $7, (%rax)
rorq $7, (%rax) rorq $7, (%rax)
rolq %cl, %rdi rolq %cl, %rdi
rorq %cl, %rdi rorq %cl, %rdi
rolq %cl, (%rax) rolq %cl, (%rax)
rorq %cl, (%rax) rorq %cl, (%rax)
sahf
sarb %dil sarb %dil
shlb %dil shlb %dil
shrb %dil shrb %dil
sarb (%rax) sarb (%rax)
shlb (%rax) shlb (%rax)
shrb (%rax) shrb (%rax)
sarb $7, %dil sarb $7, %dil
shlb $7, %dil shlb $7, %dil
▲ Show 20 Lines • Show All 395 Lines • ▼ Show 20 Lines
# CHECK-NEXT: 1 1 0.25 incb %dil # CHECK-NEXT: 1 1 0.25 incb %dil
# CHECK-NEXT: 3 7 1.00 * * incb (%rax) # CHECK-NEXT: 3 7 1.00 * * incb (%rax)
# CHECK-NEXT: 1 1 0.25 incw %di # CHECK-NEXT: 1 1 0.25 incw %di
# CHECK-NEXT: 3 7 1.00 * * incw (%rax) # CHECK-NEXT: 3 7 1.00 * * incw (%rax)
# CHECK-NEXT: 1 1 0.25 incl %edi # CHECK-NEXT: 1 1 0.25 incl %edi
# CHECK-NEXT: 3 7 1.00 * * incl (%rax) # CHECK-NEXT: 3 7 1.00 * * incl (%rax)
# CHECK-NEXT: 1 1 0.25 incq %rdi # CHECK-NEXT: 1 1 0.25 incq %rdi
# CHECK-NEXT: 3 7 1.00 * * incq (%rax) # CHECK-NEXT: 3 7 1.00 * * incq (%rax)
# CHECK-NEXT: 1 1 0.50 lahf
# CHECK-NEXT: 1 3 1.00 mulb %dil # CHECK-NEXT: 1 3 1.00 mulb %dil
# CHECK-NEXT: 2 8 1.00 * mulb (%rax) # CHECK-NEXT: 2 8 1.00 * mulb (%rax)
# CHECK-NEXT: 4 4 1.00 mulw %si # CHECK-NEXT: 4 4 1.00 mulw %si
# CHECK-NEXT: 5 9 1.00 * mulw (%rax) # CHECK-NEXT: 5 9 1.00 * mulw (%rax)
# CHECK-NEXT: 3 4 1.00 mull %edx # CHECK-NEXT: 3 4 1.00 mull %edx
# CHECK-NEXT: 4 9 1.00 * mull (%rax) # CHECK-NEXT: 4 9 1.00 * mull (%rax)
# CHECK-NEXT: 2 4 1.00 mulq %rcx # CHECK-NEXT: 2 4 1.00 mulq %rcx
# CHECK-NEXT: 3 9 1.00 * mulq (%rax) # CHECK-NEXT: 3 9 1.00 * mulq (%rax)
▲ Show 20 Lines • Show All 141 Lines • ▼ Show 20 Lines
# CHECK-NEXT: 2 2 1.00 rolq $7, %rdi # CHECK-NEXT: 2 2 1.00 rolq $7, %rdi
# CHECK-NEXT: 2 2 1.00 rorq $7, %rdi # CHECK-NEXT: 2 2 1.00 rorq $7, %rdi
# CHECK-NEXT: 5 8 1.00 * * rolq $7, (%rax) # CHECK-NEXT: 5 8 1.00 * * rolq $7, (%rax)
# CHECK-NEXT: 5 8 1.00 * * rorq $7, (%rax) # CHECK-NEXT: 5 8 1.00 * * rorq $7, (%rax)
# CHECK-NEXT: 3 3 1.00 rolq %cl, %rdi # CHECK-NEXT: 3 3 1.00 rolq %cl, %rdi
# CHECK-NEXT: 3 3 1.00 rorq %cl, %rdi # CHECK-NEXT: 3 3 1.00 rorq %cl, %rdi
# CHECK-NEXT: 6 9 1.00 * * rolq %cl, (%rax) # CHECK-NEXT: 6 9 1.00 * * rolq %cl, (%rax)
# CHECK-NEXT: 5 9 1.00 * * rorq %cl, (%rax) # CHECK-NEXT: 5 9 1.00 * * rorq %cl, (%rax)
# CHECK-NEXT: 1 1 0.50 sahf
# CHECK-NEXT: 1 1 0.50 sarb %dil # CHECK-NEXT: 1 1 0.50 sarb %dil
# CHECK-NEXT: 1 1 0.50 shlb %dil # CHECK-NEXT: 1 1 0.50 shlb %dil
# CHECK-NEXT: 1 1 0.50 shrb %dil # CHECK-NEXT: 1 1 0.50 shrb %dil
# CHECK-NEXT: 4 7 1.00 * * sarb (%rax) # CHECK-NEXT: 4 7 1.00 * * sarb (%rax)
# CHECK-NEXT: 4 7 1.00 * * shlb (%rax) # CHECK-NEXT: 4 7 1.00 * * shlb (%rax)
# CHECK-NEXT: 4 7 1.00 * * shrb (%rax) # CHECK-NEXT: 4 7 1.00 * * shrb (%rax)
# CHECK-NEXT: 1 1 0.50 sarb $7, %dil # CHECK-NEXT: 1 1 0.50 sarb $7, %dil
# CHECK-NEXT: 1 1 0.50 shlb $7, %dil # CHECK-NEXT: 1 1 0.50 shlb $7, %dil
▲ Show 20 Lines • Show All 185 Lines • ▼ Show 20 Lines
# CHECK-NEXT: [5] - HWPort3 # CHECK-NEXT: [5] - HWPort3
# CHECK-NEXT: [6] - HWPort4 # CHECK-NEXT: [6] - HWPort4
# CHECK-NEXT: [7] - HWPort5 # CHECK-NEXT: [7] - HWPort5
# CHECK-NEXT: [8] - HWPort6 # CHECK-NEXT: [8] - HWPort6
# CHECK-NEXT: [9] - HWPort7 # CHECK-NEXT: [9] - HWPort7
# CHECK: Resource pressure per iteration: # CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9]
# CHECK-NEXT: 80.00 - 413.00 263.50 193.00 193.00 158.00 171.00 407.50 66.00 # CHECK-NEXT: 80.00 - 414.00 263.50 193.00 193.00 158.00 171.00 408.50 66.00
# CHECK: Resource pressure by instruction: # CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: - - 0.75 0.25 - - - 0.25 0.75 - adcb $7, %al # CHECK-NEXT: - - 0.75 0.25 - - - 0.25 0.75 - adcb $7, %al
# CHECK-NEXT: - - 0.75 0.25 - - - 0.25 0.75 - adcb $7, %dil # CHECK-NEXT: - - 0.75 0.25 - - - 0.25 0.75 - adcb $7, %dil
# CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 adcb $7, (%rax) # CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 adcb $7, (%rax)
# CHECK-NEXT: - - 0.75 0.25 - - - 0.25 0.75 - adcb %sil, %dil # CHECK-NEXT: - - 0.75 0.25 - - - 0.25 0.75 - adcb %sil, %dil
# CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 adcb %sil, (%rax) # CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 adcb %sil, (%rax)
▲ Show 20 Lines • Show All 184 Lines • ▼ Show 20 Lines
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incb %dil # CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incb %dil
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incb (%rax) # CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incb (%rax)
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incw %di # CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incw %di
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incw (%rax) # CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incw (%rax)
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incl %edi # CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incl %edi
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incl (%rax) # CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incl (%rax)
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incq %rdi # CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incq %rdi
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incq (%rax) # CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incq (%rax)
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - lahf
# CHECK-NEXT: - - - 1.00 - - - - - - mulb %dil # CHECK-NEXT: - - - 1.00 - - - - - - mulb %dil
# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - mulb (%rax) # CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - mulb (%rax)
# CHECK-NEXT: - - 1.00 1.50 - - - 0.50 1.00 - mulw %si # CHECK-NEXT: - - 1.00 1.50 - - - 0.50 1.00 - mulw %si
# CHECK-NEXT: - - 1.00 1.50 0.50 0.50 - 0.50 1.00 - mulw (%rax) # CHECK-NEXT: - - 1.00 1.50 0.50 0.50 - 0.50 1.00 - mulw (%rax)
# CHECK-NEXT: - - 0.75 1.25 - - - 0.25 0.75 - mull %edx # CHECK-NEXT: - - 0.75 1.25 - - - 0.25 0.75 - mull %edx
# CHECK-NEXT: - - 0.75 1.25 0.50 0.50 - 0.25 0.75 - mull (%rax) # CHECK-NEXT: - - 0.75 1.25 0.50 0.50 - 0.25 0.75 - mull (%rax)
# CHECK-NEXT: - - - 1.00 - - - - 1.00 - mulq %rcx # CHECK-NEXT: - - - 1.00 - - - - 1.00 - mulq %rcx
# CHECK-NEXT: - - - 1.00 0.50 0.50 - - 1.00 - mulq (%rax) # CHECK-NEXT: - - - 1.00 0.50 0.50 - - 1.00 - mulq (%rax)
▲ Show 20 Lines • Show All 141 Lines • ▼ Show 20 Lines
# CHECK-NEXT: - - 1.00 - - - - - 1.00 - rolq $7, %rdi # CHECK-NEXT: - - 1.00 - - - - - 1.00 - rolq $7, %rdi
# CHECK-NEXT: - - 1.00 - - - - - 1.00 - rorq $7, %rdi # CHECK-NEXT: - - 1.00 - - - - - 1.00 - rorq $7, %rdi
# CHECK-NEXT: - - 1.00 - 0.83 0.83 1.00 - 1.00 0.33 rolq $7, (%rax) # CHECK-NEXT: - - 1.00 - 0.83 0.83 1.00 - 1.00 0.33 rolq $7, (%rax)
# CHECK-NEXT: - - 1.00 - 0.83 0.83 1.00 - 1.00 0.33 rorq $7, (%rax) # CHECK-NEXT: - - 1.00 - 0.83 0.83 1.00 - 1.00 0.33 rorq $7, (%rax)
# CHECK-NEXT: - - 1.25 0.25 - - - 0.25 1.25 - rolq %cl, %rdi # CHECK-NEXT: - - 1.25 0.25 - - - 0.25 1.25 - rolq %cl, %rdi
# CHECK-NEXT: - - 1.25 0.25 - - - 0.25 1.25 - rorq %cl, %rdi # CHECK-NEXT: - - 1.25 0.25 - - - 0.25 1.25 - rorq %cl, %rdi
# CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 rolq %cl, (%rax) # CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 rolq %cl, (%rax)
# CHECK-NEXT: - - 1.25 0.25 0.83 0.83 - 0.25 1.25 0.33 rorq %cl, (%rax) # CHECK-NEXT: - - 1.25 0.25 0.83 0.83 - 0.25 1.25 0.33 rorq %cl, (%rax)
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sahf
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarb %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarb %dil
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlb %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlb %dil
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shrb %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - shrb %dil
# CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 sarb (%rax) # CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 sarb (%rax)
# CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 shlb (%rax) # CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 shlb (%rax)
# CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 shrb (%rax) # CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 shrb (%rax)
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarb $7, %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarb $7, %dil
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlb $7, %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlb $7, %dil
▲ Show 20 Lines • Show All 178 Lines • Show Last 20 Lines

test/tools/llvm-mca/X86/SLM/resources-x86_64.s

Show First 20 Lines • Show All 216 Lines • ▼ Show 20 Lines
incb (%rax) incb (%rax)
incw %di incw %di
incw (%rax) incw (%rax)
incl %edi incl %edi
incl (%rax) incl (%rax)
incq %rdi incq %rdi
incq (%rax) incq (%rax)
lahf
mulb %dil mulb %dil
mulb (%rax) mulb (%rax)
mulw %si mulw %si
mulw (%rax) mulw (%rax)
mull %edx mull %edx
mull (%rax) mull (%rax)
mulq %rcx mulq %rcx
mulq (%rax) mulq (%rax)
▲ Show 20 Lines • Show All 157 Lines • ▼ Show 20 Lines
rorq $7, %rdi rorq $7, %rdi
rolq $7, (%rax) rolq $7, (%rax)
rorq $7, (%rax) rorq $7, (%rax)
rolq %cl, %rdi rolq %cl, %rdi
rorq %cl, %rdi rorq %cl, %rdi
rolq %cl, (%rax) rolq %cl, (%rax)
rorq %cl, (%rax) rorq %cl, (%rax)
sahf
sarb %dil sarb %dil
shlb %dil shlb %dil
shrb %dil shrb %dil
sarb (%rax) sarb (%rax)
shlb (%rax) shlb (%rax)
shrb (%rax) shrb (%rax)
sarb $7, %dil sarb $7, %dil
shlb $7, %dil shlb $7, %dil
▲ Show 20 Lines • Show All 395 Lines • ▼ Show 20 Lines
# CHECK-NEXT: 1 1 0.50 incb %dil # CHECK-NEXT: 1 1 0.50 incb %dil
# CHECK-NEXT: 2 5 2.00 * * incb (%rax) # CHECK-NEXT: 2 5 2.00 * * incb (%rax)
# CHECK-NEXT: 1 1 0.50 incw %di # CHECK-NEXT: 1 1 0.50 incw %di
# CHECK-NEXT: 2 5 2.00 * * incw (%rax) # CHECK-NEXT: 2 5 2.00 * * incw (%rax)
# CHECK-NEXT: 1 1 0.50 incl %edi # CHECK-NEXT: 1 1 0.50 incl %edi
# CHECK-NEXT: 2 5 2.00 * * incl (%rax) # CHECK-NEXT: 2 5 2.00 * * incl (%rax)
# CHECK-NEXT: 1 1 0.50 incq %rdi # CHECK-NEXT: 1 1 0.50 incq %rdi
# CHECK-NEXT: 2 5 2.00 * * incq (%rax) # CHECK-NEXT: 2 5 2.00 * * incq (%rax)
# CHECK-NEXT: 1 1 0.50 lahf
# CHECK-NEXT: 1 3 1.00 mulb %dil # CHECK-NEXT: 1 3 1.00 mulb %dil
# CHECK-NEXT: 1 6 1.00 * mulb (%rax) # CHECK-NEXT: 1 6 1.00 * mulb (%rax)
# CHECK-NEXT: 1 3 1.00 mulw %si # CHECK-NEXT: 1 3 1.00 mulw %si
# CHECK-NEXT: 1 6 1.00 * mulw (%rax) # CHECK-NEXT: 1 6 1.00 * mulw (%rax)
# CHECK-NEXT: 1 3 1.00 mull %edx # CHECK-NEXT: 1 3 1.00 mull %edx
# CHECK-NEXT: 1 6 1.00 * mull (%rax) # CHECK-NEXT: 1 6 1.00 * mull (%rax)
# CHECK-NEXT: 1 3 1.00 mulq %rcx # CHECK-NEXT: 1 3 1.00 mulq %rcx
# CHECK-NEXT: 1 6 1.00 * mulq (%rax) # CHECK-NEXT: 1 6 1.00 * mulq (%rax)
▲ Show 20 Lines • Show All 141 Lines • ▼ Show 20 Lines
# CHECK-NEXT: 1 1 1.00 rolq $7, %rdi # CHECK-NEXT: 1 1 1.00 rolq $7, %rdi
# CHECK-NEXT: 1 1 1.00 rorq $7, %rdi # CHECK-NEXT: 1 1 1.00 rorq $7, %rdi
# CHECK-NEXT: 2 4 2.00 * * rolq $7, (%rax) # CHECK-NEXT: 2 4 2.00 * * rolq $7, (%rax)
# CHECK-NEXT: 2 4 2.00 * * rorq $7, (%rax) # CHECK-NEXT: 2 4 2.00 * * rorq $7, (%rax)
# CHECK-NEXT: 1 1 1.00 rolq %cl, %rdi # CHECK-NEXT: 1 1 1.00 rolq %cl, %rdi
# CHECK-NEXT: 1 1 1.00 rorq %cl, %rdi # CHECK-NEXT: 1 1 1.00 rorq %cl, %rdi
# CHECK-NEXT: 2 4 2.00 * * rolq %cl, (%rax) # CHECK-NEXT: 2 4 2.00 * * rolq %cl, (%rax)
# CHECK-NEXT: 2 4 2.00 * * rorq %cl, (%rax) # CHECK-NEXT: 2 4 2.00 * * rorq %cl, (%rax)
# CHECK-NEXT: 1 1 0.50 sahf
# CHECK-NEXT: 1 1 1.00 sarb %dil # CHECK-NEXT: 1 1 1.00 sarb %dil
# CHECK-NEXT: 1 1 1.00 shlb %dil # CHECK-NEXT: 1 1 1.00 shlb %dil
# CHECK-NEXT: 1 1 1.00 shrb %dil # CHECK-NEXT: 1 1 1.00 shrb %dil
# CHECK-NEXT: 2 4 2.00 * * sarb (%rax) # CHECK-NEXT: 2 4 2.00 * * sarb (%rax)
# CHECK-NEXT: 2 4 2.00 * * shlb (%rax) # CHECK-NEXT: 2 4 2.00 * * shlb (%rax)
# CHECK-NEXT: 2 4 2.00 * * shrb (%rax) # CHECK-NEXT: 2 4 2.00 * * shrb (%rax)
# CHECK-NEXT: 1 1 1.00 sarb $7, %dil # CHECK-NEXT: 1 1 1.00 sarb $7, %dil
# CHECK-NEXT: 1 1 1.00 shlb $7, %dil # CHECK-NEXT: 1 1 1.00 shlb $7, %dil
▲ Show 20 Lines • Show All 183 Lines • ▼ Show 20 Lines
# CHECK-NEXT: [3] - SLM_FPC_RSV0 # CHECK-NEXT: [3] - SLM_FPC_RSV0
# CHECK-NEXT: [4] - SLM_FPC_RSV1 # CHECK-NEXT: [4] - SLM_FPC_RSV1
# CHECK-NEXT: [5] - SLM_IEC_RSV0 # CHECK-NEXT: [5] - SLM_IEC_RSV0
# CHECK-NEXT: [6] - SLM_IEC_RSV1 # CHECK-NEXT: [6] - SLM_IEC_RSV1
# CHECK-NEXT: [7] - SLM_MEC_RSV # CHECK-NEXT: [7] - SLM_MEC_RSV
# CHECK: Resource pressure per iteration: # CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]
# CHECK-NEXT: 400.00 - - - - 392.00 234.00 470.00 # CHECK-NEXT: 400.00 - - - - 393.00 235.00 470.00
# CHECK: Resource pressure by instruction: # CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] Instructions: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] Instructions:
# CHECK-NEXT: - - - - - 0.50 0.50 - adcb $7, %al # CHECK-NEXT: - - - - - 0.50 0.50 - adcb $7, %al
# CHECK-NEXT: - - - - - 0.50 0.50 - adcb $7, %dil # CHECK-NEXT: - - - - - 0.50 0.50 - adcb $7, %dil
# CHECK-NEXT: - - - - - 1.00 1.00 2.00 adcb $7, (%rax) # CHECK-NEXT: - - - - - 1.00 1.00 2.00 adcb $7, (%rax)
# CHECK-NEXT: - - - - - 0.50 0.50 - adcb %sil, %dil # CHECK-NEXT: - - - - - 0.50 0.50 - adcb %sil, %dil
# CHECK-NEXT: - - - - - 1.00 1.00 2.00 adcb %sil, (%rax) # CHECK-NEXT: - - - - - 1.00 1.00 2.00 adcb %sil, (%rax)
▲ Show 20 Lines • Show All 184 Lines • ▼ Show 20 Lines
# CHECK-NEXT: - - - - - 0.50 0.50 - incb %dil # CHECK-NEXT: - - - - - 0.50 0.50 - incb %dil
# CHECK-NEXT: - - - - - 1.00 1.00 2.00 incb (%rax) # CHECK-NEXT: - - - - - 1.00 1.00 2.00 incb (%rax)
# CHECK-NEXT: - - - - - 0.50 0.50 - incw %di # CHECK-NEXT: - - - - - 0.50 0.50 - incw %di
# CHECK-NEXT: - - - - - 1.00 1.00 2.00 incw (%rax) # CHECK-NEXT: - - - - - 1.00 1.00 2.00 incw (%rax)
# CHECK-NEXT: - - - - - 0.50 0.50 - incl %edi # CHECK-NEXT: - - - - - 0.50 0.50 - incl %edi
# CHECK-NEXT: - - - - - 1.00 1.00 2.00 incl (%rax) # CHECK-NEXT: - - - - - 1.00 1.00 2.00 incl (%rax)
# CHECK-NEXT: - - - - - 0.50 0.50 - incq %rdi # CHECK-NEXT: - - - - - 0.50 0.50 - incq %rdi
# CHECK-NEXT: - - - - - 1.00 1.00 2.00 incq (%rax) # CHECK-NEXT: - - - - - 1.00 1.00 2.00 incq (%rax)
# CHECK-NEXT: - - - - - 0.50 0.50 - lahf
# CHECK-NEXT: - - - - - - 1.00 - mulb %dil # CHECK-NEXT: - - - - - - 1.00 - mulb %dil
# CHECK-NEXT: - - - - - - 1.00 1.00 mulb (%rax) # CHECK-NEXT: - - - - - - 1.00 1.00 mulb (%rax)
# CHECK-NEXT: - - - - - - 1.00 - mulw %si # CHECK-NEXT: - - - - - - 1.00 - mulw %si
# CHECK-NEXT: - - - - - - 1.00 1.00 mulw (%rax) # CHECK-NEXT: - - - - - - 1.00 1.00 mulw (%rax)
# CHECK-NEXT: - - - - - - 1.00 - mull %edx # CHECK-NEXT: - - - - - - 1.00 - mull %edx
# CHECK-NEXT: - - - - - - 1.00 1.00 mull (%rax) # CHECK-NEXT: - - - - - - 1.00 1.00 mull (%rax)
# CHECK-NEXT: - - - - - - 1.00 - mulq %rcx # CHECK-NEXT: - - - - - - 1.00 - mulq %rcx
# CHECK-NEXT: - - - - - - 1.00 1.00 mulq (%rax) # CHECK-NEXT: - - - - - - 1.00 1.00 mulq (%rax)
▲ Show 20 Lines • Show All 141 Lines • ▼ Show 20 Lines
# CHECK-NEXT: - - - - - 1.00 - - rolq $7, %rdi # CHECK-NEXT: - - - - - 1.00 - - rolq $7, %rdi
# CHECK-NEXT: - - - - - 1.00 - - rorq $7, %rdi # CHECK-NEXT: - - - - - 1.00 - - rorq $7, %rdi
# CHECK-NEXT: - - - - - 1.00 - 2.00 rolq $7, (%rax) # CHECK-NEXT: - - - - - 1.00 - 2.00 rolq $7, (%rax)
# CHECK-NEXT: - - - - - 1.00 - 2.00 rorq $7, (%rax) # CHECK-NEXT: - - - - - 1.00 - 2.00 rorq $7, (%rax)
# CHECK-NEXT: - - - - - 1.00 - - rolq %cl, %rdi # CHECK-NEXT: - - - - - 1.00 - - rolq %cl, %rdi
# CHECK-NEXT: - - - - - 1.00 - - rorq %cl, %rdi # CHECK-NEXT: - - - - - 1.00 - - rorq %cl, %rdi
# CHECK-NEXT: - - - - - 1.00 - 2.00 rolq %cl, (%rax) # CHECK-NEXT: - - - - - 1.00 - 2.00 rolq %cl, (%rax)
# CHECK-NEXT: - - - - - 1.00 - 2.00 rorq %cl, (%rax) # CHECK-NEXT: - - - - - 1.00 - 2.00 rorq %cl, (%rax)
# CHECK-NEXT: - - - - - 0.50 0.50 - sahf
# CHECK-NEXT: - - - - - 1.00 - - sarb %dil # CHECK-NEXT: - - - - - 1.00 - - sarb %dil
# CHECK-NEXT: - - - - - 1.00 - - shlb %dil # CHECK-NEXT: - - - - - 1.00 - - shlb %dil
# CHECK-NEXT: - - - - - 1.00 - - shrb %dil # CHECK-NEXT: - - - - - 1.00 - - shrb %dil
# CHECK-NEXT: - - - - - 1.00 - 2.00 sarb (%rax) # CHECK-NEXT: - - - - - 1.00 - 2.00 sarb (%rax)
# CHECK-NEXT: - - - - - 1.00 - 2.00 shlb (%rax) # CHECK-NEXT: - - - - - 1.00 - 2.00 shlb (%rax)
# CHECK-NEXT: - - - - - 1.00 - 2.00 shrb (%rax) # CHECK-NEXT: - - - - - 1.00 - 2.00 shrb (%rax)
# CHECK-NEXT: - - - - - 1.00 - - sarb $7, %dil # CHECK-NEXT: - - - - - 1.00 - - sarb $7, %dil
# CHECK-NEXT: - - - - - 1.00 - - shlb $7, %dil # CHECK-NEXT: - - - - - 1.00 - - shlb $7, %dil
▲ Show 20 Lines • Show All 178 Lines • Show Last 20 Lines

test/tools/llvm-mca/X86/SandyBridge/resources-x86_64.s

Show First 20 Lines • Show All 216 Lines • ▼ Show 20 Lines
incb (%rax) incb (%rax)
incw %di incw %di
incw (%rax) incw (%rax)
incl %edi incl %edi
incl (%rax) incl (%rax)
incq %rdi incq %rdi
incq (%rax) incq (%rax)
lahf
mulb %dil mulb %dil
mulb (%rax) mulb (%rax)
mulw %si mulw %si
mulw (%rax) mulw (%rax)
mull %edx mull %edx
mull (%rax) mull (%rax)
mulq %rcx mulq %rcx
mulq (%rax) mulq (%rax)
▲ Show 20 Lines • Show All 157 Lines • ▼ Show 20 Lines
rorq $7, %rdi rorq $7, %rdi
rolq $7, (%rax) rolq $7, (%rax)
rorq $7, (%rax) rorq $7, (%rax)
rolq %cl, %rdi rolq %cl, %rdi
rorq %cl, %rdi rorq %cl, %rdi
rolq %cl, (%rax) rolq %cl, (%rax)
rorq %cl, (%rax) rorq %cl, (%rax)
sahf
sarb %dil sarb %dil
shlb %dil shlb %dil
shrb %dil shrb %dil
sarb (%rax) sarb (%rax)
shlb (%rax) shlb (%rax)
shrb (%rax) shrb (%rax)
sarb $7, %dil sarb $7, %dil
shlb $7, %dil shlb $7, %dil
▲ Show 20 Lines • Show All 395 Lines • ▼ Show 20 Lines
# CHECK-NEXT: 1 1 0.33 incb %dil # CHECK-NEXT: 1 1 0.33 incb %dil
# CHECK-NEXT: 3 7 1.00 * * incb (%rax) # CHECK-NEXT: 3 7 1.00 * * incb (%rax)
# CHECK-NEXT: 1 1 0.33 incw %di # CHECK-NEXT: 1 1 0.33 incw %di
# CHECK-NEXT: 3 7 1.00 * * incw (%rax) # CHECK-NEXT: 3 7 1.00 * * incw (%rax)
# CHECK-NEXT: 1 1 0.33 incl %edi # CHECK-NEXT: 1 1 0.33 incl %edi
# CHECK-NEXT: 3 7 1.00 * * incl (%rax) # CHECK-NEXT: 3 7 1.00 * * incl (%rax)
# CHECK-NEXT: 1 1 0.33 incq %rdi # CHECK-NEXT: 1 1 0.33 incq %rdi
# CHECK-NEXT: 3 7 1.00 * * incq (%rax) # CHECK-NEXT: 3 7 1.00 * * incq (%rax)
# CHECK-NEXT: 1 1 0.50 lahf
# CHECK-NEXT: 1 3 1.00 mulb %dil # CHECK-NEXT: 1 3 1.00 mulb %dil
# CHECK-NEXT: 2 8 1.00 * mulb (%rax) # CHECK-NEXT: 2 8 1.00 * mulb (%rax)
# CHECK-NEXT: 4 4 1.33 mulw %si # CHECK-NEXT: 4 4 1.33 mulw %si
# CHECK-NEXT: 5 9 1.33 * mulw (%rax) # CHECK-NEXT: 5 9 1.33 * mulw (%rax)
# CHECK-NEXT: 3 4 1.00 mull %edx # CHECK-NEXT: 3 4 1.00 mull %edx
# CHECK-NEXT: 4 9 1.00 * mull (%rax) # CHECK-NEXT: 4 9 1.00 * mull (%rax)
# CHECK-NEXT: 2 4 1.00 mulq %rcx # CHECK-NEXT: 2 4 1.00 mulq %rcx
# CHECK-NEXT: 3 9 1.00 * mulq (%rax) # CHECK-NEXT: 3 9 1.00 * mulq (%rax)
▲ Show 20 Lines • Show All 141 Lines • ▼ Show 20 Lines
# CHECK-NEXT: 2 2 1.00 rolq $7, %rdi # CHECK-NEXT: 2 2 1.00 rolq $7, %rdi
# CHECK-NEXT: 2 2 1.00 rorq $7, %rdi # CHECK-NEXT: 2 2 1.00 rorq $7, %rdi
# CHECK-NEXT: 5 8 1.00 * * rolq $7, (%rax) # CHECK-NEXT: 5 8 1.00 * * rolq $7, (%rax)
# CHECK-NEXT: 5 8 1.00 * * rorq $7, (%rax) # CHECK-NEXT: 5 8 1.00 * * rorq $7, (%rax)
# CHECK-NEXT: 3 3 1.50 rolq %cl, %rdi # CHECK-NEXT: 3 3 1.50 rolq %cl, %rdi
# CHECK-NEXT: 3 3 1.50 rorq %cl, %rdi # CHECK-NEXT: 3 3 1.50 rorq %cl, %rdi
# CHECK-NEXT: 6 9 1.50 * * rolq %cl, (%rax) # CHECK-NEXT: 6 9 1.50 * * rolq %cl, (%rax)
# CHECK-NEXT: 6 9 1.50 * * rorq %cl, (%rax) # CHECK-NEXT: 6 9 1.50 * * rorq %cl, (%rax)
# CHECK-NEXT: 1 1 0.50 sahf
# CHECK-NEXT: 1 1 0.50 sarb %dil # CHECK-NEXT: 1 1 0.50 sarb %dil
# CHECK-NEXT: 1 1 0.50 shlb %dil # CHECK-NEXT: 1 1 0.50 shlb %dil
# CHECK-NEXT: 1 1 0.50 shrb %dil # CHECK-NEXT: 1 1 0.50 shrb %dil
# CHECK-NEXT: 4 7 1.00 * * sarb (%rax) # CHECK-NEXT: 4 7 1.00 * * sarb (%rax)
# CHECK-NEXT: 4 7 1.00 * * shlb (%rax) # CHECK-NEXT: 4 7 1.00 * * shlb (%rax)
# CHECK-NEXT: 4 7 1.00 * * shrb (%rax) # CHECK-NEXT: 4 7 1.00 * * shrb (%rax)
# CHECK-NEXT: 1 1 0.50 sarb $7, %dil # CHECK-NEXT: 1 1 0.50 sarb $7, %dil
# CHECK-NEXT: 1 1 0.50 shlb $7, %dil # CHECK-NEXT: 1 1 0.50 shlb $7, %dil
▲ Show 20 Lines • Show All 183 Lines • ▼ Show 20 Lines
# CHECK-NEXT: [3] - SBPort1 # CHECK-NEXT: [3] - SBPort1
# CHECK-NEXT: [4] - SBPort4 # CHECK-NEXT: [4] - SBPort4
# CHECK-NEXT: [5] - SBPort5 # CHECK-NEXT: [5] - SBPort5
# CHECK-NEXT: [6.0] - SBPort23 # CHECK-NEXT: [6.0] - SBPort23
# CHECK-NEXT: [6.1] - SBPort23 # CHECK-NEXT: [6.1] - SBPort23
# CHECK: Resource pressure per iteration: # CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1]
# CHECK-NEXT: 160.00 - 346.33 141.33 210.00 338.33 238.00 238.00 # CHECK-NEXT: 160.00 - 347.33 141.33 210.00 339.33 238.00 238.00
# CHECK: Resource pressure by instruction: # CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcb $7, %al # CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcb $7, %al
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcb $7, %dil # CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcb $7, %dil
# CHECK-NEXT: - - 1.00 1.00 1.00 1.00 1.00 1.00 adcb $7, (%rax) # CHECK-NEXT: - - 1.00 1.00 1.00 1.00 1.00 1.00 adcb $7, (%rax)
# CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcb %sil, %dil # CHECK-NEXT: - - 0.83 0.33 - 0.83 - - adcb %sil, %dil
# CHECK-NEXT: - - 1.33 0.33 1.00 1.33 1.00 1.00 adcb %sil, (%rax) # CHECK-NEXT: - - 1.33 0.33 1.00 1.33 1.00 1.00 adcb %sil, (%rax)
▲ Show 20 Lines • Show All 184 Lines • ▼ Show 20 Lines
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - incb %dil # CHECK-NEXT: - - 0.33 0.33 - 0.33 - - incb %dil
# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 incb (%rax) # CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 incb (%rax)
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - incw %di # CHECK-NEXT: - - 0.33 0.33 - 0.33 - - incw %di
# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 incw (%rax) # CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 incw (%rax)
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - incl %edi # CHECK-NEXT: - - 0.33 0.33 - 0.33 - - incl %edi
# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 incl (%rax) # CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 incl (%rax)
# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - incq %rdi # CHECK-NEXT: - - 0.33 0.33 - 0.33 - - incq %rdi
# CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 incq (%rax) # CHECK-NEXT: - - 0.33 0.33 1.00 0.33 1.00 1.00 incq (%rax)
# CHECK-NEXT: - - 0.50 - - 0.50 - - lahf
# CHECK-NEXT: - - - 1.00 - - - - mulb %dil # CHECK-NEXT: - - - 1.00 - - - - mulb %dil
# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 mulb (%rax) # CHECK-NEXT: - - - 1.00 - - 0.50 0.50 mulb (%rax)
# CHECK-NEXT: - - 1.17 1.67 - 1.17 - - mulw %si # CHECK-NEXT: - - 1.17 1.67 - 1.17 - - mulw %si
# CHECK-NEXT: - - 1.17 1.67 - 1.17 0.50 0.50 mulw (%rax) # CHECK-NEXT: - - 1.17 1.67 - 1.17 0.50 0.50 mulw (%rax)
# CHECK-NEXT: - - 0.83 1.33 - 0.83 - - mull %edx # CHECK-NEXT: - - 0.83 1.33 - 0.83 - - mull %edx
# CHECK-NEXT: - - 0.83 1.33 - 0.83 0.50 0.50 mull (%rax) # CHECK-NEXT: - - 0.83 1.33 - 0.83 0.50 0.50 mull (%rax)
# CHECK-NEXT: - - 1.00 1.00 - - - - mulq %rcx # CHECK-NEXT: - - 1.00 1.00 - - - - mulq %rcx
# CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 mulq (%rax) # CHECK-NEXT: - - 1.00 1.00 - - 0.50 0.50 mulq (%rax)
▲ Show 20 Lines • Show All 141 Lines • ▼ Show 20 Lines
# CHECK-NEXT: - - 1.00 - - 1.00 - - rolq $7, %rdi # CHECK-NEXT: - - 1.00 - - 1.00 - - rolq $7, %rdi
# CHECK-NEXT: - - 1.00 - - 1.00 - - rorq $7, %rdi # CHECK-NEXT: - - 1.00 - - 1.00 - - rorq $7, %rdi
# CHECK-NEXT: - - 1.00 - 1.00 1.00 1.00 1.00 rolq $7, (%rax) # CHECK-NEXT: - - 1.00 - 1.00 1.00 1.00 1.00 rolq $7, (%rax)
# CHECK-NEXT: - - 1.00 - 1.00 1.00 1.00 1.00 rorq $7, (%rax) # CHECK-NEXT: - - 1.00 - 1.00 1.00 1.00 1.00 rorq $7, (%rax)
# CHECK-NEXT: - - 1.50 - - 1.50 - - rolq %cl, %rdi # CHECK-NEXT: - - 1.50 - - 1.50 - - rolq %cl, %rdi
# CHECK-NEXT: - - 1.50 - - 1.50 - - rorq %cl, %rdi # CHECK-NEXT: - - 1.50 - - 1.50 - - rorq %cl, %rdi
# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 rolq %cl, (%rax) # CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 rolq %cl, (%rax)
# CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 rorq %cl, (%rax) # CHECK-NEXT: - - 1.50 - 1.00 1.50 1.00 1.00 rorq %cl, (%rax)
# CHECK-NEXT: - - 0.50 - - 0.50 - - sahf
# CHECK-NEXT: - - 0.50 - - 0.50 - - sarb %dil # CHECK-NEXT: - - 0.50 - - 0.50 - - sarb %dil
# CHECK-NEXT: - - 0.50 - - 0.50 - - shlb %dil # CHECK-NEXT: - - 0.50 - - 0.50 - - shlb %dil
# CHECK-NEXT: - - 0.50 - - 0.50 - - shrb %dil # CHECK-NEXT: - - 0.50 - - 0.50 - - shrb %dil
# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 sarb (%rax) # CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 sarb (%rax)
# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 shlb (%rax) # CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 shlb (%rax)
# CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 shrb (%rax) # CHECK-NEXT: - - 0.50 - 1.00 0.50 1.00 1.00 shrb (%rax)
# CHECK-NEXT: - - 0.50 - - 0.50 - - sarb $7, %dil # CHECK-NEXT: - - 0.50 - - 0.50 - - sarb $7, %dil
# CHECK-NEXT: - - 0.50 - - 0.50 - - shlb $7, %dil # CHECK-NEXT: - - 0.50 - - 0.50 - - shlb $7, %dil
▲ Show 20 Lines • Show All 178 Lines • Show Last 20 Lines

test/tools/llvm-mca/X86/SkylakeClient/resources-x86_64.s

Show First 20 Lines • Show All 216 Lines • ▼ Show 20 Lines
incb (%rax) incb (%rax)
incw %di incw %di
incw (%rax) incw (%rax)
incl %edi incl %edi
incl (%rax) incl (%rax)
incq %rdi incq %rdi
incq (%rax) incq (%rax)
lahf
mulb %dil mulb %dil
mulb (%rax) mulb (%rax)
mulw %si mulw %si
mulw (%rax) mulw (%rax)
mull %edx mull %edx
mull (%rax) mull (%rax)
mulq %rcx mulq %rcx
mulq (%rax) mulq (%rax)
▲ Show 20 Lines • Show All 157 Lines • ▼ Show 20 Lines
rorq $7, %rdi rorq $7, %rdi
rolq $7, (%rax) rolq $7, (%rax)
rorq $7, (%rax) rorq $7, (%rax)
rolq %cl, %rdi rolq %cl, %rdi
rorq %cl, %rdi rorq %cl, %rdi
rolq %cl, (%rax) rolq %cl, (%rax)
rorq %cl, (%rax) rorq %cl, (%rax)
sahf
sarb %dil sarb %dil
shlb %dil shlb %dil
shrb %dil shrb %dil
sarb (%rax) sarb (%rax)
shlb (%rax) shlb (%rax)
shrb (%rax) shrb (%rax)
sarb $7, %dil sarb $7, %dil
shlb $7, %dil shlb $7, %dil
▲ Show 20 Lines • Show All 395 Lines • ▼ Show 20 Lines
# CHECK-NEXT: 1 1 0.25 incb %dil # CHECK-NEXT: 1 1 0.25 incb %dil
# CHECK-NEXT: 3 7 1.00 * * incb (%rax) # CHECK-NEXT: 3 7 1.00 * * incb (%rax)
# CHECK-NEXT: 1 1 0.25 incw %di # CHECK-NEXT: 1 1 0.25 incw %di
# CHECK-NEXT: 3 7 1.00 * * incw (%rax) # CHECK-NEXT: 3 7 1.00 * * incw (%rax)
# CHECK-NEXT: 1 1 0.25 incl %edi # CHECK-NEXT: 1 1 0.25 incl %edi
# CHECK-NEXT: 3 7 1.00 * * incl (%rax) # CHECK-NEXT: 3 7 1.00 * * incl (%rax)
# CHECK-NEXT: 1 1 0.25 incq %rdi # CHECK-NEXT: 1 1 0.25 incq %rdi
# CHECK-NEXT: 3 7 1.00 * * incq (%rax) # CHECK-NEXT: 3 7 1.00 * * incq (%rax)
# CHECK-NEXT: 1 1 0.50 lahf
# CHECK-NEXT: 1 3 1.00 mulb %dil # CHECK-NEXT: 1 3 1.00 mulb %dil
# CHECK-NEXT: 2 8 1.00 * mulb (%rax) # CHECK-NEXT: 2 8 1.00 * mulb (%rax)
# CHECK-NEXT: 4 4 1.00 mulw %si # CHECK-NEXT: 4 4 1.00 mulw %si
# CHECK-NEXT: 5 9 1.00 * mulw (%rax) # CHECK-NEXT: 5 9 1.00 * mulw (%rax)
# CHECK-NEXT: 3 4 1.00 mull %edx # CHECK-NEXT: 3 4 1.00 mull %edx
# CHECK-NEXT: 4 9 1.00 * mull (%rax) # CHECK-NEXT: 4 9 1.00 * mull (%rax)
# CHECK-NEXT: 2 4 1.00 mulq %rcx # CHECK-NEXT: 2 4 1.00 mulq %rcx
# CHECK-NEXT: 3 9 1.00 * mulq (%rax) # CHECK-NEXT: 3 9 1.00 * mulq (%rax)
▲ Show 20 Lines • Show All 141 Lines • ▼ Show 20 Lines
# CHECK-NEXT: 2 2 1.00 rolq $7, %rdi # CHECK-NEXT: 2 2 1.00 rolq $7, %rdi
# CHECK-NEXT: 2 2 1.00 rorq $7, %rdi # CHECK-NEXT: 2 2 1.00 rorq $7, %rdi
# CHECK-NEXT: 5 7 1.00 * * rolq $7, (%rax) # CHECK-NEXT: 5 7 1.00 * * rolq $7, (%rax)
# CHECK-NEXT: 5 7 1.00 * * rorq $7, (%rax) # CHECK-NEXT: 5 7 1.00 * * rorq $7, (%rax)
# CHECK-NEXT: 3 3 1.50 rolq %cl, %rdi # CHECK-NEXT: 3 3 1.50 rolq %cl, %rdi
# CHECK-NEXT: 3 3 1.50 rorq %cl, %rdi # CHECK-NEXT: 3 3 1.50 rorq %cl, %rdi
# CHECK-NEXT: 6 8 1.50 * * rolq %cl, (%rax) # CHECK-NEXT: 6 8 1.50 * * rolq %cl, (%rax)
# CHECK-NEXT: 5 8 1.50 * * rorq %cl, (%rax) # CHECK-NEXT: 5 8 1.50 * * rorq %cl, (%rax)
# CHECK-NEXT: 1 1 0.50 sahf
# CHECK-NEXT: 1 1 0.50 sarb %dil # CHECK-NEXT: 1 1 0.50 sarb %dil
# CHECK-NEXT: 1 1 0.50 shlb %dil # CHECK-NEXT: 1 1 0.50 shlb %dil
# CHECK-NEXT: 1 1 0.50 shrb %dil # CHECK-NEXT: 1 1 0.50 shrb %dil
# CHECK-NEXT: 4 6 1.00 * * sarb (%rax) # CHECK-NEXT: 4 6 1.00 * * sarb (%rax)
# CHECK-NEXT: 4 6 1.00 * * shlb (%rax) # CHECK-NEXT: 4 6 1.00 * * shlb (%rax)
# CHECK-NEXT: 4 6 1.00 * * shrb (%rax) # CHECK-NEXT: 4 6 1.00 * * shrb (%rax)
# CHECK-NEXT: 1 1 0.50 sarb $7, %dil # CHECK-NEXT: 1 1 0.50 sarb $7, %dil
# CHECK-NEXT: 1 1 0.50 shlb $7, %dil # CHECK-NEXT: 1 1 0.50 shlb $7, %dil
▲ Show 20 Lines • Show All 185 Lines • ▼ Show 20 Lines
# CHECK-NEXT: [5] - SKLPort3 # CHECK-NEXT: [5] - SKLPort3
# CHECK-NEXT: [6] - SKLPort4 # CHECK-NEXT: [6] - SKLPort4
# CHECK-NEXT: [7] - SKLPort5 # CHECK-NEXT: [7] - SKLPort5
# CHECK-NEXT: [8] - SKLPort6 # CHECK-NEXT: [8] - SKLPort6
# CHECK-NEXT: [9] - SKLPort7 # CHECK-NEXT: [9] - SKLPort7
# CHECK: Resource pressure per iteration: # CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9]
# CHECK-NEXT: 60.00 - 429.50 223.50 202.00 202.00 167.00 184.00 414.00 69.00 # CHECK-NEXT: 60.00 - 430.50 223.50 202.00 202.00 167.00 184.00 415.00 69.00
# CHECK: Resource pressure by instruction: # CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: - - 0.75 0.25 - - - 0.25 0.75 - adcb $7, %al # CHECK-NEXT: - - 0.75 0.25 - - - 0.25 0.75 - adcb $7, %al
# CHECK-NEXT: - - 0.75 0.25 - - - 0.25 0.75 - adcb $7, %dil # CHECK-NEXT: - - 0.75 0.25 - - - 0.25 0.75 - adcb $7, %dil
# CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 adcb $7, (%rax) # CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 adcb $7, (%rax)
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - adcb %sil, %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - adcb %sil, %dil
# CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 adcb %sil, (%rax) # CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 adcb %sil, (%rax)
▲ Show 20 Lines • Show All 184 Lines • ▼ Show 20 Lines
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incb %dil # CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incb %dil
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incb (%rax) # CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incb (%rax)
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incw %di # CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incw %di
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incw (%rax) # CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incw (%rax)
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incl %edi # CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incl %edi
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incl (%rax) # CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incl (%rax)
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incq %rdi # CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incq %rdi
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incq (%rax) # CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incq (%rax)
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - lahf
# CHECK-NEXT: - - - 1.00 - - - - - - mulb %dil # CHECK-NEXT: - - - 1.00 - - - - - - mulb %dil
# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - mulb (%rax) # CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - mulb (%rax)
# CHECK-NEXT: - - 1.00 1.50 - - - 0.50 1.00 - mulw %si # CHECK-NEXT: - - 1.00 1.50 - - - 0.50 1.00 - mulw %si
# CHECK-NEXT: - - 1.00 1.50 0.50 0.50 - 0.50 1.00 - mulw (%rax) # CHECK-NEXT: - - 1.00 1.50 0.50 0.50 - 0.50 1.00 - mulw (%rax)
# CHECK-NEXT: - - 0.75 1.25 - - - 0.25 0.75 - mull %edx # CHECK-NEXT: - - 0.75 1.25 - - - 0.25 0.75 - mull %edx
# CHECK-NEXT: - - 0.75 1.25 0.50 0.50 - 0.25 0.75 - mull (%rax) # CHECK-NEXT: - - 0.75 1.25 0.50 0.50 - 0.25 0.75 - mull (%rax)
# CHECK-NEXT: - - - 1.00 - - - 1.00 - - mulq %rcx # CHECK-NEXT: - - - 1.00 - - - 1.00 - - mulq %rcx
# CHECK-NEXT: - - - 1.00 0.50 0.50 - 1.00 - - mulq (%rax) # CHECK-NEXT: - - - 1.00 0.50 0.50 - 1.00 - - mulq (%rax)
▲ Show 20 Lines • Show All 141 Lines • ▼ Show 20 Lines
# CHECK-NEXT: - - 1.00 - - - - - 1.00 - rolq $7, %rdi # CHECK-NEXT: - - 1.00 - - - - - 1.00 - rolq $7, %rdi
# CHECK-NEXT: - - 1.00 - - - - - 1.00 - rorq $7, %rdi # CHECK-NEXT: - - 1.00 - - - - - 1.00 - rorq $7, %rdi
# CHECK-NEXT: - - 1.00 - 0.83 0.83 1.00 - 1.00 0.33 rolq $7, (%rax) # CHECK-NEXT: - - 1.00 - 0.83 0.83 1.00 - 1.00 0.33 rolq $7, (%rax)
# CHECK-NEXT: - - 1.00 - 0.83 0.83 1.00 - 1.00 0.33 rorq $7, (%rax) # CHECK-NEXT: - - 1.00 - 0.83 0.83 1.00 - 1.00 0.33 rorq $7, (%rax)
# CHECK-NEXT: - - 1.50 - - - - - 1.50 - rolq %cl, %rdi # CHECK-NEXT: - - 1.50 - - - - - 1.50 - rolq %cl, %rdi
# CHECK-NEXT: - - 1.50 - - - - - 1.50 - rorq %cl, %rdi # CHECK-NEXT: - - 1.50 - - - - - 1.50 - rorq %cl, %rdi
# CHECK-NEXT: - - 1.50 - 0.83 0.83 1.00 - 1.50 0.33 rolq %cl, (%rax) # CHECK-NEXT: - - 1.50 - 0.83 0.83 1.00 - 1.50 0.33 rolq %cl, (%rax)
# CHECK-NEXT: - - 1.50 - 0.83 0.83 - - 1.50 0.33 rorq %cl, (%rax) # CHECK-NEXT: - - 1.50 - 0.83 0.83 - - 1.50 0.33 rorq %cl, (%rax)
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sahf
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarb %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarb %dil
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlb %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlb %dil
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shrb %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - shrb %dil
# CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 sarb (%rax) # CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 sarb (%rax)
# CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 shlb (%rax) # CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 shlb (%rax)
# CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 shrb (%rax) # CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 shrb (%rax)
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarb $7, %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarb $7, %dil
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlb $7, %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlb $7, %dil
▲ Show 20 Lines • Show All 178 Lines • Show Last 20 Lines

test/tools/llvm-mca/X86/SkylakeServer/resources-x86_64.s

Show First 20 Lines • Show All 216 Lines • ▼ Show 20 Lines
incb (%rax) incb (%rax)
incw %di incw %di
incw (%rax) incw (%rax)
incl %edi incl %edi
incl (%rax) incl (%rax)
incq %rdi incq %rdi
incq (%rax) incq (%rax)
lahf
mulb %dil mulb %dil
mulb (%rax) mulb (%rax)
mulw %si mulw %si
mulw (%rax) mulw (%rax)
mull %edx mull %edx
mull (%rax) mull (%rax)
mulq %rcx mulq %rcx
mulq (%rax) mulq (%rax)
▲ Show 20 Lines • Show All 157 Lines • ▼ Show 20 Lines
rorq $7, %rdi rorq $7, %rdi
rolq $7, (%rax) rolq $7, (%rax)
rorq $7, (%rax) rorq $7, (%rax)
rolq %cl, %rdi rolq %cl, %rdi
rorq %cl, %rdi rorq %cl, %rdi
rolq %cl, (%rax) rolq %cl, (%rax)
rorq %cl, (%rax) rorq %cl, (%rax)
sahf
sarb %dil sarb %dil
shlb %dil shlb %dil
shrb %dil shrb %dil
sarb (%rax) sarb (%rax)
shlb (%rax) shlb (%rax)
shrb (%rax) shrb (%rax)
sarb $7, %dil sarb $7, %dil
shlb $7, %dil shlb $7, %dil
▲ Show 20 Lines • Show All 395 Lines • ▼ Show 20 Lines
# CHECK-NEXT: 1 1 0.25 incb %dil # CHECK-NEXT: 1 1 0.25 incb %dil
# CHECK-NEXT: 3 7 1.00 * * incb (%rax) # CHECK-NEXT: 3 7 1.00 * * incb (%rax)
# CHECK-NEXT: 1 1 0.25 incw %di # CHECK-NEXT: 1 1 0.25 incw %di
# CHECK-NEXT: 3 7 1.00 * * incw (%rax) # CHECK-NEXT: 3 7 1.00 * * incw (%rax)
# CHECK-NEXT: 1 1 0.25 incl %edi # CHECK-NEXT: 1 1 0.25 incl %edi
# CHECK-NEXT: 3 7 1.00 * * incl (%rax) # CHECK-NEXT: 3 7 1.00 * * incl (%rax)
# CHECK-NEXT: 1 1 0.25 incq %rdi # CHECK-NEXT: 1 1 0.25 incq %rdi
# CHECK-NEXT: 3 7 1.00 * * incq (%rax) # CHECK-NEXT: 3 7 1.00 * * incq (%rax)
# CHECK-NEXT: 1 1 0.50 lahf
# CHECK-NEXT: 1 3 1.00 mulb %dil # CHECK-NEXT: 1 3 1.00 mulb %dil
# CHECK-NEXT: 2 8 1.00 * mulb (%rax) # CHECK-NEXT: 2 8 1.00 * mulb (%rax)
# CHECK-NEXT: 4 4 1.00 mulw %si # CHECK-NEXT: 4 4 1.00 mulw %si
# CHECK-NEXT: 5 9 1.00 * mulw (%rax) # CHECK-NEXT: 5 9 1.00 * mulw (%rax)
# CHECK-NEXT: 3 4 1.00 mull %edx # CHECK-NEXT: 3 4 1.00 mull %edx
# CHECK-NEXT: 4 9 1.00 * mull (%rax) # CHECK-NEXT: 4 9 1.00 * mull (%rax)
# CHECK-NEXT: 2 4 1.00 mulq %rcx # CHECK-NEXT: 2 4 1.00 mulq %rcx
# CHECK-NEXT: 3 9 1.00 * mulq (%rax) # CHECK-NEXT: 3 9 1.00 * mulq (%rax)
▲ Show 20 Lines • Show All 141 Lines • ▼ Show 20 Lines
# CHECK-NEXT: 2 2 1.00 rolq $7, %rdi # CHECK-NEXT: 2 2 1.00 rolq $7, %rdi
# CHECK-NEXT: 2 2 1.00 rorq $7, %rdi # CHECK-NEXT: 2 2 1.00 rorq $7, %rdi
# CHECK-NEXT: 5 7 1.00 * * rolq $7, (%rax) # CHECK-NEXT: 5 7 1.00 * * rolq $7, (%rax)
# CHECK-NEXT: 5 7 1.00 * * rorq $7, (%rax) # CHECK-NEXT: 5 7 1.00 * * rorq $7, (%rax)
# CHECK-NEXT: 3 3 1.50 rolq %cl, %rdi # CHECK-NEXT: 3 3 1.50 rolq %cl, %rdi
# CHECK-NEXT: 3 3 1.50 rorq %cl, %rdi # CHECK-NEXT: 3 3 1.50 rorq %cl, %rdi
# CHECK-NEXT: 6 8 1.50 * * rolq %cl, (%rax) # CHECK-NEXT: 6 8 1.50 * * rolq %cl, (%rax)
# CHECK-NEXT: 5 8 1.50 * * rorq %cl, (%rax) # CHECK-NEXT: 5 8 1.50 * * rorq %cl, (%rax)
# CHECK-NEXT: 1 1 0.50 sahf
# CHECK-NEXT: 1 1 0.50 sarb %dil # CHECK-NEXT: 1 1 0.50 sarb %dil
# CHECK-NEXT: 1 1 0.50 shlb %dil # CHECK-NEXT: 1 1 0.50 shlb %dil
# CHECK-NEXT: 1 1 0.50 shrb %dil # CHECK-NEXT: 1 1 0.50 shrb %dil
# CHECK-NEXT: 4 6 1.00 * * sarb (%rax) # CHECK-NEXT: 4 6 1.00 * * sarb (%rax)
# CHECK-NEXT: 4 6 1.00 * * shlb (%rax) # CHECK-NEXT: 4 6 1.00 * * shlb (%rax)
# CHECK-NEXT: 4 6 1.00 * * shrb (%rax) # CHECK-NEXT: 4 6 1.00 * * shrb (%rax)
# CHECK-NEXT: 1 1 0.50 sarb $7, %dil # CHECK-NEXT: 1 1 0.50 sarb $7, %dil
# CHECK-NEXT: 1 1 0.50 shlb $7, %dil # CHECK-NEXT: 1 1 0.50 shlb $7, %dil
▲ Show 20 Lines • Show All 185 Lines • ▼ Show 20 Lines
# CHECK-NEXT: [5] - SKXPort3 # CHECK-NEXT: [5] - SKXPort3
# CHECK-NEXT: [6] - SKXPort4 # CHECK-NEXT: [6] - SKXPort4
# CHECK-NEXT: [7] - SKXPort5 # CHECK-NEXT: [7] - SKXPort5
# CHECK-NEXT: [8] - SKXPort6 # CHECK-NEXT: [8] - SKXPort6
# CHECK-NEXT: [9] - SKXPort7 # CHECK-NEXT: [9] - SKXPort7
# CHECK: Resource pressure per iteration: # CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9]
# CHECK-NEXT: 60.00 - 429.75 223.75 202.00 202.00 167.00 184.25 414.25 69.00 # CHECK-NEXT: 60.00 - 430.75 223.75 202.00 202.00 167.00 184.25 415.25 69.00
# CHECK: Resource pressure by instruction: # CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: - - 0.75 0.25 - - - 0.25 0.75 - adcb $7, %al # CHECK-NEXT: - - 0.75 0.25 - - - 0.25 0.75 - adcb $7, %al
# CHECK-NEXT: - - 0.75 0.25 - - - 0.25 0.75 - adcb $7, %dil # CHECK-NEXT: - - 0.75 0.25 - - - 0.25 0.75 - adcb $7, %dil
# CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 adcb $7, (%rax) # CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 adcb $7, (%rax)
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - adcb %sil, %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - adcb %sil, %dil
# CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 adcb %sil, (%rax) # CHECK-NEXT: - - 1.25 0.25 0.83 0.83 1.00 0.25 1.25 0.33 adcb %sil, (%rax)
▲ Show 20 Lines • Show All 184 Lines • ▼ Show 20 Lines
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incb %dil # CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incb %dil
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incb (%rax) # CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incb (%rax)
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incw %di # CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incw %di
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incw (%rax) # CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incw (%rax)
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incl %edi # CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incl %edi
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incl (%rax) # CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incl (%rax)
# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incq %rdi # CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - incq %rdi
# CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incq (%rax) # CHECK-NEXT: - - 0.25 0.25 0.83 0.83 1.00 0.25 0.25 0.33 incq (%rax)
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - lahf
# CHECK-NEXT: - - - 1.00 - - - - - - mulb %dil # CHECK-NEXT: - - - 1.00 - - - - - - mulb %dil
# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - mulb (%rax) # CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - mulb (%rax)
# CHECK-NEXT: - - 1.00 1.50 - - - 0.50 1.00 - mulw %si # CHECK-NEXT: - - 1.00 1.50 - - - 0.50 1.00 - mulw %si
# CHECK-NEXT: - - 1.00 1.50 0.50 0.50 - 0.50 1.00 - mulw (%rax) # CHECK-NEXT: - - 1.00 1.50 0.50 0.50 - 0.50 1.00 - mulw (%rax)
# CHECK-NEXT: - - 0.75 1.25 - - - 0.25 0.75 - mull %edx # CHECK-NEXT: - - 0.75 1.25 - - - 0.25 0.75 - mull %edx
# CHECK-NEXT: - - 0.75 1.25 0.50 0.50 - 0.25 0.75 - mull (%rax) # CHECK-NEXT: - - 0.75 1.25 0.50 0.50 - 0.25 0.75 - mull (%rax)
# CHECK-NEXT: - - - 1.00 - - - 1.00 - - mulq %rcx # CHECK-NEXT: - - - 1.00 - - - 1.00 - - mulq %rcx
# CHECK-NEXT: - - - 1.00 0.50 0.50 - 1.00 - - mulq (%rax) # CHECK-NEXT: - - - 1.00 0.50 0.50 - 1.00 - - mulq (%rax)
▲ Show 20 Lines • Show All 141 Lines • ▼ Show 20 Lines
# CHECK-NEXT: - - 1.00 - - - - - 1.00 - rolq $7, %rdi # CHECK-NEXT: - - 1.00 - - - - - 1.00 - rolq $7, %rdi
# CHECK-NEXT: - - 1.00 - - - - - 1.00 - rorq $7, %rdi # CHECK-NEXT: - - 1.00 - - - - - 1.00 - rorq $7, %rdi
# CHECK-NEXT: - - 1.00 - 0.83 0.83 1.00 - 1.00 0.33 rolq $7, (%rax) # CHECK-NEXT: - - 1.00 - 0.83 0.83 1.00 - 1.00 0.33 rolq $7, (%rax)
# CHECK-NEXT: - - 1.00 - 0.83 0.83 1.00 - 1.00 0.33 rorq $7, (%rax) # CHECK-NEXT: - - 1.00 - 0.83 0.83 1.00 - 1.00 0.33 rorq $7, (%rax)
# CHECK-NEXT: - - 1.50 - - - - - 1.50 - rolq %cl, %rdi # CHECK-NEXT: - - 1.50 - - - - - 1.50 - rolq %cl, %rdi
# CHECK-NEXT: - - 1.50 - - - - - 1.50 - rorq %cl, %rdi # CHECK-NEXT: - - 1.50 - - - - - 1.50 - rorq %cl, %rdi
# CHECK-NEXT: - - 1.50 - 0.83 0.83 1.00 - 1.50 0.33 rolq %cl, (%rax) # CHECK-NEXT: - - 1.50 - 0.83 0.83 1.00 - 1.50 0.33 rolq %cl, (%rax)
# CHECK-NEXT: - - 1.50 - 0.83 0.83 - - 1.50 0.33 rorq %cl, (%rax) # CHECK-NEXT: - - 1.50 - 0.83 0.83 - - 1.50 0.33 rorq %cl, (%rax)
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sahf
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarb %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarb %dil
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlb %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlb %dil
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shrb %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - shrb %dil
# CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 sarb (%rax) # CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 sarb (%rax)
# CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 shlb (%rax) # CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 shlb (%rax)
# CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 shrb (%rax) # CHECK-NEXT: - - 0.50 - 0.83 0.83 1.00 - 0.50 0.33 shrb (%rax)
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarb $7, %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarb $7, %dil
# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlb $7, %dil # CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlb $7, %dil
▲ Show 20 Lines • Show All 178 Lines • Show Last 20 Lines

test/tools/llvm-mca/X86/Znver1/resources-x86_64.s

Show First 20 Lines • Show All 216 Lines • ▼ Show 20 Lines
incb (%rax) incb (%rax)
incw %di incw %di
incw (%rax) incw (%rax)
incl %edi incl %edi
incl (%rax) incl (%rax)
incq %rdi incq %rdi
incq (%rax) incq (%rax)
lahf
mulb %dil mulb %dil
mulb (%rax) mulb (%rax)
mulw %si mulw %si
mulw (%rax) mulw (%rax)
mull %edx mull %edx
mull (%rax) mull (%rax)
mulq %rcx mulq %rcx
mulq (%rax) mulq (%rax)
▲ Show 20 Lines • Show All 157 Lines • ▼ Show 20 Lines
rorq $7, %rdi rorq $7, %rdi
rolq $7, (%rax) rolq $7, (%rax)
rorq $7, (%rax) rorq $7, (%rax)
rolq %cl, %rdi rolq %cl, %rdi
rorq %cl, %rdi rorq %cl, %rdi
rolq %cl, (%rax) rolq %cl, (%rax)
rorq %cl, (%rax) rorq %cl, (%rax)
sahf
sarb %dil sarb %dil
shlb %dil shlb %dil
shrb %dil shrb %dil
sarb (%rax) sarb (%rax)
shlb (%rax) shlb (%rax)
shrb (%rax) shrb (%rax)
sarb $7, %dil sarb $7, %dil
shlb $7, %dil shlb $7, %dil
▲ Show 20 Lines • Show All 395 Lines • ▼ Show 20 Lines
# CHECK-NEXT: 1 1 0.25 incb %dil # CHECK-NEXT: 1 1 0.25 incb %dil
# CHECK-NEXT: 2 5 0.50 * * incb (%rax) # CHECK-NEXT: 2 5 0.50 * * incb (%rax)
# CHECK-NEXT: 1 1 0.25 incw %di # CHECK-NEXT: 1 1 0.25 incw %di
# CHECK-NEXT: 2 5 0.50 * * incw (%rax) # CHECK-NEXT: 2 5 0.50 * * incw (%rax)
# CHECK-NEXT: 1 1 0.25 incl %edi # CHECK-NEXT: 1 1 0.25 incl %edi
# CHECK-NEXT: 2 5 0.50 * * incl (%rax) # CHECK-NEXT: 2 5 0.50 * * incl (%rax)
# CHECK-NEXT: 1 1 0.25 incq %rdi # CHECK-NEXT: 1 1 0.25 incq %rdi
# CHECK-NEXT: 2 5 0.50 * * incq (%rax) # CHECK-NEXT: 2 5 0.50 * * incq (%rax)
# CHECK-NEXT: 1 100 0.25 lahf
# CHECK-NEXT: 1 4 1.00 mulb %dil # CHECK-NEXT: 1 4 1.00 mulb %dil
# CHECK-NEXT: 2 8 1.00 * mulb (%rax) # CHECK-NEXT: 2 8 1.00 * mulb (%rax)
# CHECK-NEXT: 1 3 1.00 mulw %si # CHECK-NEXT: 1 3 1.00 mulw %si
# CHECK-NEXT: 1 8 1.00 * mulw (%rax) # CHECK-NEXT: 1 8 1.00 * mulw (%rax)
# CHECK-NEXT: 1 3 1.00 mull %edx # CHECK-NEXT: 1 3 1.00 mull %edx
# CHECK-NEXT: 1 8 1.00 * mull (%rax) # CHECK-NEXT: 1 8 1.00 * mull (%rax)
# CHECK-NEXT: 2 4 1.00 mulq %rcx # CHECK-NEXT: 2 4 1.00 mulq %rcx
# CHECK-NEXT: 2 9 1.00 * mulq (%rax) # CHECK-NEXT: 2 9 1.00 * mulq (%rax)
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# CHECK-NEXT: 1 1 0.25 rolq $7, %rdi # CHECK-NEXT: 1 1 0.25 rolq $7, %rdi
# CHECK-NEXT: 1 1 0.25 rorq $7, %rdi # CHECK-NEXT: 1 1 0.25 rorq $7, %rdi
# CHECK-NEXT: 3 5 1.00 * * rolq $7, (%rax) # CHECK-NEXT: 3 5 1.00 * * rolq $7, (%rax)
# CHECK-NEXT: 3 5 1.00 * * rorq $7, (%rax) # CHECK-NEXT: 3 5 1.00 * * rorq $7, (%rax)
# CHECK-NEXT: 1 1 0.25 rolq %cl, %rdi # CHECK-NEXT: 1 1 0.25 rolq %cl, %rdi
# CHECK-NEXT: 1 1 0.25 rorq %cl, %rdi # CHECK-NEXT: 1 1 0.25 rorq %cl, %rdi
# CHECK-NEXT: 3 5 1.00 * * rolq %cl, (%rax) # CHECK-NEXT: 3 5 1.00 * * rolq %cl, (%rax)
# CHECK-NEXT: 3 5 1.00 * * rorq %cl, (%rax) # CHECK-NEXT: 3 5 1.00 * * rorq %cl, (%rax)
# CHECK-NEXT: 2 2 0.25 sahf
# CHECK-NEXT: 1 1 0.25 sarb %dil # CHECK-NEXT: 1 1 0.25 sarb %dil
# CHECK-NEXT: 1 1 0.25 shlb %dil # CHECK-NEXT: 1 1 0.25 shlb %dil
# CHECK-NEXT: 1 1 0.25 shrb %dil # CHECK-NEXT: 1 1 0.25 shrb %dil
# CHECK-NEXT: 2 5 0.50 * * sarb (%rax) # CHECK-NEXT: 2 5 0.50 * * sarb (%rax)
# CHECK-NEXT: 2 5 0.50 * * shlb (%rax) # CHECK-NEXT: 2 5 0.50 * * shlb (%rax)
# CHECK-NEXT: 2 5 0.50 * * shrb (%rax) # CHECK-NEXT: 2 5 0.50 * * shrb (%rax)
# CHECK-NEXT: 1 1 0.25 sarb $7, %dil # CHECK-NEXT: 1 1 0.25 sarb $7, %dil
# CHECK-NEXT: 1 1 0.25 shlb $7, %dil # CHECK-NEXT: 1 1 0.25 shlb $7, %dil
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# CHECK-NEXT: [7] - ZnFPU0 # CHECK-NEXT: [7] - ZnFPU0
# CHECK-NEXT: [8] - ZnFPU1 # CHECK-NEXT: [8] - ZnFPU1
# CHECK-NEXT: [9] - ZnFPU2 # CHECK-NEXT: [9] - ZnFPU2
# CHECK-NEXT: [10] - ZnFPU3 # CHECK-NEXT: [10] - ZnFPU3
# CHECK-NEXT: [11] - ZnMultiplier # CHECK-NEXT: [11] - ZnMultiplier
# CHECK: Resource pressure per iteration: # CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11]
# CHECK-NEXT: 131.50 131.50 111.75 145.75 127.75 111.75 392.00 - - - - 34.00 # CHECK-NEXT: 131.50 131.50 112.00 146.00 128.00 112.00 392.00 - - - - 34.00
# CHECK: Resource pressure by instruction: # CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] Instructions: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] Instructions:
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - adcb $7, %al # CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - adcb $7, %al
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - adcb $7, %dil # CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - adcb $7, %dil
# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - adcb $7, (%rax) # CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - adcb $7, (%rax)
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - adcb %sil, %dil # CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - adcb %sil, %dil
# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - adcb %sil, (%rax) # CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - adcb %sil, (%rax)
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# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - incb %dil # CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - incb %dil
# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - incb (%rax) # CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - incb (%rax)
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - incw %di # CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - incw %di
# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - incw (%rax) # CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - incw (%rax)
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - incl %edi # CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - incl %edi
# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - incl (%rax) # CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - incl (%rax)
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - incq %rdi # CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - incq %rdi
# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - incq (%rax) # CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - incq (%rax)
# CHECK-NEXT: - - - - - - - - - - - - lahf
# CHECK-NEXT: - - - 1.00 - - - - - - - 1.00 mulb %dil # CHECK-NEXT: - - - 1.00 - - - - - - - 1.00 mulb %dil
# CHECK-NEXT: 0.50 0.50 - 1.00 - - - - - - - 1.00 mulb (%rax) # CHECK-NEXT: 0.50 0.50 - 1.00 - - - - - - - 1.00 mulb (%rax)
# CHECK-NEXT: - - - 1.00 - - - - - - - 1.00 mulw %si # CHECK-NEXT: - - - 1.00 - - - - - - - 1.00 mulw %si
# CHECK-NEXT: 0.50 0.50 - 1.00 - - - - - - - 1.00 mulw (%rax) # CHECK-NEXT: 0.50 0.50 - 1.00 - - - - - - - 1.00 mulw (%rax)
# CHECK-NEXT: - - - 1.00 - - - - - - - 1.00 mull %edx # CHECK-NEXT: - - - 1.00 - - - - - - - 1.00 mull %edx
# CHECK-NEXT: 0.50 0.50 - 1.00 - - - - - - - 1.00 mull (%rax) # CHECK-NEXT: 0.50 0.50 - 1.00 - - - - - - - 1.00 mull (%rax)
# CHECK-NEXT: - - - 1.00 - - - - - - - 1.00 mulq %rcx # CHECK-NEXT: - - - 1.00 - - - - - - - 1.00 mulq %rcx
# CHECK-NEXT: 0.50 0.50 - 1.00 - - - - - - - 1.00 mulq (%rax) # CHECK-NEXT: 0.50 0.50 - 1.00 - - - - - - - 1.00 mulq (%rax)
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# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - rolq $7, %rdi # CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - rolq $7, %rdi
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - rorq $7, %rdi # CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - rorq $7, %rdi
# CHECK-NEXT: 1.00 1.00 0.25 0.25 0.25 0.25 - - - - - - rolq $7, (%rax) # CHECK-NEXT: 1.00 1.00 0.25 0.25 0.25 0.25 - - - - - - rolq $7, (%rax)
# CHECK-NEXT: 1.00 1.00 0.25 0.25 0.25 0.25 - - - - - - rorq $7, (%rax) # CHECK-NEXT: 1.00 1.00 0.25 0.25 0.25 0.25 - - - - - - rorq $7, (%rax)
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - rolq %cl, %rdi # CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - rolq %cl, %rdi
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - rorq %cl, %rdi # CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - rorq %cl, %rdi
# CHECK-NEXT: 1.00 1.00 0.25 0.25 0.25 0.25 - - - - - - rolq %cl, (%rax) # CHECK-NEXT: 1.00 1.00 0.25 0.25 0.25 0.25 - - - - - - rolq %cl, (%rax)
# CHECK-NEXT: 1.00 1.00 0.25 0.25 0.25 0.25 - - - - - - rorq %cl, (%rax) # CHECK-NEXT: 1.00 1.00 0.25 0.25 0.25 0.25 - - - - - - rorq %cl, (%rax)
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - sahf
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - sarb %dil # CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - sarb %dil
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - shlb %dil # CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - shlb %dil
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - shrb %dil # CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - shrb %dil
# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - sarb (%rax) # CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - sarb (%rax)
# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - shlb (%rax) # CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - shlb (%rax)
# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - shrb (%rax) # CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - shrb (%rax)
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - sarb $7, %dil # CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - sarb $7, %dil
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - shlb $7, %dil # CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - shlb $7, %dil
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