[AMDGPU] Emit const global in .text for AMDPAL OS

[tpr]

Summary

The PAL ABI does not allow a separate .rodata section, or a reloc. This
commit ensures that a read-only global variable is emitted in .text, and
has no reloc when accessing it with pc-relative addressing.

Change-Id: I9666a7061e7335de498bc6fb1e3b9de098de163b

[tpr]

I withdraw this patch. I was wrong that we need a read-only global variable in the global address space at all for AMDPAL.

lib/Target/AMDGPU/AMDGPUTargetObjectFile.cpp

 using namespace llvm;
 
 //===----------------------------------------------------------------------===//
 // Generic Object File
 //===----------------------------------------------------------------------===//
 
 MCSection *AMDGPUTargetObjectFile::SelectSectionForGlobal(
     const GlobalObject *GO, SectionKind Kind, const TargetMachine &TM) const {
-  if (Kind.isReadOnly() && AMDGPU::isReadOnlySegment(GO) &&
+  if (Kind.isReadOnly()) {
+    if (AMDGPU::shouldEmitROGlobalsToTextSection(TM.getTargetTriple()))
+      return TextSection;
+    if (AMDGPU::isReadOnlySegment(GO) &&
         AMDGPU::shouldEmitConstantsToTextSection(TM.getTargetTriple()))
       return TextSection;
-
+  }
   return TargetLoweringObjectFileELF::SelectSectionForGlobal(GO, Kind, TM);
 }

lib/Target/AMDGPU/SIISelLowering.cpp

for (unsigned i = 0; i < 3; ++i) {
     // Create fixed stack object for work item ID.
     ObjectIdx = MF.getFrameInfo().CreateFixedObject(4, i * 4 + 16, true);
     Info->setDebuggerWorkItemIDStackObjectIndex(i, ObjectIdx);
   }
 }
 
 bool SITargetLowering::shouldEmitFixup(const GlobalValue *GV) const {
   const Triple &TT = getTargetMachine().getTargetTriple();
+  if (auto GVar = dyn_cast<GlobalVariable>(GV)) {
+    // Avoid an unnecessary reloc to a global variable that is going to be
+    // emitted into .text.
+    if (GVar->isConstant())
+      return AMDGPU::shouldEmitROGlobalsToTextSection(TT);
+  }
   return (GV->getType()->getAddressSpace() == AMDGPUASI.CONSTANT_ADDRESS ||
           GV->getType()->getAddressSpace() == AMDGPUASI.CONSTANT_ADDRESS_32BIT) &&
          AMDGPU::shouldEmitConstantsToTextSection(TT);
 }
 
 bool SITargetLowering::shouldEmitGOTReloc(const GlobalValue *GV) const {
   return (GV->getType()->getAddressSpace() == AMDGPUASI.GLOBAL_ADDRESS ||
           GV->getType()->getAddressSpace() == AMDGPUASI.CONSTANT_ADDRESS ||

lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h

 bool isGroupSegment(const GlobalValue *GV);
 bool isGlobalSegment(const GlobalValue *GV);
 bool isReadOnlySegment(const GlobalValue *GV);
 
 /// \returns True if constants should be emitted to .text section for given
 /// target triple \p TT, false otherwise.
 bool shouldEmitConstantsToTextSection(const Triple &TT);
 
+/// \returns True if any read-only global variables should be emitted to .text
+/// section for given target triple \p TT, false otherwise.
+bool shouldEmitROGlobalsToTextSection(const Triple &TT);
+
 /// \returns Integer value requested using \p F's \p Name attribute.
 ///
 /// \returns \p Default if attribute is not present.
 ///
 /// \returns \p Default and emits error if requested value cannot be converted
 /// to integer.
 int getIntegerAttribute(const Function &F, StringRef Name, int Default);
 

lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp

bool isReadOnlySegment(const GlobalValue *GV) {
   return GV->getType()->getAddressSpace() == AMDGPUAS::CONSTANT_ADDRESS ||
          GV->getType()->getAddressSpace() == AMDGPUAS::CONSTANT_ADDRESS_32BIT;
 }
 
 bool shouldEmitConstantsToTextSection(const Triple &TT) {
   return TT.getOS() != Triple::AMDHSA;
 }
 
+bool shouldEmitROGlobalsToTextSection(const Triple &TT) {
+  return TT.getOS() == Triple::AMDPAL;
+}
+
 int getIntegerAttribute(const Function &F, StringRef Name, int Default) {
   Attribute A = F.getFnAttribute(Name);
   int Result = Default;
 
   if (A.isStringAttribute()) {
     StringRef Str = A.getValueAsString();
     if (Str.getAsInteger(0, Result)) {
       LLVMContext &Ctx = F.getContext();

test/CodeGen/AMDGPU/pal-ro-global-in-text.ll

+; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx700 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
+; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
+
+@var = internal addrspace(1) constant [4 x i32] [ i32 42, i32 43, i32 44, i32 45 ]
+
+; Check that there is no reloc from the pc-relative addressing to the variable.
+
+; GCN-LABEL: {{^}}func:
+; GCN: s_add_u32 {{.*}}, var+4{{$}}
+
+define amdgpu_vs void @func(i32 %idx) {
+  %ptr = getelementptr [4 x i32], [4 x i32] addrspace(1)* @var, i32 0, i32 %idx
+  %res = load i32, i32 addrspace(1)* %ptr
+  store i32 %res, i32 addrspace(1)* undef
+  ret void
+}