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[Sparc] Add floating-point register names

Authored by dcederman on May 21 2018, 7:05 AM.

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dcederman created this revision.May 21 2018, 7:05 AM

Can you add a test that we support this? clang/test/CodeGen/sparcv8-inline-asm.c would be a good place to add a test case similar to that in clang/test/CodeGen/aarch64-inline-asm.c : test_gcc_registers.

What about the V9 dX and qX aliases and f32 to f63?

dcederman updated this revision to Diff 148205.May 23 2018, 7:07 AM

Added test cases, f32-f63, d0-d31, and q0-q15.

jyknight added inline comments.May 23 2018, 8:37 AM

There's no such register as f33 (nor any odd-numbered reg above f32).


AFAICT, gcc doesn't actually accept "d" and "q" aliases in its inline asm, so probably no point in LLVM doing so either.

jrtc27 added inline comments.May 23 2018, 9:35 AM

Ah you're right; trying to use it gives "invalid register name". Having said that, maybe it's a nice thing to support anyway?

dcederman updated this revision to Diff 148351.May 24 2018, 1:21 AM

Removed the non-existing registers f33, f35, and so on. I also removed the dX and qX aliases. After trying them they felt more confusing than helpful.

jyknight accepted this revision.May 29 2018, 11:45 AM
This revision is now accepted and ready to land.May 29 2018, 11:45 AM
This revision was automatically updated to reflect the committed changes.