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[mips] Add support for Global INValidate ASE
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Authored by vstefanovic on Apr 30 2018, 8:39 AM.

Details

Summary

This includes

Instructions: ginvi, ginvt,

Assembler directives: .set ginv, .set noginv, .module ginv, .module noginv

Attribute: ginv

.MIPS.abiflags: GINV (0x20000)

Diff Detail

Repository
rL LLVM

Event Timeline

vstefanovic created this revision.Apr 30 2018, 8:39 AM

Where's the ginvgt instruction defined? I'm not seeing in it the manuals.

That's a good question, I only found it in Faraz's binutils patch, and used that as a reference.

The ginvgt instruction can be removed until the documentation is updated.

vstefanovic edited the summary of this revision. (Show Details)

Removed the undocumented gingvt instruction.

sdardis added inline comments.May 16 2018, 2:25 AM
lib/Target/Mips/MicroMips32r6InstrFormats.td
899 ↗(On Diff #146830)

Split this range up into the fields as specified by the arch reference manual.

901 ↗(On Diff #146830)

Likewise.

lib/Target/Mips/Mips32r6InstrFormats.td
601 ↗(On Diff #146830)

This is missing bits 20-10.

lib/Target/Mips/Mips32r6InstrInfo.td
834 ↗(On Diff #146830)

Indent this line so that InstrItinClass is directly underneath the 'string' in the line above.

840 ↗(On Diff #146830)

Also requires 'bit hasSideEffects = 1;'

Addressed inline comments.

vstefanovic marked 5 inline comments as done.May 16 2018, 11:41 AM
vstefanovic added inline comments.
lib/Target/Mips/MicroMips32r6InstrFormats.td
901 ↗(On Diff #146830)

I don't have the manual at hand, I hope I guessed it right.

sdardis accepted this revision.May 17 2018, 8:04 AM

LGTM.

This revision is now accepted and ready to land.May 17 2018, 8:04 AM
This revision was automatically updated to reflect the committed changes.