User Details
- User Since
- Oct 22 2014, 9:56 AM (395 w, 5 d)
Jan 22 2019
Jan 18 2019
Jan 17 2019
Fixed 'typos'.
Moved an if, fixed typos.
Jan 14 2019
Dec 10 2018
Dec 4 2018
Nov 22 2018
Nov 21 2018
Nov 20 2018
Addressed comment.
Nov 19 2018
Re-uploaded the patch with more context.
I assume that we do want to keep this feature for all the architectures, if anyone disagrees, please shout.
Addressed comments.
Nov 9 2018
.reloc directive (and setting its offset as label) isn't mips-only feature, GNU as supports it for all the architectures (or at least for x86, arm, ppc).
But if we don't want this in llvm for other arches than mips, we should move it to mips backend.
Nov 5 2018
While we're at it, supported multiple pending fixups.
Nov 4 2018
Init PendingFixup.Sym to nullptr.
Sorry; thanks for noticing.
Nov 1 2018
Aug 30 2018
Aug 29 2018
Aug 23 2018
C code to reproduce the issue, built with
'-O2 -mllvm -tail-merge-size=1 -mllvm -verify-cfiinstrs':
void foo1(int v) __attribute__((noreturn)) { if (v == 1) { __builtin_trap(); } if (foo2(v)) { __builtin_trap(); } }
Machine IR before branch-folder:
bb.0.entry: CMP32ri8 $edi, 1 JNE_1 %bb.2 JMP_1 %bb.1
Aug 22 2018
Split the test.
Aug 21 2018
Thanks for the comments, adding $sp as implicit operand is a lot better, no need to modify ShrinkWrapping then.
Adding implicit operand $sp to the instructions instead of FrameSetup flag.
Aug 20 2018
Jul 11 2018
Jul 5 2018
Jul 4 2018
Jul 3 2018
Jul 2 2018
Jun 14 2018
Jun 12 2018
Updated the long branch test with actual shrink-wrapping.
Jun 11 2018
Added long branch test, used update_llc_test_checks.py to create checks.
Jun 8 2018
May 16 2018
Addressed inline comments.
May 15 2018
Removed the undocumented gingvt instruction.
May 9 2018
That's a good question, I only found it in Faraz's binutils patch, and used that as a reference.
Apr 30 2018
Apr 13 2018
Fixed stupid error.
Apr 12 2018
Comments addressed.
Apr 11 2018
Comments addressed.
Mar 26 2018
Mar 13 2018
Addressed nits.
Mar 12 2018
Updated the code to use ASEPRedicate from D44299.
Mar 8 2018
Mar 6 2018
Apr 11 2016
Abandoned in favour of http://reviews.llvm.org/D8895 .
May 13 2015
Obsoleted by D9667.
Apr 8 2015
A rebase.
Apr 2 2015
But we are sorting the table exactly as gas only for easier comparison of the generated o files, aren't we?
Apr 1 2015
Mar 31 2015
Mar 26 2015
But it cant introduce a wrong result if another relocation is 1 byte
away, no? We just know that that is not possible? If so please add a
comment about that.
Yes, Mips instructions length is fixed and at least 2 bytes (2 for micromips and mips16, 4 for mips32 and mips64), so there will always be 2 or 4 bytes offset between 2 instructions.
Mar 13 2015
Mar 10 2015
(Some comments disappeared from the previous message.)
A new version of the patch is uploaded.
Feb 6 2015
Hi Rafael, thanks for the link and the review.
Feb 4 2015
Dec 3 2014
Minimal c code to reproduce the error, used to generate vector-multiply.ll
from the patch:
When RegScavenger runs out of registers, it tries to spill one. So it generates
e.g.
Nov 5 2014
Hi Lang, thanks for the review.
Oct 28 2014
ping
Oct 22 2014
This is the list of passing tests now:
LLVM :: ExecutionEngine/MCJIT/cross-module-sm-pic-a.ll LLVM :: ExecutionEngine/MCJIT/eh-lg-pic.ll LLVM :: ExecutionEngine/MCJIT/eh-sm-pic.ll LLVM :: ExecutionEngine/MCJIT/hello-sm-pic.ll LLVM :: ExecutionEngine/MCJIT/multi-module-sm-pic-a.ll LLVM :: ExecutionEngine/MCJIT/non-extern-addend-smallcodemodel.ll LLVM :: ExecutionEngine/MCJIT/remote/cross-module-sm-pic-a.ll LLVM :: ExecutionEngine/MCJIT/remote/multi-module-sm-pic-a.ll LLVM :: ExecutionEngine/MCJIT/remote/test-global-init-nonzero-sm-pic.ll LLVM :: ExecutionEngine/MCJIT/remote/test-ptr-reloc-sm-pic.ll LLVM :: ExecutionEngine/MCJIT/stubs-sm-pic.ll LLVM :: ExecutionEngine/MCJIT/test-global-init-nonzero-sm-pic.ll LLVM :: ExecutionEngine/MCJIT/test-ptr-reloc-sm-pic.ll