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[AMDGPU] Truncate packed inline constant
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Authored by rampitec on Apr 23 2018, 2:31 PM.

Details

Summary

If a packed inline constant is sign extended it must be truncated
after the shift. I.e. a constant (0xH0000, 0xHBC00), will be represented
as 0xFFFFFFFFBC000000 in the IR because the immediate is sign extended
to 64 bit. After the value shifted right by 16 to use it in a low part
with op_sel_hi it becomes 0xFFFFFFFFBC00 and does not qualify as inline
constant any longer.

Fixed the error and added verification code. Without the fix and with
the verification bug is causing pk_max_f16_literal.ll to fail.

Diff Detail

Event Timeline

rampitec created this revision.Apr 23 2018, 2:31 PM
This revision is now accepted and ready to land.Apr 24 2018, 10:36 AM
This revision was automatically updated to reflect the committed changes.