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Complete the SPE instruction set patterns
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Authored by jhibbits on Mar 23 2018, 7:26 AM.

Details

Summary

This is the lead-up to having SPE codegen. Add the rest of the
instructions, along with MC tests.

Diff Detail

Repository
rL LLVM

Event Timeline

jhibbits created this revision.Mar 23 2018, 7:26 AM
nemanjai resigned from this revision.Apr 9 2018, 2:54 PM

Unfortunately, I am afraid I can't really contribute any useful feedback on this patch since I know nothing about the e500 family of CPU's. Perhaps @joerg is the only one that can meaningfully review this patch.

I hope that you don't mind, but considering I can't provide meaningful input, I will resign from this review.

@joerg ping on this? It's pretty straightforward, so should be an easy review.

jhibbits updated this revision to Diff 155611.Jul 15 2018, 8:14 PM

Update diff to fix tests failing at this specific rev. All tests had previously
been run against D44830 instead.

This revision was not accepted when it landed; it landed in state Needs Review.Jul 17 2018, 9:30 PM
Closed by commit rL337346: Complete the SPE instruction set patterns (authored by jhibbits, committed by ). · Explain Why
This revision was automatically updated to reflect the committed changes.