[ARM] Do not convert some vmov instructions

[miyuki]

Summary

Patch https://reviews.llvm.org/D44467 implements conversion of invalid
vmov instructions into valid ones. It turned out that some valid
instructions also get converted, for example

vmov.i64 d2, #0xff00ff00ff00ff00 ->
vmov.i16 d2, #0xff00

Such behavior is incorrect because according to the ARM ARM section
F2.7.7 Modified immediate constants in T32 and A32 Advanced SIMD
instructions, "On assembly, the data type must be matched in the table
if possible."

This patch fixes the isNEONmovReplicate check so that the above
instruction is not modified any more.

[miyuki]

ping

lib/Target/ARM/AsmParser/ARMAsmParser.cpp

static bool isValidNEONi32vmovImm(int64_t Value) {
     return ((Value & 0xffffffffffffff00) == 0) ||
            ((Value & 0xffffffffffff00ff) == 0) ||
            ((Value & 0xffffffffff00ffff) == 0) ||
            ((Value & 0xffffffff00ffffff) == 0) ||
            ((Value & 0xffffffffffff00ff) == 0xff) ||
            ((Value & 0xffffffffff00ffff) == 0xffff);
   }
 
-  bool isNEONReplicate(unsigned Width, unsigned NumElems, bool Inv,
-                       bool AllowMinusOne) const {
+  bool isNEONReplicate(unsigned Width, unsigned NumElems, bool Inv) const {
     assert((Width == 8 || Width == 16 || Width == 32) &&
            "Invalid element width");
     assert(NumElems * Width <= 64 && "Invalid result width");
 
     if (!isImm())
       return false;
     const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
     // Must be a constant.
     if (!CE)
       return false;
     int64_t Value = CE->getValue();
     if (!Value)
       return false; // Don't bother with zero.
     if (Inv)
       Value = ~Value;
 
     uint64_t Mask = (1ull << Width) - 1;
     uint64_t Elem = Value & Mask;
-    if (!AllowMinusOne && Elem == Mask)
-      return false;
     if (Width == 16 && (Elem & 0x00ff) != 0 && (Elem & 0xff00) != 0)
       return false;
     if (Width == 32 && !isValidNEONi32vmovImm(Elem))
       return false;
 
     for (unsigned i = 1; i < NumElems; ++i) {
       Value >>= Width;
       if ((Value & Mask) != Elem)
         return false;
     }
     return true;
   }
 
   bool isNEONByteReplicate(unsigned NumBytes) const {
-    return isNEONReplicate(8, NumBytes, false, true);
+    return isNEONReplicate(8, NumBytes, false);
   }
 
   static void checkNeonReplicateArgs(unsigned FromW, unsigned ToW) {
     assert((FromW == 8 || FromW == 16 || FromW == 32) &&
            "Invalid source width");
     assert((ToW == 16 || ToW == 32 || ToW == 64) &&
            "Invalid destination width");
     assert(FromW < ToW && "ToW is not less than FromW");
   }
 
   template<unsigned FromW, unsigned ToW>
   bool isNEONmovReplicate() const {
     checkNeonReplicateArgs(FromW, ToW);
-    bool AllowMinusOne = ToW != 64;
-    return isNEONReplicate(FromW, ToW / FromW, false, AllowMinusOne);
+    if (ToW == 64 && isNEONi64splat())
+      return false;
+    return isNEONReplicate(FromW, ToW / FromW, false);
   }
 
   template<unsigned FromW, unsigned ToW>
   bool isNEONinvReplicate() const {
     checkNeonReplicateArgs(FromW, ToW);
-    return isNEONReplicate(FromW, ToW / FromW, true, true);
+    return isNEONReplicate(FromW, ToW / FromW, true);
   }
 
   bool isNEONi32vmov() const {
     if (isNEONByteReplicate(4))
       return false; // Let it to be classified as byte-replicate case.
     if (!isImm())
       return false;
     const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());

test/MC/ARM/vmov-vmvn-replicate.s

 @ CHECK: vmov.i8 q2, #0xff @ encoding: [0x5f,0x4e,0x87,0xf3]
 @ CHECK: vmov.i8 d2, #0xab @ encoding: [0x1b,0x2e,0x82,0xf3]
 @ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
 @ CHECK: vmov.i8 d2, #0xab @ encoding: [0x1b,0x2e,0x82,0xf3]
 @ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
 @ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
 @ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
 
+        vmov.i64        d2, #0xff00ff00ff00ff00
+        vmov.i64        q2, #0xff00ff00ff00ff00
         vmov.i64        d2, #0x00a500a500a500a5
         vmov.i64        q2, #0x00a500a500a500a5
         vmov.i32        d2, #0x00a500a5
         vmov.i32        q2, #0x00a500a5
         vmov.i64        d2, #0xa500a500a500a500
         vmov.i64        q2, #0xa500a500a500a500
         vmov.i32        d2, #0xa500a500
         vmov.i32        q2, #0xa500a500
 
+@ CHECK: vmov.i64 d2, #0xff00ff00ff00ff00 @ encoding: [0x3a,0x2e,0x82,0xf3]
+@ CHECK: vmov.i64 q2, #0xff00ff00ff00ff00 @ encoding: [0x7a,0x4e,0x82,0xf3]
 @ CHECK: vmov.i16 d2, #0xa5 @ encoding: [0x15,0x28,0x82,0xf3]
 @ CHECK: vmov.i16 q2, #0xa5 @ encoding: [0x55,0x48,0x82,0xf3]
 @ CHECK: vmov.i16 d2, #0xa5 @ encoding: [0x15,0x28,0x82,0xf3]
 @ CHECK: vmov.i16 q2, #0xa5 @ encoding: [0x55,0x48,0x82,0xf3]
 @ CHECK: vmov.i16 d2, #0xa500 @ encoding: [0x15,0x2a,0x82,0xf3]
 @ CHECK: vmov.i16 q2, #0xa500 @ encoding: [0x55,0x4a,0x82,0xf3]
 @ CHECK: vmov.i16 d2, #0xa500 @ encoding: [0x15,0x2a,0x82,0xf3]
 @ CHECK: vmov.i16 q2, #0xa500 @ encoding: [0x55,0x4a,0x82,0xf3]