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[AArch64] Skip an unnecessary getCopyToReg in DYNAMIC_STACKALLOC
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Authored by mstorsjo on Mar 16 2018, 2:31 PM.

Reviewers

aemerson
t.p.northover

Commits

Looks fine to me.

This revision is now accepted and ready to land.Mar 17 2018, 5:22 AM

This revision was automatically updated to reflect the committed changes.

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llvm/

trunk/

lib/

Target/

AArch64/

7 lines

Show First 20 Lines • Show All 7,521 Lines • ▼ Show 20 Lines	AArch64TargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,

Chain = DAG.getCALLSEQ_START(Chain, 0, 0, dl);		Chain = DAG.getCALLSEQ_START(Chain, 0, 0, dl);

Chain = LowerWindowsDYNAMIC_STACKALLOC(Op, Chain, Size, DAG);		Chain = LowerWindowsDYNAMIC_STACKALLOC(Op, Chain, Size, DAG);

SDValue SP = DAG.getCopyFromReg(Chain, dl, AArch64::SP, MVT::i64);		SDValue SP = DAG.getCopyFromReg(Chain, dl, AArch64::SP, MVT::i64);
Chain = SP.getValue(1);		Chain = SP.getValue(1);
SP = DAG.getNode(ISD::SUB, dl, MVT::i64, SP, Size);		SP = DAG.getNode(ISD::SUB, dl, MVT::i64, SP, Size);
Chain = DAG.getCopyToReg(Chain, dl, AArch64::SP, SP);		if (Align)

if (Align) {
SP = DAG.getNode(ISD::AND, dl, VT, SP.getValue(0),		SP = DAG.getNode(ISD::AND, dl, VT, SP.getValue(0),
DAG.getConstant(-(uint64_t)Align, dl, VT));		DAG.getConstant(-(uint64_t)Align, dl, VT));
Chain = DAG.getCopyToReg(Chain, dl, AArch64::SP, SP);		Chain = DAG.getCopyToReg(Chain, dl, AArch64::SP, SP);
}

Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(0, dl, true),		Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(0, dl, true),
DAG.getIntPtrConstant(0, dl, true), SDValue(), dl);		DAG.getIntPtrConstant(0, dl, true), SDValue(), dl);

SDValue Ops[2] = {SP, Chain};		SDValue Ops[2] = {SP, Chain};
return DAG.getMergeValues(Ops, dl);		return DAG.getMergeValues(Ops, dl);
}		}

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