Use .set instead of = when printing assignment in assembly output

[kparzysz]

Summary

The function EmitAssignment would simply print "x = y" for an assignment of y to x. On Hexagon "x = y" is a syntax used in most instructions, and is not treated as a directive.

[kparzysz]

Ping.

[kparzysz]

Ping.

[• espindola]

set works in all targets, no?

[kparzysz]

In D44256#1048871, @espindola wrote:

set works in all targets, no?

Probably. Are you suggesting changing to set for everybody? Should it still be hardcoded as ".set" (as it was for '=')?

[• espindola]

In D44256#1049047, @kparzysz wrote:

In D44256#1048871, @espindola wrote:

set works in all targets, no?

Probably. Are you suggesting changing to set for everybody? Should it still be hardcoded as ".set" (as it was for '=')?

Yes. If there is a solution that works everywhere that is better than having a config option.

[kparzysz]

Changed EmitAssignment to print .set instead of =, updated tests.

[• espindola]

LGTM, but please wait for a second opinion. rnk?

For what it is worth, gcc printed assembly uses .set too.

[rnk]

lgtm

I always preferred the = spelling, but if this matches what GCC emits and works around Hexagon assembler issues, I'm OK with it.

llvm/trunk/lib/MC/MCAsmStreamer.cpp

void MCAsmStreamer::EmitThumbFunc(MCSymbol *Func) {
   if (MAI->hasSubsectionsViaSymbols()) {
     OS << '\t';
     Func->print(OS, MAI);
   }
   EmitEOL();
 }
 
 void MCAsmStreamer::EmitAssignment(MCSymbol *Symbol, const MCExpr *Value) {
+  OS << ".set ";
   Symbol->print(OS, MAI);
-  OS << " = ";
+  OS << ", ";
   Value->print(OS, MAI);
 
   EmitEOL();
 
   MCStreamer::EmitAssignment(Symbol, Value);
 }
 
 void MCAsmStreamer::EmitWeakReference(MCSymbol *Alias, const MCSymbol *Symbol) {

llvm/trunk/test/CodeGen/AArch64/global-merge-1.ll

;CHECK-APPLE-IOS: add x8, x8, __MergedGlobals@PAGEOFF
   store i32 %a1, i32* @m, align 4
   store i32 %a2, i32* @n, align 4
   ret void
 }
 
 ;CHECK: .type .L_MergedGlobals,@object  // @_MergedGlobals
 ;CHECK: .local  .L_MergedGlobals
 ;CHECK: .comm .L_MergedGlobals,8,8
-;CHECK: m = .L_MergedGlobals
-;CHECK: n = .L_MergedGlobals+4
+;CHECK: .set m, .L_MergedGlobals
+;CHECK: .set n, .L_MergedGlobals+4
 
 ;CHECK-APPLE-IOS: .zerofill __DATA,__bss,__MergedGlobals,8,3 ; @_MergedGlobals
-;CHECK-APPLE-IOS-NOT: _m = l__MergedGlobals
-;CHECK-APPLE-IOS-NOT: _n = l__MergedGlobals+4
+;CHECK-APPLE-IOS-NOT: .set _m, l__MergedGlobals
+;CHECK-APPLE-IOS-NOT: .set _n, l__MergedGlobals+4

llvm/trunk/test/CodeGen/AArch64/global-merge-2.ll

;CHECK-APPLE-IOS-NOT: adrp
   ret void
 }
 
 ;CHECK: .type .L_MergedGlobals,@object // @_MergedGlobals
 ;CHECK: .local  .L_MergedGlobals
 ;CHECK: .comm .L_MergedGlobals,12,8
 
 ;CHECK: .globl  x
-;CHECK: x = .L_MergedGlobals
+;CHECK: .set x, .L_MergedGlobals
 ;CHECK: .size x, 4
 ;CHECK: .globl  y
-;CHECK: y = .L_MergedGlobals+4
+;CHECK: .set y, .L_MergedGlobals+4
 ;CHECK: .size y, 4
 ;CHECK: .globl  z
-;CHECK: z = .L_MergedGlobals+8
+;CHECK: .set z, .L_MergedGlobals+8
 ;CHECK: .size z, 4
 
 ;CHECK-APPLE-IOS: .zerofill __DATA,__common,__MergedGlobals_x,12,3
 
 ;CHECK-APPLE-IOS: .globl  _x
-;CHECK-APPLE-IOS:  = __MergedGlobals_x
+;CHECK-APPLE-IOS: .set {{.*}}, __MergedGlobals_x
 ;CHECK-APPLE-IOS: .globl  _y
-;CHECK-APPLE-IOS: _y = __MergedGlobals_x+4
+;CHECK-APPLE-IOS: .set _y, __MergedGlobals_x+4
 ;CHECK-APPLE-IOS: .globl  _z
-;CHECK-APPLE-IOS: _z = __MergedGlobals_x+8
+;CHECK-APPLE-IOS: .set _z, __MergedGlobals_x+8
 ;CHECK-APPLE-IOS: .subsections_via_symbols

llvm/trunk/test/CodeGen/AArch64/global-merge-3.ll

 
 ;CHECK-APPLE-IOS: .p2align  4
 ;CHECK-APPLE-IOS:  __MergedGlobals_x:
 ;CHECK-APPLE-IOS: .long 1
 ;CHECK-APPLE-IOS: .space  4000
 
 ;CHECK-APPLE-IOS: .zerofill __DATA,__common,__MergedGlobals_y,4000,4
 
-;CHECK: z = .L_MergedGlobals
+;CHECK: .set z, .L_MergedGlobals
 ;CHECK: .globl  x
-;CHECK: x = .L_MergedGlobals+4
+;CHECK: .set x, .L_MergedGlobals+4
 ;CHECK: .size x, 4000
 ;CHECK: .globl  y
-;CHECK: y = .L_MergedGlobals.1
+;CHECK: .set y, .L_MergedGlobals.1
 ;CHECK: .size y, 4000
 
-;CHECK-APPLE-IOS-NOT: _z = __MergedGlobals_x
+;CHECK-APPLE-IOS-NOT: .set _z, __MergedGlobals_x
 ;CHECK-APPLE-IOS:.globl _x
-;CHECK-APPLE-IOS: _x = __MergedGlobals_x+4
+;CHECK-APPLE-IOS:.set _x, __MergedGlobals_x+4
 ;CHECK-APPLE-IOS:.globl _y
-;CHECK-APPLE-IOS: _y = __MergedGlobals_y
+;CHECK-APPLE-IOS:.set _y, __MergedGlobals_y

llvm/trunk/test/CodeGen/ARM/alias_store.ll

 ; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s
 
 @X = constant {i8, i8 } { i8 0, i8 0 }
 @XA = alias i8, getelementptr inbounds ({ i8, i8 }, {i8, i8}* @X, i32 0, i32 1)
 
 define void @f(i8** %p) align 2 {
 entry:
   store i8* @XA, i8 **%p, align 4
   ret void
 }
 
 ; CHECK: f:
 ; CHECK: ldr r{{.*}}, [[L:.*]]
 ; CHECK: [[L]]:
 ; CHECK-NEXT: .long XA
-; CHECK: XA = X+1
+; CHECK: .set XA, X+1

llvm/trunk/test/CodeGen/ARM/aliases.ll

 ; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s
 
 ; CHECK: .globl test
 
 ; CHECK: .Lstructvar:
 ; CHECK: .size .Lstructvar, 8
 
 ; CHECK: .globl foo1
-; CHECK: foo1 = bar
+; CHECK: .set foo1, bar
 ; CHECK-NOT: .size foo1
 
 ; CHECK: .globl foo2
-; CHECK: foo2 = bar
+; CHECK: .set foo2, bar
 ; CHECK-NOT: .size foo2
 
 ; CHECK: .weak  bar_f
-; CHECK: bar_f = foo_f
+; CHECK: .set bar_f, foo_f
 ; CHECK-NOT: .size bar_f
 
-; CHECK: bar_i = bar
+; CHECK: .set bar_i, bar
 ; CHECK-NOT: .size bar_i
 
 ; CHECK: .globl A
-; CHECK: A = bar
+; CHECK: .set A, bar
 ; CHECK-NOT: .size A
 
 ; CHECK: .globl elem0
-; CHECK: elem0 = .Lstructvar
+; CHECK: .set elem0, .Lstructvar
 ; CHECK: .size elem0, 4
 
 ; CHECK: .globl elem1
-; CHECK: elem1 = .Lstructvar+4
+; CHECK: .set elem1, .Lstructvar+4
 ; CHECK: .size elem1, 4
 
 @bar = global i32 42
 @foo1 = alias i32, i32* @bar
 @foo2 = alias i32, i32* @bar
 
 %FunTy = type i32()
 

llvm/trunk/test/CodeGen/ARM/global-merge-dllexport.ll

 ; RUN: llc < %s -mtriple=thumbv7-win32 -arm-global-merge | FileCheck %s
 
 @x = global i32 0, align 4
 @y = dllexport global i32 0, align 4
 
 define void @f1(i32 %a1, i32 %a2) {
 ; CHECK: f1:
 ; CHECK: movw [[REG1:r[0-9]+]], :lower16:.L_MergedGlobals
 ; CHECK: movt [[REG1]], :upper16:.L_MergedGlobals
   store i32 %a1, i32* @x, align 4
   store i32 %a2, i32* @y, align 4
   ret void
 }
 
 ; CHECK: .lcomm .L_MergedGlobals,8,4
 ; CHECK: .globl x
-; CHECK: x = .L_MergedGlobals
+; CHECK: .set x, .L_MergedGlobals
 ; CHECK: .globl y
-; CHECK: y = .L_MergedGlobals+4
+; CHECK: .set y, .L_MergedGlobals+4
 ; CHECK: .section .drectve,"yn"
 ; CHECK: .ascii " /EXPORT:y,DATA"

llvm/trunk/test/CodeGen/ARM/global-merge-external.ll

 ;CHECK-NO-MERGE-NOT: .globl .L_MergedGlobals
 
 ;CHECK-MERGE: .type .L_MergedGlobals,%object
 ;CHECK-MERGE: .local  .L_MergedGlobals
 ;CHECK-MERGE: .comm .L_MergedGlobals,12,4
 ;CHECK-WIN32: .lcomm  .L_MergedGlobals,12,4
 
 ;CHECK-MERGE: .globl  x
-;CHECK-MERGE: x = .L_MergedGlobals
+;CHECK-MERGE: .set x, .L_MergedGlobals
 ;CHECK-MERGE: .size x, 4
 ;CHECK-MERGE: .globl  y
-;CHECK-MERGE: y = .L_MergedGlobals+4
+;CHECK-MERGE: .set y, .L_MergedGlobals+4
 ;CHECK-MERGE: .size y, 4
 ;CHECK-MERGE: .globl  z
-;CHECK-MERGE: z = .L_MergedGlobals+8
+;CHECK-MERGE: .set z, .L_MergedGlobals+8
 ;CHECK-MERGE: .size z, 4
 
 ;CHECK-WIN32: .globl  x
-;CHECK-WIN32: x = .L_MergedGlobals
+;CHECK-WIN32: .set x, .L_MergedGlobals
 ;CHECK-WIN32: .globl  y
-;CHECK-WIN32: y = .L_MergedGlobals+4
+;CHECK-WIN32: .set y, .L_MergedGlobals+4
 ;CHECK-WIN32: .globl  z
-;CHECK-WIN32: z = .L_MergedGlobals+8
+;CHECK-WIN32: .set z, .L_MergedGlobals+8

llvm/trunk/test/CodeGen/Mips/hf16call32_body.ll

entry:
   ret void
 }
 ; stel: .section .mips16.fn.v_sf,"ax",@progbits
 ; stel: .ent __fn_stub_v_sf
 ; stel: lui $25, %hi(v_sf)
 ; stel: addiu $25, $25, %lo(v_sf)
 ; stel: mfc1 $4, $f12
 ; stel: jr $25
-; stel: __fn_local_v_sf = v_sf
+; stel: .set $__fn_local_v_sf, v_sf
 ; stel: .end __fn_stub_v_sf
 
 declare i32 @printf(i8*, ...) #1
 
 ; Function Attrs: nounwind
 define void @v_df(double %p) #0 {
 entry:
   %p.addr = alloca double, align 8
   store double %p, double* %p.addr, align 8
   %0 = load double, double* %p.addr, align 8
   store double %0, double* @xd, align 8
   ret void
 }
 
 ; stel: .section .mips16.fn.v_df,"ax",@progbits
 ; stel: .ent __fn_stub_v_df
 ; stel: lui $25, %hi(v_df)
 ; stel: addiu $25, $25, %lo(v_df)
 ; stel: mfc1 $4, $f12
 ; stel: mfc1 $5, $f13
 ; stel: jr $25
-; stel: __fn_local_v_df = v_df
+; stel: .set $__fn_local_v_df, v_df
 ; stel: .end __fn_stub_v_df
 
 ; Function Attrs: nounwind
 define void @v_sf_sf(float %p1, float %p2) #0 {
 entry:
   %p1.addr = alloca float, align 4
   %p2.addr = alloca float, align 4
   store float %p1, float* %p1.addr, align 4
   store float %p2, float* %p2.addr, align 4
   %0 = load float, float* %p1.addr, align 4
   store float %0, float* @x, align 4
   %1 = load float, float* %p2.addr, align 4
   store float %1, float* @y, align 4
   ret void
 }
 
 ; stel: .section .mips16.fn.v_sf_sf,"ax",@progbits
 ; stel: .ent __fn_stub_v_sf_sf
 ; stel: lui $25, %hi(v_sf_sf)
 ; stel: addiu $25, $25, %lo(v_sf_sf)
 ; stel: mfc1 $4, $f12
 ; stel: mfc1 $5, $f14
 ; stel: jr $25
-; stel: __fn_local_v_sf_sf = v_sf_sf
+; stel: .set $__fn_local_v_sf_sf, v_sf_sf
 ; stel: .end __fn_stub_v_sf_sf
 
 ; Function Attrs: nounwind
 define void @v_sf_df(float %p1, double %p2) #0 {
 entry:
   %p1.addr = alloca float, align 4
   %p2.addr = alloca double, align 8
   store float %p1, float* %p1.addr, align 4
   store double %p2, double* %p2.addr, align 8
   %0 = load float, float* %p1.addr, align 4
   store float %0, float* @x, align 4
   %1 = load double, double* %p2.addr, align 8
   store double %1, double* @yd, align 8
   ret void
 }
 
 ; stel: .section .mips16.fn.v_sf_df,"ax",@progbits
 ; stel: .ent __fn_stub_v_sf_df
 ; stel: lui $25, %hi(v_sf_df)
 ; stel: addiu $25, $25, %lo(v_sf_df)
 ; stel: mfc1 $4, $f12
 ; stel: mfc1 $6, $f14
 ; stel: mfc1 $7, $f15
 ; stel: jr $25
-; stel: __fn_local_v_sf_df = v_sf_df
+; stel: .set $__fn_local_v_sf_df, v_sf_df
 ; stel: .end __fn_stub_v_sf_df
 
 ; Function Attrs: nounwind
 define void @v_df_sf(double %p1, float %p2) #0 {
 entry:
   %p1.addr = alloca double, align 8
   %p2.addr = alloca float, align 4
   store double %p1, double* %p1.addr, align 8
   store float %p2, float* %p2.addr, align 4
   %0 = load double, double* %p1.addr, align 8
   store double %0, double* @xd, align 8
   %1 = load float, float* %p2.addr, align 4
   store float %1, float* @y, align 4
   ret void
 }
 
 ; stel: .section .mips16.fn.v_df_sf,"ax",@progbits
 ; stel: .ent __fn_stub_v_df_sf
 ; stel: lui $25, %hi(v_df_sf)
 ; stel: addiu $25, $25, %lo(v_df_sf)
 ; stel: mfc1 $4, $f12
 ; stel: mfc1 $5, $f13
 ; stel: mfc1 $6, $f14
 ; stel: jr $25
-; stel: __fn_local_v_df_sf = v_df_sf
+; stel: .set $__fn_local_v_df_sf, v_df_sf
 ; stel: .end __fn_stub_v_df_sf
 
 ; Function Attrs: nounwind
 define void @v_df_df(double %p1, double %p2) #0 {
 entry:
   %p1.addr = alloca double, align 8
   %p2.addr = alloca double, align 8
   store double %p1, double* %p1.addr, align 8

 ; stel: .ent __fn_stub_v_df_df
 ; stel: lui $25, %hi(v_df_df)
 ; stel: addiu $25, $25, %lo(v_df_df)
 ; stel: mfc1 $4, $f12
 ; stel: mfc1 $5, $f13
 ; stel: mfc1 $6, $f14
 ; stel: mfc1 $7, $f15
 ; stel: jr $25
-; stel: __fn_local_v_df_df = v_df_df
+; stel: .set $__fn_local_v_df_df, v_df_df
 ; stel: .end __fn_stub_v_df_df
 
 ; Function Attrs: nounwind
 define float @sf_v() #0 {
 entry:
   %0 = load float, float* @ret_sf, align 4
   ret float %0
 }

 
 
 ; stel: .section .mips16.fn.sf_sf,"ax",@progbits
 ; stel: .ent __fn_stub_sf_sf
 ; stel: lui $25, %hi(sf_sf)
 ; stel: addiu $25, $25, %lo(sf_sf)
 ; stel: mfc1 $4, $f12
 ; stel: jr $25
-; stel: __fn_local_sf_sf = sf_sf
+; stel: .set $__fn_local_sf_sf, sf_sf
 ; stel: .end __fn_stub_sf_sf
 
 
 ; Function Attrs: nounwind
 define float @sf_df(double %p) #0 {
 entry:
   %p.addr = alloca double, align 8
   store double %p, double* %p.addr, align 8
   %0 = load double, double* %p.addr, align 8
   store double %0, double* @xd, align 8
   %1 = load float, float* @ret_sf, align 4
   ret float %1
 }
 
 ; stel: .section .mips16.fn.sf_df,"ax",@progbits
 ; stel: .ent __fn_stub_sf_df
 ; stel: lui $25, %hi(sf_df)
 ; stel: addiu $25, $25, %lo(sf_df)
 ; stel: mfc1 $4, $f12
 ; stel: mfc1 $5, $f13
 ; stel: jr $25
-; stel: __fn_local_sf_df = sf_df
+; stel: .set $__fn_local_sf_df, sf_df
 ; stel: .end __fn_stub_sf_df
 
 ; Function Attrs: nounwind
 define float @sf_sf_sf(float %p1, float %p2) #0 {
 entry:
   %p1.addr = alloca float, align 4
   %p2.addr = alloca float, align 4
   store float %p1, float* %p1.addr, align 4
   store float %p2, float* %p2.addr, align 4
   %0 = load float, float* %p1.addr, align 4
   store float %0, float* @x, align 4
   %1 = load float, float* %p2.addr, align 4
   store float %1, float* @y, align 4
   %2 = load float, float* @ret_sf, align 4
   ret float %2
 }
 
 ; stel: .section .mips16.fn.sf_sf_sf,"ax",@progbits
 ; stel: .ent __fn_stub_sf_sf_sf
 ; stel: lui $25, %hi(sf_sf_sf)
 ; stel: addiu $25, $25, %lo(sf_sf_sf)
 ; stel: mfc1 $4, $f12
 ; stel: mfc1 $5, $f14
 ; stel: jr $25
-; stel: __fn_local_sf_sf_sf = sf_sf_sf
+; stel: .set $__fn_local_sf_sf_sf, sf_sf_sf
 ; stel: .end __fn_stub_sf_sf_sf
 
 ; Function Attrs: nounwind
 define float @sf_sf_df(float %p1, double %p2) #0 {
 entry:
   %p1.addr = alloca float, align 4
   %p2.addr = alloca double, align 8
   store float %p1, float* %p1.addr, align 4

 ; stel: .section .mips16.fn.sf_sf_df,"ax",@progbits
 ; stel: .ent __fn_stub_sf_sf_df
 ; stel: lui $25, %hi(sf_sf_df)
 ; stel: addiu $25, $25, %lo(sf_sf_df)
 ; stel: mfc1 $4, $f12
 ; stel: mfc1 $6, $f14
 ; stel: mfc1 $7, $f15
 ; stel: jr $25
-; stel: __fn_local_sf_sf_df = sf_sf_df
+; stel: .set $__fn_local_sf_sf_df, sf_sf_df
 ; stel: .end __fn_stub_sf_sf_df
 
 ; Function Attrs: nounwind
 define float @sf_df_sf(double %p1, float %p2) #0 {
 entry:
   %p1.addr = alloca double, align 8
   %p2.addr = alloca float, align 4
   store double %p1, double* %p1.addr, align 8

 ; stel: .section .mips16.fn.sf_df_sf,"ax",@progbits
 ; stel: .ent __fn_stub_sf_df_sf
 ; stel: lui $25, %hi(sf_df_sf)
 ; stel: addiu $25, $25, %lo(sf_df_sf)
 ; stel: mfc1 $4, $f12
 ; stel: mfc1 $5, $f13
 ; stel: mfc1 $6, $f14
 ; stel: jr $25
-; stel: __fn_local_sf_df_sf = sf_df_sf
+; stel: .set $__fn_local_sf_df_sf, sf_df_sf
 ; stel: .end __fn_stub_sf_df_sf
 
 ; Function Attrs: nounwind
 define float @sf_df_df(double %p1, double %p2) #0 {
 entry:
   %p1.addr = alloca double, align 8
   %p2.addr = alloca double, align 8
   store double %p1, double* %p1.addr, align 8

 ; stel: .ent __fn_stub_sf_df_df
 ; stel: lui $25, %hi(sf_df_df)
 ; stel: addiu $25, $25, %lo(sf_df_df)
 ; stel: mfc1 $4, $f12
 ; stel: mfc1 $5, $f13
 ; stel: mfc1 $6, $f14
 ; stel: mfc1 $7, $f15
 ; stel: jr $25
-; stel: __fn_local_sf_df_df = sf_df_df
+; stel: .set $__fn_local_sf_df_df, sf_df_df
 ; stel: .end __fn_stub_sf_df_df
 
 attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }

llvm/trunk/test/CodeGen/Mips/mips16ex.ll

 ; RUN: llc  -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
 
 ;16: main:
 ;16-NEXT: [[TMP:.*]]:
-;16-NEXT: $func_begin0 = ([[TMP]])
+;16-NEXT: .set $func_begin0, ([[TMP]])
 ;16-NEXT: .cfi_startproc
 ;16-NEXT: .cfi_personality
 @.str = private unnamed_addr constant [7 x i8] c"hello\0A\00", align 1
 @_ZTIi = external constant i8*
 @.str1 = private unnamed_addr constant [15 x i8] c"exception %i \0A\00", align 1
 
 define i32 @main() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
 entry:

llvm/trunk/test/CodeGen/PowerPC/asm-printer-topological-order.ll

 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
 
 @TestA = alias void (), void ()* @TestC
 @TestB = alias void (), void ()* @TestC
 @TestC = alias void (), void ()* @TestD
 
 define void @TestD() {
 entry:
   ret void
 }
 
 ; CHECK-LABEL: TestD:
-; CHECK: TestC = TestD
-; CHECK-DAG: TestB = TestC
-; CHECK-DAG: TestA = TestC
+; CHECK: .set TestC, TestD
+; CHECK-DAG: .set TestB, TestC
+; CHECK-DAG: .set TestA, TestC

llvm/trunk/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll

 ; RUN: llc < %s -mtriple=i686-pc-linux-gnu | FileCheck %s
 
 @__gthrw_pthread_once = weak alias i32 (i32*, void ()*), i32 (i32*, void ()*)* @pthread_once    ; <i32 (i32*, void ()*)*> [#uses=0]
 
 define weak i32 @pthread_once(i32*, void ()*) {
   ret i32 0
 }
 
 ; CHECK: .weak   pthread_once
 ; CHECK: pthread_once:
 
 ; CHECK: .weak   __gthrw_pthread_once
-; CHECK: __gthrw_pthread_once = pthread_once
+; CHECK: .set __gthrw_pthread_once, pthread_once

llvm/trunk/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll

 ; It is cobbered by popq %rbx
 ; CHECK: movq
 ; CHECK-NEXT: [[LABEL:Ltmp[0-9]*]]
 ; CHECK: .loc 1 19 0
 ; CHECK: popq
 ; CHECK-NEXT: [[CLOBBER:Ltmp[0-9]*]]
 
 ; CHECK: Ldebug_loc0:
-; CHECK-NEXT: [[SET1:.*]] = Lfunc_begin0-Lfunc_begin0
+; CHECK-NEXT: .set [[SET1:.*]], Lfunc_begin0-Lfunc_begin0
 ; CHECK-NEXT: .quad   [[SET1]]
-; CHECK-NEXT: [[SET2:.*]] = [[LABEL]]-Lfunc_begin0
+; CHECK-NEXT: .set [[SET2:.*]], [[LABEL]]-Lfunc_begin0
 ; CHECK-NEXT: .quad   [[SET2]]
 ; CHECK-NEXT: .short  1     ## Loc expr size
 ; CHECK-NEXT: .byte   85
-; CHECK-NEXT: [[SET3:.*]] = [[LABEL]]-Lfunc_begin0
+; CHECK-NEXT: .set [[SET3:.*]], [[LABEL]]-Lfunc_begin0
 ; CHECK-NEXT: .quad   [[SET3]]
-; CHECK-NEXT: [[SET4:.*]] = [[CLOBBER]]-Lfunc_begin0
+; CHECK-NEXT: .set [[SET4:.*]], [[CLOBBER]]-Lfunc_begin0
 ; CHECK-NEXT: .quad   [[SET4]]
 ; CHECK-NEXT: .short  1     ## Loc expr size
 ; CHECK-NEXT: .byte   83

llvm/trunk/test/CodeGen/X86/alias-gep.ll

 ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck --check-prefix=MACHO %s
 ; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck --check-prefix=ELF %s
 
 ;MACHO: .globl _offsetSym0
 ;MACHO-NOT: .alt_entry
-;MACHO: _offsetSym0 = _s
+;MACHO: .set _offsetSym0, _s
 ;MACHO: .globl _offsetSym1
 ;MACHO: .alt_entry _offsetSym1
-;MACHO: _offsetSym1 = _s+8
+;MACHO: .set _offsetSym1, _s+8
 
 ;ELF: .globl offsetSym0
 ;ELF-NOT: .alt_entry
-;ELF: offsetSym0 = s
+;ELF: .set offsetSym0, s
 ;ELF: .globl offsetSym1
 ;ELF-NOT: .alt_entry
-;ELF: offsetSym1 = s+8
+;ELF: .set offsetSym1, s+8
 
 %struct.S1 = type { i32, i32, i32 }
 
 @s = global %struct.S1 { i32 31, i32 32, i32 33 }, align 4
 @offsetSym0 = alias i32, i32* getelementptr inbounds (%struct.S1, %struct.S1* @s, i64 0, i32 0)
 @offsetSym1 = alias i32, i32* getelementptr inbounds (%struct.S1, %struct.S1* @s, i64 0, i32 2)

llvm/trunk/test/CodeGen/X86/aliases.ll

 ; CHECK-DAG: .globl bar_h
 ; CHECK-DAG: .hidden  bar_h
 @bar_h = hidden alias i32, i32* @bar
 
 ; CHECK-DAG: .globl bar_p
 ; CHECK-DAG: .protected bar_p
 @bar_p = protected alias i32, i32* @bar
 
-; CHECK-DAG: test2 = bar+4
+; CHECK-DAG: .set test2, bar+4
 @test2 = alias i32, getelementptr(i32, i32* @bar, i32 1)
 
-; CHECK-DAG: test3 = 42
+; CHECK-DAG: .set test3, 42
 @test3 = alias i32, inttoptr(i32 42 to i32*)
 
-; CHECK-DAG: test4 = bar
+; CHECK-DAG: .set test4, bar
 @test4 = alias i32, inttoptr(i64 ptrtoint (i32* @bar to i64) to i32*)
 
-; CHECK-DAG: test5 = test2-bar
+; CHECK-DAG: .set test5, test2-bar
 @test5 = alias i32, inttoptr(i32 sub (i32 ptrtoint (i32* @test2 to i32),
                                  i32 ptrtoint (i32* @bar to i32)) to i32*)
 
 ; CHECK-DAG: .globl test
 define i32 @test() {
 entry:
    %tmp = load i32, i32* @foo1
    %tmp1 = load i32, i32* @foo2

llvm/trunk/test/CodeGen/X86/catchret-empty-fallthrough.ll

 ; CHECK: retq
 ; CHECK: .LBB0_[[try]]:
 ; CHECK: .Ltmp0:
 ; CHECK: callq bar
 ; CHECK: .Ltmp1:
 ; CHECK: .LBB0_[[catch:[0-9]+]]:
 
 ; CHECK: .seh_handlerdata
-; CHECK-NEXT: .Lfoo$parent_frame_offset = 32
+; CHECK-NEXT: .set .Lfoo$parent_frame_offset, 32
 ; CHECK-NEXT: .long   (.Llsda_end0-.Llsda_begin0)/16
 ; CHECK-NEXT: .Llsda_begin0:
 ; CHECK-NEXT: .long   .Ltmp0@IMGREL+1
 ; CHECK-NEXT: .long   .Ltmp1@IMGREL+1
 ; CHECK-NEXT: .long   1
 ; CHECK-NEXT: .long   .LBB0_[[catch]]@IMGREL

llvm/trunk/test/CodeGen/X86/coff-comdat.ll

 ; CHECK: .section        .bss,"bw",associative,_f5
 ; CHECK: .globl  _v5
 ; CHECK: .section        .bss,"bw",associative,_f6
 ; CHECK: .globl  _v6
 ; CHECK: .section        .bss,"bw",same_size,_f6
 ; CHECK: .globl  _f6
 ; CHECK: .section        .rdata,"dr",largest,_vftable
 ; CHECK: .globl  _vftable
-; CHECK: _vftable = L_some_name+4
+; CHECK: .set _vftable, L_some_name+4

llvm/trunk/test/CodeGen/X86/coff-feat00.ll

 ; RUN: llc -O0 -mtriple=i386-pc-win32 -filetype=asm -o - %s | FileCheck %s
 
 define i32 @foo() {
   ret i32 0
 }
 
-; CHECK: @feat.00 = 1
+; CHECK: .set @feat.00, 1

llvm/trunk/test/CodeGen/X86/dllexport-x86_64.ll

 @WeakVar2 = weak_odr dllexport unnamed_addr constant i32 1
 
 ; CHECK: .bss
 ; CHECK: .globl WeakVar3
 @WeakVar3 = weak_odr dllexport global i32 0, align 4
 
 
 ; CHECK: .globl alias
-; CHECK: alias = notExported
+; CHECK: .set alias, notExported
 @alias = dllexport alias void(), void()* @notExported
 
 ; CHECK: .globl aliasNotExported
-; CHECK: aliasNotExported = f1
+; CHECK: .set aliasNotExported, f1
 @aliasNotExported = alias void(), void()* @f1
 
 ; CHECK: .globl alias2
-; CHECK: alias2 = f1
+; CHECK: .set alias2, f1
 @alias2 = dllexport alias void(), void()* @f1
 
 ; CHECK: .globl alias3
-; CHECK: alias3 = notExported
+; CHECK: .set alias3, notExported
 @alias3 = dllexport alias void(), void()* @notExported
 
 ; CHECK: .weak weak_alias
-; CHECK: weak_alias = f1
+; CHECK: .set weak_alias, f1
 @weak_alias = weak_odr dllexport alias void(), void()* @f1
 
 @blob = global [6 x i8] c"\B8*\00\00\00\C3", section ".text", align 16
 @blob_alias = dllexport alias i32 (), bitcast ([6 x i8]* @blob to i32 ()*)
 
 @exportedButNotDefinedVariable = external dllexport global i32
 declare dllexport void @exportedButNotDefinedFunction()
 define void @foo() {

llvm/trunk/test/CodeGen/X86/dllexport.ll

 ; CHECK: .globl _WeakVar1
 @WeakVar1 = weak_odr dllexport global i32 1, align 4
 
 ; CHECK: .globl _WeakVar2
 @WeakVar2 = weak_odr dllexport unnamed_addr constant i32 1
 
 
 ; CHECK: .globl _alias
-; CHECK: _alias = _notExported
+; CHECK: .set _alias, _notExported
 @alias = dllexport alias void(), void()* @notExported
 
 ; CHECK: .globl _alias2
-; CHECK: _alias2 = _f1
+; CHECK: .set _alias2, _f1
 @alias2 = dllexport alias void(), void()* @f1
 
 ; CHECK: .globl _alias3
-; CHECK: _alias3 = _notExported
+; CHECK: .set _alias3, _notExported
 @alias3 = dllexport alias void(), void()* @notExported
 
 ; CHECK: .weak _weak_alias
-; CHECK: _weak_alias = _f1
+; CHECK: .set _weak_alias, _f1
 @weak_alias = weak_odr dllexport alias void(), void()* @f1
 
 ; Verify items that should not be exported do not appear in the export table.
 ; We use a separate check prefix to avoid confusion between -NOT and -SAME.
 ; NOTEXPORTED: .section .drectve
 ; NOTEXPORTED-NOT: notExported
 ; NOTEXPORTED-NOT: notDefined
 

llvm/trunk/test/CodeGen/X86/ifunc-asm.ll

 ; RUN: llvm-as < %s -o - | llc -filetype=asm | FileCheck %s
 
 target triple = "x86_64-unknown-linux-gnu"
 
 define internal i64 @foo_ifunc() {
 entry:
   ret i64 0
 }
 ; CHECK: .type foo_ifunc,@function
 ; CHECK-NEXT: foo_ifunc:
 
 @foo = ifunc i32 (i32), i64 ()* @foo_ifunc
 ; CHECK: .type foo,@function
 ; CHECK-NEXT: .type foo,@gnu_indirect_function
-; CHECK-NEXT: foo = foo_ifunc
+; CHECK-NEXT: .set foo, foo_ifunc

llvm/trunk/test/CodeGen/X86/lea-opt-memop-check-1.ll

entry:
   %fActivateActCtxSuccess = alloca i32, align 4
   %proc = alloca i32, align 4
   %ulpCookie = alloca i32, align 4
   call void (...) @llvm.localescape(i32* nonnull %fActivateActCtxSuccess, i32* nonnull %proc, i32* nonnull %ulpCookie)
   %tmp0 = tail call i8* @llvm.localaddress()
   call fastcc void @"\01?fin$0@0@test2@@"(i8* %tmp0)
   ret void
 ; CHECK-LABEL: test2:
-; CHECK:  Ltest2$frame_escape_0 = 8
-; CHECK:  Ltest2$frame_escape_1 = 4
-; CHECK:  Ltest2$frame_escape_2 = 0
+; CHECK:  .set Ltest2$frame_escape_0, 8
+; CHECK:  .set Ltest2$frame_escape_1, 4
+; CHECK:  .set Ltest2$frame_escape_2, 0
 ; CHECK:  calll "?fin$0@0@test2@@"
 }
 
 ; Check that the LEA optimization pass works with MCSymbol address displacements.
 define internal fastcc void @"\01?fin$0@0@test2@@"(i8* readonly %frame_pointer) unnamed_addr noinline nounwind optsize {
 entry:
   %tmp0 = tail call i8* @llvm.localrecover(i8* bitcast (void ()* @test2 to i8*), i8* %frame_pointer, i32 1)
   %proc = bitcast i8* %tmp0 to i32*

llvm/trunk/test/CodeGen/X86/localescape.ll

 }
 
 ; X64-LABEL: alloc_func:
 ; X64: pushq   %rbp
 ; X64: subq    $16, %rsp
 ; X64: .seh_stackalloc 16
 ; X64: leaq    16(%rsp), %rbp
 ; X64: .seh_setframe 5, 16
-; X64: .Lalloc_func$frame_escape_0 = -4
-; X64: .Lalloc_func$frame_escape_1 = -12
+; X64: .set .Lalloc_func$frame_escape_0, -4
+; X64: .set .Lalloc_func$frame_escape_1, -12
 ; X64: movl $42, -4(%rbp)
 ; X64: movl $13, -12(%rbp)
 ; X64: movq   %rbp, %rcx
 ; X64: callq print_framealloc_from_fp
 ; X64: retq
 
 ; X86-LABEL: alloc_func:
 ; X86: pushl   %ebp
 ; X86: movl    %esp, %ebp
 ; X86: subl    $12, %esp
-; X86: Lalloc_func$frame_escape_0 = -4
-; X86: Lalloc_func$frame_escape_1 = -12
+; X86: .set Lalloc_func$frame_escape_0, -4
+; X86: .set Lalloc_func$frame_escape_1, -12
 ; X86: movl    $42, -4(%ebp)
 ; X86: movl    $13, -12(%ebp)
 ; X86: pushl   %ebp
 ; X86: calll   _print_framealloc_from_fp
 ; X86: movl    %ebp, %esp
 ; X86: popl    %ebp
 ; X86: retl
 
define void @alloc_func_no_frameaddr() {
   call void @print_framealloc_from_fp(i8* null)
   ret void
 }
 
 ; X64-LABEL: alloc_func_no_frameaddr:
 ; X64: subq    $40, %rsp
 ; X64: .seh_stackalloc 40
 ; X64: .seh_endprologue
-; X64: .Lalloc_func_no_frameaddr$frame_escape_0 = 36
-; X64: .Lalloc_func_no_frameaddr$frame_escape_1 = 32
+; X64: .set .Lalloc_func_no_frameaddr$frame_escape_0, 36
+; X64: .set .Lalloc_func_no_frameaddr$frame_escape_1, 32
 ; X64: movl $42, 36(%rsp)
 ; X64: movl $13, 32(%rsp)
 ; X64: xorl %ecx, %ecx
 ; X64: callq print_framealloc_from_fp
 ; X64: addq $40, %rsp
 ; X64: retq
 
 ; X86-LABEL: alloc_func_no_frameaddr:
 ; X86: subl    $8, %esp
-; X86: Lalloc_func_no_frameaddr$frame_escape_0 = 4
-; X86: Lalloc_func_no_frameaddr$frame_escape_1 = 0
+; X86: .set Lalloc_func_no_frameaddr$frame_escape_0, 4
+; X86: .set Lalloc_func_no_frameaddr$frame_escape_1, 0
 ; X86: movl $42, 4(%esp)
 ; X86: movl $13, (%esp)
 ; X86: pushl $0
 ; X86: calll _print_framealloc_from_fp
 ; X86: addl    $12, %esp
 ; X86: retl

llvm/trunk/test/CodeGen/X86/pr22019.ll

 ; RUN: llc < %s | FileCheck %s
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 module asm "pselect = __pselect"
 module asm "var = __var"
 module asm "alias = __alias"
-; CHECK: pselect = __pselect
-; CHECK: var = __var
-; CHECK: alias = __alias
+; CHECK: .set pselect, __pselect
+; CHECK: .set var, __var
+; CHECK: .set alias, __alias
 
 ; CHECK: pselect:
 ; CHECK: retq
 define void @pselect() {
   ret void
 }
 
 ; CHECK: var:
 ; CHECK: .long 0
 @var = global i32 0
 
-; CHECK: alias = var
+; CHECK: .set alias, var
 @alias = alias i32, i32* @var

llvm/trunk/test/CodeGen/X86/seh-catch-all-win32.ll

 ; CHECK: pushl %ebp
 ; CHECK: movl %esp, %ebp
 ;       Ensure that we push *all* the CSRs, since they are clobbered by the
 ;       __except block.
 ; CHECK: pushl %ebx
 ; CHECK: pushl %edi
 ; CHECK: pushl %esi
 
-; CHECK: Lmain$frame_escape_0 = [[code_offs:[-0-9]+]]
+; CHECK: .set Lmain$frame_escape_0, [[code_offs:[-0-9]+]]
 ; CHECK: movl %esp, [[reg_offs:[-0-9]+]](%ebp)
 ; CHECK: movl $L__ehtable$main,
 ;       EH state 0
 ; CHECK: movl $0, -16(%ebp)
 ; CHECK: calll _crash
 ; CHECK: popl %esi
 ; CHECK: popl %edi
 ; CHECK: popl %ebx
 ; CHECK: retl
 ; CHECK: LBB0_[[lpbb:[0-9]+]]: # %__except{{$}}
 ;       stackrestore
 ; CHECK: movl -24(%ebp), %esp
 ;       EH state -1
 ; CHECK: movl [[code_offs]](%ebp), %[[code:[a-z]+]]
 ; CHECK: pushl %[[code]]
 ; CHECK: pushl $_str
 ; CHECK: calll _printf
 
 ; CHECK: .section .xdata,"dr"
-; CHECK: Lmain$parent_frame_offset = [[reg_offs]]
+; CHECK: .set Lmain$parent_frame_offset, [[reg_offs]]
 ; CHECK: .p2align 2
 ; CHECK: L__ehtable$main
 ; CHECK-NEXT: .long -1
 ; CHECK-NEXT: .long _filt$main
 ; CHECK-NEXT: .long LBB0_[[lpbb]]
 
 ; CHECK-LABEL: _filt$main:
 ; CHECK: pushl %ebp
 ; CHECK: movl %esp, %ebp
 ; CHECK: movl (%ebp), %[[oldebp:[a-z]+]]
 ; CHECK: movl -20(%[[oldebp]]), %[[ehinfo:[a-z]+]]
 ; CHECK: movl (%[[ehinfo]]), %[[ehrec:[a-z]+]]
 ; CHECK: movl (%[[ehrec]]), %[[ehcode:[a-z]+]]
 ; CHECK: movl %[[ehcode]], {{.*}}(%{{.*}})

llvm/trunk/test/CodeGen/X86/seh-catchpad.ll

 ; CHECK:         callq   "?fin$0@0@main@@"
 ; CHECK:         jmp     .LBB1_[[epilogue]]
 ; CHECK: .LBB1_[[except2bb:[0-9]+]]:                                # %__except.ret
 ; CHECK:         leaq    "??_C@_06IBDBCMGJ@caught?$AA@"(%rip), %rcx
 ; CHECK:         callq   puts
 ; CHECK:         jmp     .LBB1_[[epilogue]]
 
 ; CHECK:         .seh_handlerdata
-; CHECK-NEXT:         .Lmain$parent_frame_offset = 32
+; CHECK-NEXT:         .set .Lmain$parent_frame_offset, 32
 ; CHECK-NEXT:         .long   (.Llsda_end0-.Llsda_begin0)/16
 ; CHECK-NEXT: .Llsda_begin0:
 ; CHECK-NEXT:         .long   .Ltmp0@IMGREL+1
 ; CHECK-NEXT:         .long   .Ltmp1@IMGREL+1
 ; CHECK-NEXT:         .long   1
 ; CHECK-NEXT:         .long   .LBB1_[[except1bb]]@IMGREL
 ; CHECK-NEXT:         .long   .Ltmp0@IMGREL+1
 ; CHECK-NEXT:         .long   .Ltmp1@IMGREL+1

llvm/trunk/test/CodeGen/X86/seh-finally.ll

lpad:                                             ; preds = %entry
   %call2 = call i32 @puts(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @str_recovered, i64 0, i64 0)) [ "funclet"(token %p) ]
   cleanupret from %p unwind to caller
 }
 
 ; X64-LABEL: main:
 ; X64: retq
 
 ; X64: .seh_handlerdata
-; X64-NEXT: .Lmain$parent_frame_offset = 32
+; X64-NEXT: .set .Lmain$parent_frame_offset, 32
 ; X64-NEXT: .long   (.Llsda_end0-.Llsda_begin0)/16 # Number of call sites
 ; X64-NEXT: .Llsda_begin0:
 ; X64-NEXT: .long   .Ltmp0@IMGREL+1 # LabelStart
 ; X64-NEXT: .long   .Ltmp1@IMGREL+1 # LabelEnd
 ; X64-NEXT: .long   "?dtor$2@?0?main@4HA"@IMGREL # FinallyFunclet
 ; X64-NEXT: .long   0               # Null
 ; X64-NEXT: .Llsda_end0:
 

llvm/trunk/test/CodeGen/X86/seh-no-invokes.ll

 ; }
 
 ; When running clang at -O1, we can end up deleting unreachable SEH catchpads
 ; without running GlobalDCE to remove the associated filter. This used to
 ; result in references to undefined labels. Now we check that we emit the
 ; label. This was PR30431.
 
 ; CHECK-LABEL: _f:                                     # @f
-; CHECK: Lf$parent_frame_offset = 0
+; CHECK: .set Lf$parent_frame_offset, 0
 ; CHECK: retl
 
 ; CHECK-LABEL: "?filt$0@0@f@@":                        # @"\01?filt$0@0@f@@"
 ; CHECK: movl    $Lf$parent_frame_offset,
 
 ; ModuleID = 't.c'
 source_filename = "t.c"
 target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"

llvm/trunk/test/CodeGen/X86/seh-stack-realign.ll

entry:
   %3 = load i32, i32* %2, align 4
   store i32 %3, i32* %__exceptioncode, align 4
   ret i32 1
 }
 
 ; Check that we can get the exception code from eax to the printf.
 
 ; CHECK-LABEL: _main:
-; CHECK: Lmain$frame_escape_0 = [[code_offs:[-0-9]+]]
+; CHECK: .set Lmain$frame_escape_0, [[code_offs:[-0-9]+]]
 ; CHECK: movl %esp, [[reg_offs:[-0-9]+]](%esi)
 ; CHECK: movl $L__ehtable$main,
 ;       EH state 0
 ; CHECK: movl $0, 32(%esi)
 ; CHECK: calll _crash
 ; CHECK: retl
 ; CHECK: LBB0_[[lpbb:[0-9]+]]: # %__except
 ;       Restore ESP
 ; CHECK: movl -24(%ebp), %esp
 ;       Restore ESI
 ; CHECK: leal -36(%ebp), %esi
 ;       Restore EBP
 ; CHECK: movl 4(%esi), %ebp
 ; CHECK: movl [[code_offs]](%esi), %[[code:[a-z]+]]
 ; CHECK: pushl %[[code]]
 ; CHECK: pushl $_str
 ; CHECK: calll _printf
 
 ; CHECK: .section .xdata,"dr"
-; CHECK: Lmain$parent_frame_offset = [[reg_offs]]
+; CHECK: .set Lmain$parent_frame_offset, [[reg_offs]]
 ; CHECK: L__ehtable$main
 ; CHECK-NEXT: .long -1
 ; CHECK-NEXT: .long _filt$main
 ; CHECK-NEXT: .long LBB0_[[lpbb]]
 
 ; CHECK-LABEL: _filt$main:
 ; CHECK: pushl %ebp
 ; CHECK: movl %esp, %ebp
 ; CHECK: movl (%ebp), %[[oldebp:[a-z]+]]
 ; CHECK: movl -20(%[[oldebp]]), %[[ehinfo:[a-z]+]]
 ; CHECK: movl (%[[ehinfo]]), %[[ehrec:[a-z]+]]
 ; CHECK: movl (%[[ehrec]]), %[[ehcode:[a-z]+]]
 ; CHECK: movl %[[ehcode]], {{.*}}(%{{.*}})

llvm/trunk/test/CodeGen/XCore/globals.ll

 ; CHECK: iG7:
 
 @G8 = global i32 9312
 ; CHECK: .section .dp.data,"awd",@progbits
 ; CHECK: G8:
 
 @array = global [10 x i16] zeroinitializer, align 2
 ; CHECK: .globl  array.globound
-; CHECK:  array.globound = 10
+; CHECK: .set array.globound, 10

llvm/trunk/test/CodeGen/XCore/linkage.ll

 }
 
 ; CHECK-NOT: .protected
 define protected void @test_protected() {
   unreachable
 }
 
 ; CHECK: .globl array.globound
-; CHECK: array.globound = 2
+; CHECK: .set array.globound, 2
 ; CHECK: .weak array.globound
 ; CHECK: .globl array
 ; CHECK: .weak array
 @array = weak global [2 x i32] zeroinitializer
 
 ; CHECK: .globl ac.globound
-; CHECK: ac.globound = 2
+; CHECK: .set ac.globound, 2
 ; CHECK: .weak ac.globound
 ; CHECK: .globl ac
 ; CHECK: .weak ac
 @ac = common global [2 x i32] zeroinitializer
 
 ; CHECK: .globl gd
 ; CHECK: .weak gd
 @gd = weak global i32 0

llvm/trunk/test/DebugInfo/X86/dbg-value-range.ll

 ; The variable is in %rdi which is clobbered by 'movl %ebx, %edi'
 ; Here Ltmp7 is the end of the location range.
 
 ;CHECK: .loc  1 7 2
 ;CHECK: movl
 ;CHECK-NEXT: [[CLOBBER:Ltmp[0-9]*]]
 
 ;CHECK:Ldebug_loc0:
-;CHECK-NEXT: Lset{{.*}} =
+;CHECK-NEXT: .set Lset{{.*}},
 ;CHECK-NEXT:  .quad
-;CHECK-NEXT: [[CLOBBER_OFF:Lset.*]] = [[CLOBBER]]-{{.*}}
+;CHECK-NEXT: .set [[CLOBBER_OFF:Lset.*]], [[CLOBBER]]-{{.*}}
 ;CHECK-NEXT:  .quad [[CLOBBER_OFF]]
 ;CHECK-NEXT:  .short 1 ## Loc expr size
 ;CHECK-NEXT:  .byte 85 ## DW_OP_reg
 ;CHECK-NEXT:  .quad 0
 ;CHECK-NEXT:  .quad 0
 !24 = !{i32 1, !"Debug Info Version", i32 3}

llvm/trunk/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll

 ; DWARF3: file_names[  1]:
 ; DWARF3-NEXT: name: "simple2.c"
 ; DWARF3-NEXT: dir_index: 0
 ; DWARF3-NOT: file_names
 
 ; PR15408
 ; ASM: Lcu_begin0:
 ; ASM-NOT: Lcu_begin
-; ASM: Lset[[LT:[0-9]+]] = Lline_table_start0-Lsection_line ## DW_AT_stmt_list
+; ASM: .set Lset[[LT:[0-9]+]], Lline_table_start0-Lsection_line ## DW_AT_stmt_list
 ; ASM-NEXT: .long   Lset[[LT]]
 ; ASM: Lcu_begin1:
 ; ASM-NOT: Lcu_begin
-; ASM: Lset[[LT:[0-9]+]] = Lline_table_start0-Lsection_line ## DW_AT_stmt_list
+; ASM: .set Lset[[LT:[0-9]+]], Lline_table_start0-Lsection_line ## DW_AT_stmt_list
 ; ASM-NEXT: .long   Lset[[LT]]
 define i32 @test(i32 %a) nounwind uwtable ssp !dbg !5 {
 entry:
   %a.addr = alloca i32, align 4
   store i32 %a, i32* %a.addr, align 4
   call void @llvm.dbg.declare(metadata i32* %a.addr, metadata !15, metadata !DIExpression()), !dbg !16
   %0 = load i32, i32* %a.addr, align 4, !dbg !17
   %call = call i32 @fn(i32 %0), !dbg !17

llvm/trunk/test/MC/AsmParser/assignment.s

 # RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
 
 # CHECK: TEST0:
-# CHECK: a = 0
+# CHECK: .set a, 0
 TEST0:
         a = 0
 
+# CHECK: TEST1:
+# CHECK: .set b, 0
+TEST1:
+        .set b, 0
+
 # CHECK: .globl _f1
-# CHECK: _f1 = 0
+# CHECK: .set _f1, 0
         .globl _f1
         _f1 = 0
+
+# CHECK: .globl _f2
+# CHECK: .set _f2, 0
+        .globl _f2
+        .set _f2, 0
+

llvm/trunk/test/MC/AsmParser/directive_include.s

 # RUN: llvm-mc -triple i386-unknown-unknown %s -I  %p | FileCheck %s
 
 # CHECK: TESTA:
 # CHECK: TEST0:
-# CHECK: a = 0
+# CHECK: .set a, 0
 # CHECK: TESTB:
 TESTA:  
   .include       "directive\137set.s"   # "\137" is underscore "_"
 TESTB:

llvm/trunk/test/MC/AsmParser/directive_set.s

 # RUN: llvm-mc -triple i386-unknown-elf %s | FileCheck %s
 
 # CHECK: TEST0:
-# CHECK: a = 0
+# CHECK: .set a, 0
 # CHECK-NOT: .no_dead_strip a
 TEST0:  
         .set a, 0
         
 # CHECK: TEST1:
-# CHECK: a = 0
+# CHECK: .set a, 0
 # CHECK-NOT: .no_dead_strip a
 TEST1:  
         .equ a, 0
 

llvm/trunk/test/MC/AsmParser/include.ll

 ; RUN: llc -I %p/Inputs -filetype asm -o - %s | FileCheck %s
 ; REQUIRES: default_triple
 
 module asm ".include \22module.x\22"
 
 define arm_aapcscc void @f() {
 entry:
   call void asm sideeffect ".include \22function.x\22", ""()
   ret void
 }
 
-; CHECK: MODULE = 1
-; CHECK: FUNCTION = 1
+; CHECK: .set MODULE, 1
+; CHECK: .set FUNCTION, 1

llvm/trunk/test/MC/AsmParser/labels.s

"a$b":
 
         .text
 foo:
 // CHECK: addl $24, a$b(%eax)
         addl $24, "a$b"(%eax)
 // CHECK: addl $24, a$b+10(%eax)
         addl $24, ("a$b" + 10)(%eax)
 
-// CHECK: b$c = 10
+// CHECK: .set b$c, 10
 "b$c" = 10
 // CHECK: addl $10, %eax
         addl $"b$c", %eax
 
-// CHECK: "a 0" = 11
+// CHECK: .set "a 0", 11
         .set "a 0", 11
 
 // CHECK: .long 11
         .long "a 0"
 
 // XXCHCK: .section "a 1,a 2"
 //.section "a 1", "a 2"
 

 // CHECK: .lcomm "a 7",1
         .lcomm "a 7", 1
 
 // FIXME: We don't bother to support .lsym.
 
 // CHECX: .lsym "a 8",1
 //        .lsym "a 8", 1
 
-// CHECK: "a 9" = a-b
+// CHECK: .set "a 9", a-b
         .set "a 9", a - b
 
 // CHECK: .long "a 9"
         .long "a 9"

llvm/trunk/test/MC/AsmParser/macro-args.s

 .text
 
 top foo
 top bar, 42
 
 // CHECK: _foo:
 // CHECK-NOT: fred
 // CHECK: _bar
-// CHECK-NEXT: fred = 42
+// CHECK-NEXT: .set fred, 42
 
 
 .macro foo
 foo_$0_$1_$2_$3:
   nop
 .endm
 
 foo 1, 2, 3, 4
 foo 1, , 3, 4
 
 // CHECK: foo_1_2_3_4:
 // CHECK: foo_1__3_4:

llvm/trunk/test/MC/Mips/cpsetup.s

 t1b:
 IMM_8 = 8
         .cpsetup $25, IMM_8, __cerror
         nop
         .cpreturn
         nop
 
 # ALL-LABEL: t1b:
-# ASM-NEXT: IMM_8 = 8
+# ASM-NEXT: .set IMM_8, 8
 
 # O32-NOT: __cerror
 
 # NXX-NEXT: sd       $gp, 8($sp)
 # NXX-NEXT: lui      $gp, 0
 # N32-NEXT: R_MIPS_HI16 __gnu_local_gp
 # N64-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16  __cerror
 # NXX-NEXT: addiu    $gp, $gp, 0