This patch moves isAsCheapAsAMove to be a new API defined in TargetInstroInfo, so different targets could override it by customizing micro-architecture specific versions. For AArch64, this patch only adds cortex-a57 and cortex-a53 support so far. In LLVM, register coalesce pass is leveraging this API to help rematerialization.
With this patch applied, we would have some performance changes on cortex-a57. Below is running time change data