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Differential D43459

[X86] Disable CLWB in Cannon Lake
ClosedPublic

Authored by GBuella on Feb 19 2018, 6:02 AM.

Details

Reviewers
craig.topper
zvi
echristo
Commits
rG379a6f8895b6: Merging r325655: --------------------------------------------------------------…
rG94a940d2b409: [X86] Disable CLWB in Cannon Lake
rL325672: Merging r325655:
rC325655: [X86] Disable CLWB in Cannon Lake
rL325655: [X86] Disable CLWB in Cannon Lake
Summary

Cannon Lake does not support CLWB, therefore it
does not include all features listed under SKX.

Diff Detail

Event Timeline

GBuella created this revision.Feb 19 2018, 6:02 AM
Herald added a subscriber: cfe-commits. · View Herald TranscriptFeb 19 2018, 6:02 AM
Harbormaster completed remote builds in B15147: Diff 134899.Feb 19 2018, 6:03 AM
GBuella added a comment.Feb 19 2018, 6:03 AM

See also: https://reviews.llvm.org/D43380

craig.topper accepted this revision.Feb 19 2018, 9:21 AM

LGTM

This revision is now accepted and ready to land.Feb 19 2018, 9:21 AM
Closed by commit rL325655: [X86] Disable CLWB in Cannon Lake (authored by ctopper). · Explain WhyFeb 20 2018, 4:19 PM
This revision was automatically updated to reflect the committed changes.
Herald added a subscriber: llvm-commits. · View Herald TranscriptFeb 20 2018, 4:19 PM

Revision Contents

PathSize
lib/
Basic/
Targets/
3 lines
test/
Preprocessor/
4 lines

Diff 134899

lib/Basic/Targets/X86.cpp

Show First 20 Lines • Show All 169 Lines • ▼ Show 20 Lines case CK_Cannonlake:
LLVM_FALLTHROUGH; LLVM_FALLTHROUGH;
case CK_SkylakeServer: case CK_SkylakeServer:
setFeatureEnabledImpl(Features, "avx512f", true); setFeatureEnabledImpl(Features, "avx512f", true);
setFeatureEnabledImpl(Features, "avx512cd", true); setFeatureEnabledImpl(Features, "avx512cd", true);
setFeatureEnabledImpl(Features, "avx512dq", true); setFeatureEnabledImpl(Features, "avx512dq", true);
setFeatureEnabledImpl(Features, "avx512bw", true); setFeatureEnabledImpl(Features, "avx512bw", true);
setFeatureEnabledImpl(Features, "avx512vl", true); setFeatureEnabledImpl(Features, "avx512vl", true);
setFeatureEnabledImpl(Features, "pku", true); setFeatureEnabledImpl(Features, "pku", true);
if (Kind != CK_Cannonlake) // CNL inherits all SKX features, except CLWB
setFeatureEnabledImpl(Features, "clwb", true); setFeatureEnabledImpl(Features, "clwb", true);
LLVM_FALLTHROUGH; LLVM_FALLTHROUGH;
case CK_SkylakeClient: case CK_SkylakeClient:
setFeatureEnabledImpl(Features, "xsavec", true); setFeatureEnabledImpl(Features, "xsavec", true);
setFeatureEnabledImpl(Features, "xsaves", true); setFeatureEnabledImpl(Features, "xsaves", true);
setFeatureEnabledImpl(Features, "mpx", true); setFeatureEnabledImpl(Features, "mpx", true);
setFeatureEnabledImpl(Features, "sgx", true); setFeatureEnabledImpl(Features, "sgx", true);
setFeatureEnabledImpl(Features, "clflushopt", true); setFeatureEnabledImpl(Features, "clflushopt", true);
setFeatureEnabledImpl(Features, "rtm", true); setFeatureEnabledImpl(Features, "rtm", true);
▲ Show 20 Lines • Show All 1,514 Lines • Show Last 20 Lines

test/Preprocessor/predefined-arch-macros.c

Show First 20 Lines • Show All 968 Lines • ▼ Show 20 Lines
// CHECK_CNL_M32: #define __AVX512F__ 1 // CHECK_CNL_M32: #define __AVX512F__ 1
// CHECK_CNL_M32: #define __AVX512IFMA__ 1 // CHECK_CNL_M32: #define __AVX512IFMA__ 1
// CHECK_CNL_M32: #define __AVX512VBMI__ 1 // CHECK_CNL_M32: #define __AVX512VBMI__ 1
// CHECK_CNL_M32: #define __AVX512VL__ 1 // CHECK_CNL_M32: #define __AVX512VL__ 1
// CHECK_CNL_M32: #define __AVX__ 1 // CHECK_CNL_M32: #define __AVX__ 1
// CHECK_CNL_M32: #define __BMI2__ 1 // CHECK_CNL_M32: #define __BMI2__ 1
// CHECK_CNL_M32: #define __BMI__ 1 // CHECK_CNL_M32: #define __BMI__ 1
// CHECK_CNL_M32: #define __CLFLUSHOPT__ 1 // CHECK_CNL_M32: #define __CLFLUSHOPT__ 1
// CHECK_CNL_M32: #define __CLWB__ 1 // CHECK_CNL_M32-NOT: #define __CLWB__ 1
// CHECK_CNL_M32: #define __F16C__ 1 // CHECK_CNL_M32: #define __F16C__ 1
// CHECK_CNL_M32: #define __FMA__ 1 // CHECK_CNL_M32: #define __FMA__ 1
// CHECK_CNL_M32: #define __LZCNT__ 1 // CHECK_CNL_M32: #define __LZCNT__ 1
// CHECK_CNL_M32: #define __MMX__ 1 // CHECK_CNL_M32: #define __MMX__ 1
// CHECK_CNL_M32: #define __MPX__ 1 // CHECK_CNL_M32: #define __MPX__ 1
// CHECK_CNL_M32: #define __PCLMUL__ 1 // CHECK_CNL_M32: #define __PCLMUL__ 1
// CHECK_CNL_M32: #define __PKU__ 1 // CHECK_CNL_M32: #define __PKU__ 1
// CHECK_CNL_M32: #define __POPCNT__ 1 // CHECK_CNL_M32: #define __POPCNT__ 1
Show All 31 Lines
// CHECK_CNL_M64: #define __AVX512F__ 1 // CHECK_CNL_M64: #define __AVX512F__ 1
// CHECK_CNL_M64: #define __AVX512IFMA__ 1 // CHECK_CNL_M64: #define __AVX512IFMA__ 1
// CHECK_CNL_M64: #define __AVX512VBMI__ 1 // CHECK_CNL_M64: #define __AVX512VBMI__ 1
// CHECK_CNL_M64: #define __AVX512VL__ 1 // CHECK_CNL_M64: #define __AVX512VL__ 1
// CHECK_CNL_M64: #define __AVX__ 1 // CHECK_CNL_M64: #define __AVX__ 1
// CHECK_CNL_M64: #define __BMI2__ 1 // CHECK_CNL_M64: #define __BMI2__ 1
// CHECK_CNL_M64: #define __BMI__ 1 // CHECK_CNL_M64: #define __BMI__ 1
// CHECK_CNL_M64: #define __CLFLUSHOPT__ 1 // CHECK_CNL_M64: #define __CLFLUSHOPT__ 1
// CHECK_CNL_M64: #define __CLWB__ 1 // CHECK_CNL_M64-NOT: #define __CLWB__ 1
// CHECK_CNL_M64: #define __F16C__ 1 // CHECK_CNL_M64: #define __F16C__ 1
// CHECK_CNL_M64: #define __FMA__ 1 // CHECK_CNL_M64: #define __FMA__ 1
// CHECK_CNL_M64: #define __LZCNT__ 1 // CHECK_CNL_M64: #define __LZCNT__ 1
// CHECK_CNL_M64: #define __MMX__ 1 // CHECK_CNL_M64: #define __MMX__ 1
// CHECK_CNL_M64: #define __MPX__ 1 // CHECK_CNL_M64: #define __MPX__ 1
// CHECK_CNL_M64: #define __PCLMUL__ 1 // CHECK_CNL_M64: #define __PCLMUL__ 1
// CHECK_CNL_M64: #define __PKU__ 1 // CHECK_CNL_M64: #define __PKU__ 1
// CHECK_CNL_M64: #define __POPCNT__ 1 // CHECK_CNL_M64: #define __POPCNT__ 1
▲ Show 20 Lines • Show All 1,531 Lines • Show Last 20 Lines