[ARM] Add missing non-standard ARMv8 architecture variant

[yroux]

Summary

This change adds the missing armv8l variant as an alias of armv8 architecture.
The issue was observed with several regressions in validation on armv8l
hardware (for instance ExecutionEngine/frem.ll failed due to lack of neon fpu).

Tested with regression testsuite passed without regression on ARM and x86_64.

[fhahn]

LGTM thanks! Adding some more people who might be interested. I assume armv8l is a Linaro variant?

[yroux]

Thanks fro the review Florian, armv8l is not Linaro specific it is how the kernel and some distro reference ARMv8 LittleEndian targets. BTW, I didn't manage to find where it comes from in first place

[fhahn]

Thanks, LGTM

[yroux]

I don't have the commit rights yet, so it'd be great if you can commit it for me :)

Thanks
Yvan

[fhahn]

Sure, I'll commit it in a bit

[fhahn]

Committed, thanks! I've tweaked the commit title a bit.

llvm/trunk/lib/Support/TargetParser.cpp

return StringSwitch<StringRef>(Arch)
       .Case("v6j", "v6")
       .Case("v6hl", "v6k")
       .Cases("v6m", "v6sm", "v6s-m", "v6-m")
       .Cases("v6z", "v6zk", "v6kz")
       .Cases("v7", "v7a", "v7hl", "v7l", "v7-a")
       .Case("v7r", "v7-r")
       .Case("v7m", "v7-m")
       .Case("v7em", "v7e-m")
-      .Cases("v8", "v8a", "aarch64", "arm64", "v8-a")
+      .Cases("v8", "v8a", "v8l", "aarch64", "arm64", "v8-a")
       .Case("v8.1a", "v8.1-a")
       .Case("v8.2a", "v8.2-a")
       .Case("v8.3a", "v8.3-a")
       .Case("v8r", "v8-r")
       .Case("v8m.base", "v8-m.base")
       .Case("v8m.main", "v8-m.main")
       .Default(Arch);
 }

llvm/trunk/unittests/Support/TargetParserTest.cpp

 #include "llvm/Support/ARMBuildAttributes.h"
 #include "gtest/gtest.h"
 #include <string>
 
 using namespace llvm;
 
 namespace {
 const char *ARMArch[] = {
-    "armv2",     "armv2a",       "armv3",       "armv3m",       "armv4",
-    "armv4t",    "armv5",        "armv5t",      "armv5e",       "armv5te",
-    "armv5tej",  "armv6",        "armv6j",      "armv6k",       "armv6hl",
-    "armv6t2",   "armv6kz",      "armv6z",      "armv6zk",      "armv6-m",
-    "armv6m",    "armv6sm",      "armv6s-m",    "armv7-a",      "armv7",
-    "armv7a",    "armv7ve",      "armv7hl",     "armv7l",       "armv7-r",
-    "armv7r",    "armv7-m",      "armv7m",      "armv7k",       "armv7s",
-    "armv7e-m",  "armv7em",      "armv8-a",     "armv8",        "armv8a",
-    "armv8.1-a", "armv8.1a",     "armv8.2-a",   "armv8.2a",     "armv8.3-a",
-    "armv8.3a",  "armv8-r",      "armv8r",      "armv8-m.base", "armv8m.base",
-    "armv8-m.main", "armv8m.main", "iwmmxt",    "iwmmxt2",      "xscale"};
+    "armv2",       "armv2a",       "armv3",       "armv3m",    "armv4",
+    "armv4t",      "armv5",        "armv5t",      "armv5e",    "armv5te",
+    "armv5tej",    "armv6",        "armv6j",      "armv6k",    "armv6hl",
+    "armv6t2",     "armv6kz",      "armv6z",      "armv6zk",   "armv6-m",
+    "armv6m",      "armv6sm",      "armv6s-m",    "armv7-a",   "armv7",
+    "armv7a",      "armv7ve",      "armv7hl",     "armv7l",    "armv7-r",
+    "armv7r",      "armv7-m",      "armv7m",      "armv7k",    "armv7s",
+    "armv7e-m",    "armv7em",      "armv8-a",     "armv8",     "armv8a",
+    "armv8l",      "armv8.1-a",    "armv8.1a",    "armv8.2-a", "armv8.2a",
+    "armv8.3-a",   "armv8.3a",     "armv8-r",     "armv8r",    "armv8-m.base",
+    "armv8m.base", "armv8-m.main", "armv8m.main", "iwmmxt",    "iwmmxt2",
+    "xscale"};
 
 bool testARMCPU(StringRef CPUName, StringRef ExpectedArch,
                 StringRef ExpectedFPU, unsigned ExpectedFlags,
                 StringRef CPUAttr) {
   ARM::ArchKind AK = ARM::parseCPUArch(CPUName);
   bool pass = ARM::getArchName(AK).equals(ExpectedArch);
   unsigned FPUKind = ARM::getDefaultFPU(CPUName, AK);
   pass &= ARM::getFPUName(FPUKind).equals(ExpectedFPU);
TEST(TargetParserTest, ARMparseHWDiv) {
   const char *hwdiv[] = {"thumb", "arm", "arm,thumb", "thumb,arm"};
 
   for (unsigned i = 0; i < array_lengthof(hwdiv); i++)
     EXPECT_NE(ARM::AEK_INVALID, ARM::parseHWDiv((StringRef)hwdiv[i]));
 }
 
 TEST(TargetParserTest, ARMparseArchEndianAndISA) {
   const char *Arch[] = {
-      "v2",     "v2a",   "v3",     "v3m",   "v4",   "v4t",  "v5",    "v5t",
-      "v5e",    "v5te",  "v5tej",  "v6",    "v6j",  "v6k",  "v6hl",  "v6t2",
-      "v6kz",   "v6z",   "v6zk",   "v6-m",  "v6m",  "v6sm", "v6s-m", "v7-a",
-      "v7",     "v7a",   "v7ve",   "v7hl",  "v7l",  "v7-r", "v7r",   "v7-m",
-      "v7m",    "v7k",   "v7s",    "v7e-m", "v7em", "v8-a", "v8",    "v8a",
-      "v8.1-a", "v8.1a", "v8.2-a", "v8.2a", "v8.3-a", "v8.3a", "v8-r"};
+      "v2",   "v2a",    "v3",    "v3m",    "v4",    "v4t",    "v5",    "v5t",
+      "v5e",  "v5te",   "v5tej", "v6",     "v6j",   "v6k",    "v6hl",  "v6t2",
+      "v6kz", "v6z",    "v6zk",  "v6-m",   "v6m",   "v6sm",   "v6s-m", "v7-a",
+      "v7",   "v7a",    "v7ve",  "v7hl",   "v7l",   "v7-r",   "v7r",   "v7-m",
+      "v7m",  "v7k",    "v7s",   "v7e-m",  "v7em",  "v8-a",   "v8",    "v8a",
+      "v8l",  "v8.1-a", "v8.1a", "v8.2-a", "v8.2a", "v8.3-a", "v8.3a", "v8-r"};
 
   for (unsigned i = 0; i < array_lengthof(Arch); i++) {
     std::string arm_1 = "armeb" + (std::string)(Arch[i]);
     std::string arm_2 = "arm" + (std::string)(Arch[i]) + "eb";
     std::string arm_3 = "arm" + (std::string)(Arch[i]);
     std::string thumb_1 = "thumbeb" + (std::string)(Arch[i]);
     std::string thumb_2 = "thumb" + (std::string)(Arch[i]) + "eb";
     std::string thumb_3 = "thumb" + (std::string)(Arch[i]);