[AMDGPU][MC] Corrected handling of negative expressions

[dp]

Summary

See bug 35716: https://bugs.llvm.org/show_bug.cgi?id=35716

llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

AMDGPUAsmParser::parseAbsoluteExpr(int64_t &Val, bool AbsMod) {
   return getParser().parseAbsoluteExpression(Val);
 }
 
 OperandMatchResultTy
 AMDGPUAsmParser::parseImm(OperandVector &Operands, bool AbsMod) {
   // TODO: add syntactic sugar for 1/(2*PI)
   bool Minus = false;
   if (getLexer().getKind() == AsmToken::Minus) {
+    const AsmToken NextToken = getLexer().peekTok();
+    if (!NextToken.is(AsmToken::Integer) &&
+        !NextToken.is(AsmToken::Real)) {
+        return MatchOperand_NoMatch;
+    }
     Minus = true;
     Parser.Lex();
   }
 
   SMLoc S = Parser.getTok().getLoc();
   switch(getLexer().getKind()) {
   case AsmToken::Integer: {
     int64_t IntVal;
case AsmToken::Real: {
     if (Minus)
       F.changeSign();
     Operands.push_back(
         AMDGPUOperand::CreateImm(this, F.bitcastToAPInt().getZExtValue(), S,
                                  AMDGPUOperand::ImmTyNone, true));
     return MatchOperand_Success;
   }
   default:
-    return Minus ? MatchOperand_ParseFail : MatchOperand_NoMatch;
+    return MatchOperand_NoMatch;
   }
 }
 
 OperandMatchResultTy
 AMDGPUAsmParser::parseReg(OperandVector &Operands) {
   if (auto R = parseRegister()) {
     assert(R->isReg());
     R->Reg.IsForcedVOP3 = isForcedVOP3();

llvm/trunk/test/MC/AMDGPU/expressions.s

 // VI: s_mov_b32 s0, 514 ; encoding: [0xff,0x00,0x80,0xbe,0x02,0x02,0x00,0x00]
 
 BB1:
 v_nop_e64
 BB2:
 s_sub_u32 vcc_lo, vcc_lo, (BB2+4)-BB1
 // VI: s_sub_u32 vcc_lo, vcc_lo, (BB2+4)-BB1 ; encoding: [0x6a,0xff,0xea,0x80,A,A,A,A]
 // VI-NEXT: ;   fixup A - offset: 4, value: (BB2+4)-BB1, kind: FK_Data_4
+
+t=1
+s_sub_u32 s0, s0, -t
+// VI: s_sub_u32 s0, s0, -1            ; encoding: [0x00,0xc1,0x80,0x80]
+
+t=-1
+s_sub_u32 s0, s0, -t
+// VI: s_sub_u32 s0, s0, 1             ; encoding: [0x00,0x81,0x80,0x80]

llvm/trunk/test/MC/AMDGPU/vop3p-err.s

 v_pk_add_f16 v1, abs(v2), v3
 
 // GFX9: :22: error: not a valid operand.
 v_pk_add_f16 v1, v2, |v3|
 
 // GFX9: :22: error: invalid operand for instruction
 v_pk_add_f16 v1, v2, abs(v3)
 
-// GFX9: :19: error: invalid operand for instruction
+// GFX9: :18: error: invalid operand for instruction
 v_pk_add_f16 v1, -v2, v3
 
-// GFX9: :23: error: invalid operand for instruction
+// GFX9: :22: error: invalid operand for instruction
 v_pk_add_f16 v1, v2, -v3
 
 // GFX9: :18: error: invalid operand for instruction
 v_pk_add_u16 v1, abs(v2), v3
 
-// GFX9: :19: error: invalid operand for instruction
+// GFX9: :18: error: invalid operand for instruction
 v_pk_add_u16 v1, -v2, v3
 
 //
 // Constant bus restrictions
 //
 
 // GFX9: invalid operand (violates constant bus restrictions)
 v_pk_add_f16 v255, s1, s2