[mips] Enable the mnemonic spell corrector

[atanasyan]

Summary

This change implements suggesting alternative mnemonics when an invalid one is specified. For example addru $9, $6, 17767 leads to the following error message:

error: unknown instruction, did you mean: add, addiu, addu, maddu?

[sdardis]

I looked at enabling this when @SjoerdMeijer developed the spell checker in the first place but hit upon a nasty error case:

llvmgitsvnbuild $cat test-spellcheck.s
  swk $3, $4
llvmgitsvnbuild $./bin/llvm-mc -arch=mips -mcpu=mips32r6 test-spellcheck.s -o - -mattr=+micromips
  .text
test-spellcheck.s:1:3: error: unknown instruction, did you mean: sw, swe, swl, swm, swp, swr, usw?
  swk $3, $4
  ^

The swe there is potentially refering to the micromips or the micromipsr6 version. swl and swr should not be on the list.

There's a number of instructions which don't have the correct predicates, so the spelling checker will deliver the wrong results, as the set of possible corrections is dependant on the feature bits that are enabled.

I have been working on a patch set to correct / rework the instruction predicates which I should start posting next week.

I think we should hold off on enabling this until the instruction predicates have been fixed.

test/MC/Mips/invalid-instructions-spellcheck.s

2 ↗

(On Diff #124913)

This does not require -show-encoding as the test does not actually check any instruction encodings.

[atanasyan]

In D40646#940759, @sdardis wrote:

The swe there is potentially refering to the micromips or the micromipsr6 version. swl and swr should not be on the list.

There's a number of instructions which don't have the correct predicates, so the spelling checker will deliver the wrong results, as the set of possible corrections is dependant on the feature bits that are enabled.

I have been working on a patch set to correct / rework the instruction predicates which I should start posting next week.

I think we should hold off on enabling this until the instruction predicates have been fixed.

Good point. Let's wait for the instruction predicates fixing.

[atanasyan]

Does it have a sense to continue to work on this patch now?

[sdardis]

Not at the moment, but don't abandon this patch. Over the next week or so I'll be uploading more of patches which fix various incorrect predicates in the MIPS backend.

llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp

if (getLexer().is(AsmToken::LBrac)) {
     }
     Operands.push_back(
         MipsOperand::CreateToken("]", getLexer().getLoc(), *this));
     Parser.Lex();
   }
   return false;
 }
 
+static std::string MipsMnemonicSpellCheck(StringRef S, uint64_t FBS,
+                                          unsigned VariantID = 0);
+
 bool MipsAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
                                      SMLoc NameLoc, OperandVector &Operands) {
   MCAsmParser &Parser = getParser();
   LLVM_DEBUG(dbgs() << "ParseInstruction\n");
 
   // We have reached first instruction, module directive are now forbidden.
   getTargetStreamer().forbidModuleDirective();
 
   // Check if we have valid mnemonic
   if (!mnemonicIsValid(Name, 0)) {
-    return Error(NameLoc, "unknown instruction");
+    uint64_t FBS = ComputeAvailableFeatures(getSTI().getFeatureBits());
+    std::string Suggestion = MipsMnemonicSpellCheck(Name, FBS);
+    return Error(NameLoc, "unknown instruction" + Suggestion);
   }
   // First operand in MCInst is instruction mnemonic.
   Operands.push_back(MipsOperand::CreateToken(Name, NameLoc, *this));
 
   // Read the remaining operands.
   if (getLexer().isNot(AsmToken::EndOfStatement)) {
     // Read the first operand.
     if (parseOperand(Operands, Name)) {
extern "C" void LLVMInitializeMipsAsmParser() {
   RegisterMCAsmParser<MipsAsmParser> X(getTheMipsTarget());
   RegisterMCAsmParser<MipsAsmParser> Y(getTheMipselTarget());
   RegisterMCAsmParser<MipsAsmParser> A(getTheMips64Target());
   RegisterMCAsmParser<MipsAsmParser> B(getTheMips64elTarget());
 }
 
 #define GET_REGISTER_MATCHER
 #define GET_MATCHER_IMPLEMENTATION
+#define GET_MNEMONIC_SPELL_CHECKER
 #include "MipsGenAsmMatcher.inc"
 
 bool MipsAsmParser::mnemonicIsValid(StringRef Mnemonic, unsigned VariantID) {
   // Find the appropriate table for this asm variant.
   const MatchEntry *Start, *End;
   switch (VariantID) {
   default: llvm_unreachable("invalid variant!");
   case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
   }
   // Search the table.
   auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
   return MnemonicRange.first != MnemonicRange.second;
 }

llvm/trunk/test/MC/Mips/invalid-instructions-spellcheck.s

+# RUN: not llvm-mc -arch mips -mcpu=mips32r2 -mattr=+micromips %s 2>&1 \
+# RUN:   | FileCheck --check-prefixes=ALL,MMR2 %s
+# RUN: not llvm-mc -arch mips -mcpu=mips32r6 -mattr=+micromips %s 2>&1 \
+# RUN:   | FileCheck --check-prefixes=ALL,MMR6 %s
+# RUN: not llvm-mc -arch mips -mcpu=mips32r6 %s 2>&1 \
+# RUN:   | FileCheck --check-prefixes=ALL,MIPS32R6 %s
+
+# This tests the mnemonic spell checker.
+
+# First check what happens when an instruction is omitted:
+
+$2, $1, $25
+
+# ALL:      error: unexpected token at start of statement
+# ALL-NEXT: $2, $1, $25
+# ALL-NEXT:  ^
+
+# We don't want to see a suggestion here; the edit distance is too large to
+# give sensible suggestions:
+
+aaaaaaaaaaaaaaa $2, $1, $25
+
+# ALL:      error: unknown instruction
+# ALL-NEXT: aaaaaaaaaaaaaaa $2, $1, $25
+# ALL-NEXT: ^
+
+# Check that we get one suggestion: 'addiuspi' is 1 edit away, i.e. an deletion.
+
+addiuspi -16
+
+# MMR2:     error: unknown instruction, did you mean: addiusp?
+# MMR6:     error: unknown instruction, did you mean: addiusp?
+# MIPS32R6: error: unknown instruction{{$}}
+# ALL:      addiuspi -16
+# ALL-NEXT: ^
+
+# Check edit distance 1 and 2, just insertions:
+
+addru $9, $6, 17767
+
+# MMR2:      error: unknown instruction, did you mean: add, addiu, addu, maddu?
+# MMR6:      error: unknown instruction, did you mean: add, addiu, addu?
+# MIPS32R6:  error: unknown instruction, did you mean: add, addiu, addu?
+# ALL:       addru $9, $6, 17767
+# ALL-NEXT:  ^
+
+# Check an instruction that is 2 edits away, and also has a lot of candidates:
+
+culE.d  $fcc7, $f24, $f18
+
+# MMR2:     error: unknown instruction, did you mean: c.le.d, c.ule.d?
+# MMR6:     error: unknown instruction{{$}}
+# MIPS32R6: error: unknown instruction{{$}}
+# ALL:      culE.d  $fcc7, $f24, $f18
+# ALL-NEXT: ^
+
+# Check that candidates list includes only instructions valid for target CPU.
+
+swk $3, $4
+
+# MMR2: error: unknown instruction, did you mean: sw, swl, swm, swp, swr, usw?
+# MMR6: error: unknown instruction, did you mean: sw, swm, swp, usw?
+# MIPS32R6: error: unknown instruction, did you mean: sw, usw?
+# ALL:      swk $3, $4
+# ALL-NEXT: ^