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Differential D40370

[arm] Add support for armv7e-m to the .arch directive.
ClosedPublic

Authored by itessier on Nov 22 2017, 11:07 AM.

Details

Reviewers
olista01
Commits
rG9ea2eaeb505a: [ARM] Add support for armv7e-m to the .arch directive
rL319303: [ARM] Add support for armv7e-m to the .arch directive
Summary

This will allow compilation of assembly files targeting armv7e-m without having to specify the Tag_CPU_arch attribute as a workaround.

Diff Detail

Event Timeline

itessier created this revision.Nov 22 2017, 11:07 AM
Herald added subscribers: kristof.beyls, javed.absar, aemerson. · View Herald TranscriptNov 22 2017, 11:07 AM
itessier added a subscriber: llvm-commits.Nov 22 2017, 11:44 AM
javed.absar added a comment.Nov 23 2017, 7:17 AM

Hi.
Full context (diff -U999) is missing. Also you may want to write a brief intro which you can use as commit message.

olista01 added a subscriber: olista01.Nov 23 2017, 7:27 AM
itessier updated this revision to Diff 124423.Nov 27 2017, 10:44 AM
itessier edited the summary of this revision. (Show Details)
In D40370#933784, @javed.absar wrote:

Hi.
Full context (diff -U999) is missing. Also you may want to write a brief intro which you can use as commit message.

Done

olista01 accepted this revision.Nov 28 2017, 1:45 AM
This revision is now accepted and ready to land.Nov 28 2017, 1:45 AM
itessier added a comment.Nov 28 2017, 9:18 AM

Can someone submit this? I don't have svn access.

Closed by commit rL319303: [ARM] Add support for armv7e-m to the .arch directive (authored by olista01). · Explain WhyNov 29 2017, 2:12 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
lib/
Target/
ARM/
MCTargetDesc/
1 line
test/
CodeGen/
ARM/
3 lines
MC/
ARM/
33 lines
33 lines

Diff 124423

lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp

Show First 20 Lines • Show All 841 Lines • ▼ Show 20 Lines case ARM::ArchKind::ARMV7A:
break; break;
case ARM::ArchKind::ARMV7R: case ARM::ArchKind::ARMV7R:
setAttributeItem(CPU_arch_profile, RealTimeProfile, false); setAttributeItem(CPU_arch_profile, RealTimeProfile, false);
setAttributeItem(ARM_ISA_use, Allowed, false); setAttributeItem(ARM_ISA_use, Allowed, false);
setAttributeItem(THUMB_ISA_use, AllowThumb32, false); setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
break; break;
case ARM::ArchKind::ARMV7EM:
case ARM::ArchKind::ARMV7M: case ARM::ArchKind::ARMV7M:
setAttributeItem(CPU_arch_profile, MicroControllerProfile, false); setAttributeItem(CPU_arch_profile, MicroControllerProfile, false);
setAttributeItem(THUMB_ISA_use, AllowThumb32, false); setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
break; break;
case ARM::ArchKind::ARMV8A: case ARM::ArchKind::ARMV8A:
case ARM::ArchKind::ARMV8_1A: case ARM::ArchKind::ARMV8_1A:
case ARM::ArchKind::ARMV8_2A: case ARM::ArchKind::ARMV8_2A:
▲ Show 20 Lines • Show All 652 Lines • Show Last 20 Lines

test/CodeGen/ARM/build-attributes.ll

Show First 20 Lines • Show All 185 Lines • ▼ Show 20 Lines
; ARMv7a ; ARMv7a
; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
; ARMv7ve ; ARMv7ve
; RUN: llc < %s -mtriple=armv7ve-none-linux-gnueabi | FileCheck %s --check-prefix=V7VE ; RUN: llc < %s -mtriple=armv7ve-none-linux-gnueabi | FileCheck %s --check-prefix=V7VE
; ARMv7r ; ARMv7r
; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN ; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN ; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
; ARMv7em
; RUN: llc < %s -mtriple=thumbv7em-none-linux-gnueabi -mcpu=cortex-m4 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; RUN: llc < %s -mtriple=thumbv7em-none-linux-gnueabi -mcpu=cortex-m4 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
; ARMv7m ; ARMv7m
; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN ; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN ; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
; ARMv6 ; ARMv6
; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN ; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; ARMv6k ; ARMv6k
▲ Show 20 Lines • Show All 1,488 Lines • Show Last 20 Lines

test/MC/ARM/directive-arch-armv7e-m.s

@ Test the .arch directive for armv7e-m
@ This test case will check the default .ARM.attributes value for the
@ armv7e-m architecture.
@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv7e-m
@ CHECK-ASM: .arch armv7e-m
@ CHECK-ATTR: FileAttributes {
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: CPU_name
@ CHECK-ATTR: Value: 7E-M
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: CPU_arch
@ CHECK-ATTR: Description: ARM v7
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: CPU_arch_profile
@ CHECK-ATTR: Description: Microcontroller
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-ATTR: Description: Thumb-2
@ CHECK-ATTR: }
@ CHECK-ATTR: }

test/MC/ARM/directive-arch-armv7em.s

@ Test the .arch directive for armv7e-m
@ This test case will check the default .ARM.attributes value for the
@ armv7e-m architecture when using the armv7em alias.
@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv7em
@ CHECK-ASM: .arch armv7e-m
@ CHECK-ATTR: FileAttributes {
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: CPU_name
@ CHECK-ATTR: Value: 7E-M
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: CPU_arch
@ CHECK-ATTR: Description: ARM v7
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: CPU_arch_profile
@ CHECK-ATTR: Description: Microcontroller
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-ATTR: Description: Thumb-2
@ CHECK-ATTR: }
@ CHECK-ATTR: }