NFC.
Adding MC regressions tests to cover the AVX and AVX2 ISA sets.
This patch is part of a larger task to cover MC encoding of all X86 ISA Sets.
See revision: https://reviews.llvm.org/D39952
Details
- Reviewers
zvi RKSimon aymanmus m_zuckerman
Diff Detail
- Repository
- rL LLVM
Event Timeline
You mean that each instruction should cover all registers?
I did a quick check and it produces a huge number of tests that exceed 200k including AVX512.
I, therefore, chose to use only representatives.
Not all registers, just the cases where the xmm8-15 (x86-64) variants have different encodings.
I think he wants you to make sure you test both values of the VEX.R, VEX.X and VEX.B bits.
Yes, that will require testing on the AVX1/AVX2/FMA tests at least, maybe others as well.
AVX2-32.s : Removed redundant # signs from AVX2-32.s
AVX2-64.s: Duplicated the tests to use XMM8 and YMM9
- Added AVX tests for 32 and 64 bits.
- Updated AVX2 64 bit tests to include xmm15 test in addition to xmm6 tests
Are gather instructions in a different ISA set? Architecturally they are part of AVX2, but i don't see them here.
This also doesn't appear to test the VEX.X bit since your addresses never use r8-r15 for an index.
Yes Gather instructions are part of AVX2GATHER.
I will add the VEX.X testing to all AVX tests.