This is a partial port in that register pressure lowering checks aren't yet done because it isn't really straitforward to port them from the old place
There're some comments left copypasted from the old place, it may be outdated/irrelevant.
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AMDGPU: Partial ILP scheduler port from SelectionDAG to SchedulingDAG (experimental) ClosedPublic Authored by vpykhtin on Nov 10 2017, 5:09 AM.
Details Summary This is a partial port in that register pressure lowering checks aren't yet done because it isn't really straitforward to port them from the old place There're some comments left copypasted from the old place, it may be outdated/irrelevant.
Diff Detail
Event TimelineHerald added subscribers: t-tye, tpr, dstuttard and 5 others. · View Herald TranscriptNov 10 2017, 5:09 AM Comment Actions Can you add some tests just to show it does not crash? Maybe add run-lines to schedule-regpressure-limit.ll, schedule-regpressure-limit2.ll
Comment Actions Added test. It turns out getOccupancyWithLocalMemSize function doesn't account for amdgpu-waves-per-eu attribute so I added call to getWavesPerEU (which does). Comment Actions LGTM
This revision is now accepted and ready to land.Nov 17 2017, 8:50 AM
Closed by commit rL318649: AMDGPU: Partial ILP scheduler port from SelectionDAG to SchedulingDAG… (authored by vpykhtin). · Explain WhyNov 20 2017, 6:38 AM This revision was automatically updated to reflect the committed changes.
Revision Contents
Diff 123583 llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
llvm/trunk/lib/Target/AMDGPU/CMakeLists.txt
llvm/trunk/lib/Target/AMDGPU/GCNILPSched.cpp
llvm/trunk/lib/Target/AMDGPU/GCNIterativeScheduler.h
llvm/trunk/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
llvm/trunk/test/CodeGen/AMDGPU/schedule-ilp.ll
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