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[mips] Use MTHC1 when it is available (MIPS32r2 and later) for both FP32 and FP64
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Authored by dsanders on May 29 2014, 5:45 AM.

Details

Summary

To make this work for both AFGR64 and FGR64 register sets, I've had to make the
instruction definition consistent with the white lie (that it reads the lower
32-bits of the register) when they are generated by expandBuildPairF64().

Corrected the definition of hasMips32r2() and hasMips64r2() to include
MIPS32r6 and MIPS64r6.

Depends on D3956

Diff Detail

Event Timeline

dsanders updated this revision to Diff 9920.May 29 2014, 5:45 AM
dsanders retitled this revision from to [mips] Use MTHC1 when it is available (MIPS32r2 and later) for both FP32 and FP64.
dsanders updated this object.
dsanders edited the test plan for this revision. (Show Details)
dsanders updated this revision to Diff 10231.Jun 9 2014, 2:45 AM

Refresh patch and ping

vmedic accepted this revision.Jun 12 2014, 2:19 AM
vmedic edited edge metadata.

LGTM

This revision is now accepted and ready to land.Jun 12 2014, 2:19 AM
dsanders updated this revision to Diff 10344.Jun 12 2014, 4:04 AM
dsanders edited edge metadata.

Fix test failure after rebase. test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll is affected by this patch.

dsanders closed this revision.Jun 12 2014, 5:03 AM