Fix for Bug 34475 - LOCK/REP/REPNE prefixes emitted as instruction on their own

[avt77]

Summary

At the moment the decoder prints prefixes as if they are separate instructions but they should be prefixes only.

[craig.topper]

LGTM

lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp

void X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
   if (CommentStream)
     HasCustomInstComment =
         EmitAnyX86InstComments(MI, *CommentStream, getRegisterName);
 
   unsigned Flags = MI->getFlags();
   if (TSFlags & X86II::LOCK)
     OS << "\tlock\t";
   if (!(TSFlags & X86II::LOCK) && Flags & X86::IP_HAS_LOCK)
-    OS << "\tlock\n";
+    OS << "\tlock\t";
 
   if (Flags & X86::IP_HAS_REPEAT_NE)
-    OS << "\trepne\n";
+    OS << "\trepne\t";
   else if (Flags & X86::IP_HAS_REPEAT)
-    OS << "\trep\n";
+    OS << "\trep\t";
 
   // Output CALLpcrel32 as "callq" in 64-bit mode.
   // In Intel annotation it's always emitted as "call".
   //
   // TODO: Probably this hack should be redesigned via InstAlias in
   // InstrInfo.td as soon as Requires clause is supported properly
   // for InstAlias.
   if (MI->getOpcode() == X86::CALLpcrel32 &&

lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp

 
 void X86IntelInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
                                     StringRef Annot,
                                     const MCSubtargetInfo &STI) {
   const MCInstrDesc &Desc = MII.get(MI->getOpcode());
   uint64_t TSFlags = Desc.TSFlags;
 
   if (TSFlags & X86II::LOCK)
-    OS << "\tlock\n";
+    OS << "\tlock\t";
 
   unsigned Flags = MI->getFlags();
   if (Flags & X86::IP_HAS_REPEAT_NE)
-    OS << "\trepne\n";
+    OS << "\trepne\t";
   else if (Flags & X86::IP_HAS_REPEAT)
-    OS << "\trep\n";
+    OS << "\trep\t";
 
   printInstruction(MI, OS);
 
   // Next always print the annotation.
   printAnnotation(OS, Annot);
 
   // If verbose assembly is enabled, we can print some informative comments.
   if (CommentStream)

test/CodeGen/X86/inline-asm-A-constraint.ll

entry:
   %2 = tail call i128 asm sideeffect "lock; cmpxchg16b $1", "=A,=*m,{cx},{bx},0,*m,~{dirflag},~{fpsr},~{flags}"(i8* %ptr, i64 %conv, i64 %conv1, i128 %1, i8* %ptr) #1, !srcloc !5
   %retval.sroa.0.0.extract.trunc = trunc i128 %2 to i64
   %retval.sroa.2.0.extract.shift = lshr i128 %2, 64
   %retval.sroa.2.0.extract.trunc = trunc i128 %retval.sroa.2.0.extract.shift to i64
   %.fca.0.insert = insertvalue { i64, i64 } undef, i64 %retval.sroa.0.0.extract.trunc, 0
   %.fca.1.insert = insertvalue { i64, i64 } %.fca.0.insert, i64 %retval.sroa.2.0.extract.trunc, 1
   ret { i64, i64 } %.fca.1.insert
 }
-; CHECK: lock
-; CHECK-NEXT: cmpxchg16b
+; CHECK: lock cmpxchg16b
 
 attributes #0 = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
 attributes #1 = { nounwind }
 
 !llvm.ident = !{!0}
 
 !0 = !{!"clang version 5.0.0 (trunk 300088)"}
 !1 = !{!2, !2, i64 0}
 !2 = !{!"__int128", !3, i64 0}
 !3 = !{!"omnipotent char", !4, i64 0}
 !4 = !{!"Simple C/C++ TBAA"}
 !5 = !{i32 269}

test/Instrumentation/AddressSanitizer/X86/asm_rep_movs.ll

 ; CHECK-NEXT: popq %rbx
 ; CHECK-NEXT: popq %rdx
 ; CHECK-NEXT: popq %rax
 ; CHECK-NEXT: leaq 128(%rsp), %rsp
 
 ; CHECK: [[B]]:
 ; CHECK-NEXT: popfq
 
-; CHECK: rep
-; CHECK-NEXT: movsb (%rsi), %es:(%rdi)
+; CHECK: rep movsb (%rsi), %es:(%rdi)
 
 ; Function Attrs: nounwind sanitize_address uwtable
 define void @rep_movs_1b(i8* %dst, i8* %src, i64 %n) #0 {
 entry:
   tail call void asm sideeffect "rep movsb \0A\09", "{si},{di},{cx},~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %src, i8* %dst, i64 %n) #1
   ret void
 }
 

 
 ; CHECK: leaq -1(%rdi,%rcx,8), %rdx
 ; CHECK: movq %rdx, %rdi
 ; CHECK-NEXT: callq __asan_report_store8@PLT
 
 ; CHECK: [[Q]]:
 ; CHECK-NEXT: popfq
 
-; CHECK: rep
-; CHECK-NEXT: movsq (%rsi), %es:(%rdi)
+; CHECK: rep movsq (%rsi), %es:(%rdi)
 
 ; Function Attrs: nounwind sanitize_address uwtable
 define void @rep_movs_8b(i64* %dst, i64* %src, i64 %n) #0 {
 entry:
   tail call void asm sideeffect "rep movsq \0A\09", "{si},{di},{cx},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %src, i64* %dst, i64 %n) #1
   ret void
 }
 
 attributes #0 = { nounwind sanitize_address uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
 attributes #1 = { nounwind }

test/MC/Disassembler/X86/prefixes-i386.txt

 # RUN: llvm-mc --disassemble %s -triple=i386-apple-darwin9 | FileCheck %s
 
 # CHECK:  movl    %fs:24, %eax
 0x64 0xa1 0x18 0x00 0x00 0x00 # mov eax, dword ptr fs:[18h]
 
-# CHECK: rep
-# CHECK-NEXT: insb    %dx, %es:(%edi)
+# CHECK: rep insb    %dx, %es:(%edi)
 0xf3 0x6c #rep ins
-# CHECK: rep
-# CHECK-NEXT: insl    %dx, %es:(%edi)
+# CHECK: rep insl    %dx, %es:(%edi)
 0xf3 0x6d #rep ins
-# CHECK: rep
-# CHECK-NEXT: movsb   (%esi), %es:(%edi)
+# CHECK: rep movsb   (%esi), %es:(%edi)
 0xf3 0xa4 #rep movs
-# CHECK: rep
-# CHECK-NEXT: movsl   (%esi), %es:(%edi)
+# CHECK: rep movsl   (%esi), %es:(%edi)
 0xf3 0xa5 #rep movs
-# CHECK: rep
-# CHECK-NEXT: outsb   (%esi), %dx
+# CHECK: rep outsb   (%esi), %dx
 0xf3 0x6e #rep outs
-# CHECK: rep
-# CHECK-NEXT: outsl   (%esi), %dx
+# CHECK: rep outsl   (%esi), %dx
 0xf3 0x6f #rep outs
-# CHECK: rep
-# CHECK-NEXT: lodsb   (%esi), %al
+# CHECK: rep lodsb   (%esi), %al
 0xf3 0xac #rep lods
-# CHECK: rep
-# CHECK-NEXT: lodsl   (%esi), %eax
+# CHECK: rep lodsl   (%esi), %eax
 0xf3 0xad #rep lods
-# CHECK: rep
-# CHECK-NEXT: stosb   %al, %es:(%edi)
+# CHECK: rep stosb   %al, %es:(%edi)
 0xf3 0xaa #rep stos
-# CHECK: rep
-# CHECK-NEXT: stosl   %eax, %es:(%edi)
+# CHECK: rep stosl   %eax, %es:(%edi)
 0xf3 0xab #rep stos
-# CHECK: rep
-# CHECK-NEXT: cmpsb   %es:(%edi), (%esi)
+# CHECK: rep cmpsb   %es:(%edi), (%esi)
 0xf3 0xa6 #rep cmps
-# CHECK: rep
-# CHECK-NEXT: cmpsl   %es:(%edi), (%esi)
+# CHECK: rep cmpsl   %es:(%edi), (%esi)
 0xf3 0xa7 #repe cmps
-# CHECK: rep
-# CHECK-NEXT: scasb   %es:(%edi), %al
+# CHECK: rep scasb   %es:(%edi), %al
 0xf3 0xae #repe scas
-# CHECK: rep
-# CHECK-NEXT: scasl   %es:(%edi), %eax
+# CHECK: rep scasl   %es:(%edi), %eax
 0xf3 0xaf #repe scas
-# CHECK: repne
-# CHECK-NEXT: cmpsb   %es:(%edi), (%esi)
+# CHECK: repne cmpsb   %es:(%edi), (%esi)
 0xf2 0xa6 #repne cmps
-# CHECK: repne
-# CHECK-NEXT: cmpsl   %es:(%edi), (%esi)
+# CHECK: repne cmpsl   %es:(%edi), (%esi)
 0xf2 0xa7 #repne cmps
-# CHECK: repne
-# CHECK-NEXT: scasb   %es:(%edi), %al
+# CHECK: repne scasb   %es:(%edi), %al
 0xf2 0xae #repne scas
-# CHECK: repne
-# CHECK-NEXT: scasl   %es:(%edi), %eax
+# CHECK: repne scasl   %es:(%edi), %eax
 0xf2 0xaf #repne scas
 
-# CHECK: repne
-# CHECK-NEXT: scasw   %es:(%edi), %ax
+# CHECK: repne scasw   %es:(%edi), %ax
 0xf2 0x66 0xaf
-# CHECK: repne
-# CHECK-NEXT: scasw   %es:(%edi), %ax
+# CHECK: repne scasw   %es:(%edi), %ax
 0x66 0xf2 0xaf
 
-# CHECK: rep
-# CHECK-NEXT: scasw   %es:(%edi), %ax
+# CHECK: rep scasw   %es:(%edi), %ax
 0xf3 0x66 0xaf
-# CHECK: rep
-# CHECK-NEXT: scasw   %es:(%edi), %ax
+# CHECK: rep scasw   %es:(%edi), %ax
 0x66 0xf3 0xaf
 
-# CHECK: repne
-# CHECK:  insw    %dx, %es:(%edi)
+# CHECK: repne insw    %dx, %es:(%edi)
 0xf2 0x66 0x6d
-# CHECK: repne
-# CHECK:  insw    %dx, %es:(%edi)
+# CHECK: repne insw    %dx, %es:(%edi)
 0x66 0xf2 0x6d
 
-# CHECK: rep
-# CHECK:  insw    %dx, %es:(%edi)
+# CHECK: rep insw    %dx, %es:(%edi)
 0xf3 0x66 0x6d
-# CHECK: rep
-# CHECK:  insw    %dx, %es:(%edi)
+# CHECK: rep insw    %dx, %es:(%edi)
 0x66 0xf3 0x6d

test/MC/Disassembler/X86/prefixes-x86_64.txt

 # RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s
 
 # CHECK: mulsd   %xmm7, %xmm7
 0x66 0xF3 0xF2 0x0F 0x59 0xFF
 # CHECK: mulss   %xmm7, %xmm7
 0x66 0xF2 0xF3 0x0F 0x59 0xFF
 # CHECK: mulpd   %xmm7, %xmm7
 0x66 0x0F 0x59 0xFF
 # CHECK: mulsd   %xmm7, %xmm7
 0xf2 0x66 0x0f 0x59 0xff
 
-# CHECK: repne
-# CHECK-NEXT: scasw   %es:(%rdi), %ax
+# CHECK: repne scasw   %es:(%rdi), %ax
 0xf2 0x66 0xaf
-# CHECK: rep
-# CHECK-NEXT: scasw   %es:(%rdi), %ax
+# CHECK: repne scasw   %es:(%rdi), %ax
 0x66 0xf2 0xaf
 
-# CHECK: rep
-# CHECK-NEXT: scasw   %es:(%rdi), %ax
+# CHECK: rep scasw   %es:(%rdi), %ax
 0xf3 0x66 0xaf
-# CHECK: rep
-# CHECK-NEXT: scasw   %es:(%rdi), %ax
+# CHECK: rep scasw   %es:(%rdi), %ax
 0x66 0xf3 0xaf
 
-# CHECK: repne
-# CHECK:  insw    %dx, %es:(%rdi)
+# CHECK: repne insw    %dx, %es:(%rdi)
 0xf2 0x66 0x6d
-# CHECK: repne
-# CHECK:  insw    %dx, %es:(%rdi)
+# CHECK: repne insw    %dx, %es:(%rdi)
 0x66 0xf2 0x6d
 
-# CHECK: rep
-# CHECK:  insw    %dx, %es:(%rdi)
+# CHECK: rep insw    %dx, %es:(%rdi)
 0xf3 0x66 0x6d
-# CHECK: rep
-# CHECK:  insw    %dx, %es:(%rdi)
+# CHECK: rep insw    %dx, %es:(%rdi)
 0x66 0xf3 0x6d

test/MC/Disassembler/X86/prefixes.txt

 # RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s
 
-# CHECK: rep
-# CHECK-NEXT: insb    %dx, %es:(%rdi)
+# CHECK: rep insb    %dx, %es:(%rdi)
 0xf3 0x6c #rep ins
-# CHECK: rep
-# CHECK-NEXT: insl    %dx, %es:(%rdi)
+# CHECK: rep insl    %dx, %es:(%rdi)
 0xf3 0x6d #rep ins
-# CHECK: rep
-# CHECK-NEXT: movsb   (%rsi), %es:(%rdi)
+# CHECK: rep movsb   (%rsi), %es:(%rdi)
 0xf3 0xa4 #rep movs
-# CHECK: rep
-# CHECK-NEXT: movsl   (%rsi), %es:(%rdi)
+# CHECK: rep movsl   (%rsi), %es:(%rdi)
 0xf3 0xa5 #rep movs
-# CHECK: rep
-# CHECK-NEXT: outsb   (%rsi), %dx
+# CHECK: rep outsb   (%rsi), %dx
 0xf3 0x6e #rep outs
-# CHECK: rep
-# CHECK-NEXT: outsl   (%rsi), %dx
+# CHECK: rep outsl   (%rsi), %dx
 0xf3 0x6f #rep outs
-# CHECK: rep
-# CHECK-NEXT: lodsb   (%rsi), %al
+# CHECK: rep lodsb   (%rsi), %al
 0xf3 0xac #rep lods
-# CHECK: rep
-# CHECK-NEXT: lodsl   (%rsi), %eax
+# CHECK: rep lodsl   (%rsi), %eax
 0xf3 0xad #rep lods
-# CHECK: rep
-# CHECK-NEXT: stosb   %al, %es:(%rdi)
+# CHECK: rep stosb   %al, %es:(%rdi)
 0xf3 0xaa #rep stos
-# CHECK: rep
-# CHECK-NEXT: stosl   %eax, %es:(%rdi)
+# CHECK: rep stosl   %eax, %es:(%rdi)
 0xf3 0xab #rep stos
-# CHECK: rep
-# CHECK-NEXT: cmpsb   %es:(%rdi), (%rsi)
+# CHECK: rep cmpsb   %es:(%rdi), (%rsi)
 0xf3 0xa6 #rep cmps
-# CHECK: rep
-# CHECK-NEXT: cmpsl   %es:(%rdi), (%rsi)
+# CHECK: rep cmpsl   %es:(%rdi), (%rsi)
 0xf3 0xa7 #repe cmps
-# CHECK: rep
-# CHECK-NEXT: scasb   %es:(%rdi), %al
+# CHECK: rep scasb   %es:(%rdi), %al
 0xf3 0xae #repe scas
-# CHECK: rep
-# CHECK-NEXT: scasl   %es:(%rdi), %eax
+# CHECK: rep scasl   %es:(%rdi), %eax
 0xf3 0xaf #repe scas
-# CHECK: repne
-# CHECK-NEXT: cmpsb   %es:(%rdi), (%rsi)
+# CHECK: repne cmpsb   %es:(%rdi), (%rsi)
 0xf2 0xa6 #repne cmps
-# CHECK: repne
-# CHECK-NEXT: cmpsl   %es:(%rdi), (%rsi)
+# CHECK: repne cmpsl   %es:(%rdi), (%rsi)
 0xf2 0xa7 #repne cmps
-# CHECK: repne
-# CHECK-NEXT: scasb   %es:(%rdi), %al
+# CHECK: repne scasb   %es:(%rdi), %al
 0xf2 0xae #repne scas
-# CHECK: repne
-# CHECK-NEXT: scasl   %es:(%rdi), %eax
+# CHECK: repne scasl   %es:(%rdi), %eax
 0xf2 0xaf #repne scas
 
 # CHECK: lock
-# CHECK-NEXT: orl $16, %fs:776
+# CHECK-NEXT: orl $16, %fs:776
 0xf0 0x64 0x83 0x0c 0x25 0x08 0x03 0x00 0x00 0x10
 
 # CHECK: movq %fs:768, %rdi
 0x64 0x48 0x8b 0x3c 0x25 0x00 0x03 0x00 0x00
 
-# CHECK: rep
-# CHECK-NEXT:   stosq %rax, %es:(%rdi)
+# CHECK: rep stosq %rax, %es:(%rdi)
 0xf3 0x48 0xab
 
-# CHECK: rep
-# CHECK-NEXT:   stosq %rax, %es:(%edi)
+# CHECK: rep stosq %rax, %es:(%edi)
 0xf3 0x67 0x48 0xab
 
 # CHECK: movl 32(%rbp), %eax
 0x8b 0x45 0x20
 
 # CHECK: movl %es:32(%rbp), %eax
 0x26 0x8b 0x45 0x20
 

 # CHECK-NEXT: nop
 0xf0 0x90
 
 # Test that immediate is printed correctly within opsize prefix
 # CHECK: addw    $-12, %ax
 0x66,0x83,0xc0,0xf4
 
 # Test that multiple redundant prefixes work (redundant, but valid x86).
-# CHECK: rep
-# CHECK-NEXT: stosq
+# CHECK: rep stosq
 0xf3 0xf3 0x48 0xab
 
-
 # Test that we can disassembler control registers above CR8
 # CHECK: movq %cr15, %rax
 0x44 0x0f 0x20 0xf8
 # CHECK: movq %dr15, %rax
 0x44 0x0f 0x21 0xf8
 
 # Test that MMX ignore REX.R and REX.B.
 # CHECK: movq %mm0, %mm1

test/MC/Disassembler/X86/simple-tests.txt

 0xc4 0x02 0x3d 0x91 0x14 0x4f
 
 # rdar://8812056 lldb doesn't print the x86 lock prefix when disassembling
 # CHECK: lock
 # CHECK-NEXT: xaddq %rcx, %rbx
 0xf0 0x48 0x0f 0xc1 0xcb
 
 # rdar://13493622 lldb doesn't print the x86 rep/repne prefix when disassembling
-# CHECK: repne
-# CHECK-NEXT: movsl
+# CHECK: repne movsl
 0xf2 0xa5
-# CHECK: repne
-# CHECK-NEXT: movsq
+# CHECK: repne movsq
 0xf2 0x48 0xa5
-# CHECK: repne
-# CHECK-NEXT: movb  $0, (%rax)
+# CHECK: repne movb  $0, (%rax)
 0xf2 0xc6 0x0 0x0
 
 # rdar://11019859 Support 2013 Haswell RTM instructions and HLE prefixes
 # CHECK: xrelease
 # CHECK-NEXT: lock
 # CHECK-NEXT: incl   (%rax)
 0xf3 0xf0 0xff 0x00