AMDGPU: Fix default range in non-kernel functions

[arsenm]

Summary

The range should be assumed to be the hardware maximum
if a workitem intrinsic is used in a callable function
which does not know the restricted limit of the calling
kernel.

[t-tye]

lib/Target/AMDGPU/AMDGPUSubtarget.cpp

199

Should there be a target property that returns the maximum size supported? 4 * wavefront size may not match every target.

[arsenm]

lib/Target/AMDGPU/AMDGPUSubtarget.cpp

199

It's the same for every target now, so there's no real point in adding one.

[kzhuravl]

LGTM.

lib/Target/AMDGPU/AMDGPUSubtarget.cpp

199

I think, if need arises, this can be done in separate change.

[arsenm]

r316346

lib/Target/AMDGPU/AMDGPUSubtarget.h

public:
 
   /// \returns Number of waves per work group supported by the subtarget and
   /// limited by given \p FlatWorkGroupSize.
   unsigned getWavesPerWorkGroup(unsigned FlatWorkGroupSize) const {
     return AMDGPU::IsaInfo::getWavesPerWorkGroup(getFeatureBits(),
                                                  FlatWorkGroupSize);
   }
 
+  /// \returns Default range flat work group size for a calling convention.
+  std::pair<unsigned, unsigned> getDefaultFlatWorkGroupSize(CallingConv::ID CC) const;
+
   /// \returns Subtarget's default pair of minimum/maximum flat work group sizes
   /// for function \p F, or minimum/maximum flat work group sizes explicitly
   /// requested using "amdgpu-flat-work-group-size" attribute attached to
   /// function \p F.
   ///
   /// \returns Subtarget's default values if explicitly requested values cannot
   /// be converted to integer, or violate subtarget's specifications.
   std::pair<unsigned, unsigned> getFlatWorkGroupSizes(const Function &F) const;

lib/Target/AMDGPU/AMDGPUSubtarget.cpp

unsigned AMDGPUSubtarget::getOccupancyWithLocalMemSize(uint32_t Bytes,
   unsigned MaxWaves = getMaxWavesPerEU();
   unsigned Limit = getLocalMemorySize() * MaxWaves / WorkGroupsPerCu;
   unsigned NumWaves = Limit / (Bytes ? Bytes : 1u);
   NumWaves = std::min(NumWaves, MaxWaves);
   NumWaves = std::max(NumWaves, 1u);
   return NumWaves;
 }
 
+std::pair<unsigned, unsigned>
+AMDGPUSubtarget::getDefaultFlatWorkGroupSize(CallingConv::ID CC) const {
+  switch (CC) {
+  case CallingConv::AMDGPU_CS:
+  case CallingConv::AMDGPU_KERNEL:
+  case CallingConv::SPIR_KERNEL:
+    return std::make_pair(getWavefrontSize() * 2, getWavefrontSize() * 4);
+  case CallingConv::AMDGPU_VS:
+  case CallingConv::AMDGPU_LS:
+  case CallingConv::AMDGPU_HS:
+  case CallingConv::AMDGPU_ES:
+  case CallingConv::AMDGPU_GS:
+  case CallingConv::AMDGPU_PS:
+    return std::make_pair(1, getWavefrontSize());
+  default:
+    return std::make_pair(1, 16 * getWavefrontSize());
+  }
+}
+
 std::pair<unsigned, unsigned> AMDGPUSubtarget::getFlatWorkGroupSizes(
   const Function &F) const {
+  // FIXME: 1024 if function.
   // Default minimum/maximum flat work group sizes.
   std::pair<unsigned, unsigned> Default =
-    AMDGPU::isCompute(F.getCallingConv()) ?
-      std::pair<unsigned, unsigned>(getWavefrontSize() * 2,
-                                    getWavefrontSize() * 4) :
-      std::pair<unsigned, unsigned>(1, getWavefrontSize());
+    getDefaultFlatWorkGroupSize(F.getCallingConv());
 
   // TODO: Do not process "amdgpu-max-work-group-size" attribute once mesa
   // starts using "amdgpu-flat-work-group-size" attribute.
   Default.second = AMDGPU::getIntegerAttribute(
     F, "amdgpu-max-work-group-size", Default.second);
   Default.first = std::min(Default.first, Default.second);
 
   // Requested minimum/maximum flat work group sizes.

test/CodeGen/AMDGPU/zext-lid.ll

bb:
   store i32 %tmp3, i32 addrspace(1)* %tmp4, align 4
   %tmp5 = tail call i32 @llvm.amdgcn.workitem.id.z()
   %tmp6 = and i32 %tmp5, 65535
   %tmp7 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 2
   store i32 %tmp6, i32 addrspace(1)* %tmp7, align 4
   ret void
 }
 
+; OPT-LABEL: @func_test_workitem_id_x_known_max_range(
+; OPT: tail call i32 @llvm.amdgcn.workitem.id.x(), !range !0
+define void @func_test_workitem_id_x_known_max_range(i32 addrspace(1)* nocapture %out) #0 {
+entry:
+  %id = tail call i32 @llvm.amdgcn.workitem.id.x()
+  %and = and i32 %id, 1023
+  store i32 %and, i32 addrspace(1)* %out, align 4
+  ret void
+}
+
+; OPT-LABEL: @func_test_workitem_id_x_default_range(
+; OPT: tail call i32 @llvm.amdgcn.workitem.id.x(), !range !6
+define void @func_test_workitem_id_x_default_range(i32 addrspace(1)* nocapture %out) #4 {
+entry:
+  %id = tail call i32 @llvm.amdgcn.workitem.id.x()
+  %and = and i32 %id, 1023
+  store i32 %and, i32 addrspace(1)* %out, align 4
+  ret void
+}
+
 declare i32 @llvm.amdgcn.workitem.id.x() #2
 
 declare i32 @llvm.amdgcn.workitem.id.y() #2
 
 declare i32 @llvm.amdgcn.workitem.id.z() #2
 
 attributes #0 = { nounwind "amdgpu-flat-work-group-size"="64,128" }
 attributes #1 = { nounwind "amdgpu-flat-work-group-size"="512,512" }
 attributes #2 = { nounwind readnone speculatable }
 attributes #3 = { nounwind readnone }
+attributes #4 = { nounwind }
 
 !0 = !{i32 32, i32 4, i32 1}
 
 ; OPT: !0 = !{i32 0, i32 128}
 ; OPT: !1 = !{i32 32, i32 4, i32 1}
 ; OPT: !2 = !{i32 0, i32 32}
 ; OPT: !3 = !{i32 0, i32 4}
 ; OPT: !4 = !{i32 0, i32 1}
 ; OPT: !5 = !{i32 0, i32 512}
+; OPT: !6 = !{i32 0, i32 1024}