AMDGPU: Do not emit deprecated notes for code object v3

[t-tye]

LGTM

lib/Target/AMDGPU/AMDGPU.td

 
 def FeatureAutoWaitcntBeforeBarrier : SubtargetFeature <
   "auto-waitcnt-before-barrier",
   "AutoWaitcntBeforeBarrier",
   "true",
   "Hardware automatically inserts waitcnt before barrier"
 >;
 
+def FeatureCodeObjectV3 : SubtargetFeature <
+  "code-object-v3",
+  "CodeObjectV3",
+  "true",
+  "Generate code object version 3"
+>;
+
 // Dummy feature used to disable assembler instructions.
 def FeatureDisable : SubtargetFeature<"",
   "FeatureDisable","true",
   "Dummy feature to disable assembler instructions"
 >;
 
 class SubtargetFeatureGeneration <string Value,
                                   list<SubtargetFeature> Implies> :

lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp

const MCSubtargetInfo* AMDGPUAsmPrinter::getSTI() const {
   return TM.getMCSubtargetInfo();
 }
 
 AMDGPUTargetStreamer& AMDGPUAsmPrinter::getTargetStreamer() const {
   return static_cast<AMDGPUTargetStreamer&>(*OutStreamer->getTargetStreamer());
 }
 
 void AMDGPUAsmPrinter::EmitStartOfAsmFile(Module &M) {
-  AMDGPU::IsaInfo::IsaVersion ISA =
-      AMDGPU::IsaInfo::getIsaVersion(getSTI()->getFeatureBits());
+  if (TM.getTargetTriple().getArch() != Triple::amdgcn)
+    return;
 
-  if (TM.getTargetTriple().getOS() == Triple::AMDPAL) {
+  if (TM.getTargetTriple().getOS() != Triple::AMDHSA &&
+      TM.getTargetTriple().getOS() != Triple::AMDPAL)
+    return;
+
+  if (TM.getTargetTriple().getOS() == Triple::AMDHSA)
+    HSAMetadataStream.begin(M);
+
+  if (TM.getTargetTriple().getOS() == Triple::AMDPAL)
     readPALMetadata(M);
-    // AMDPAL wants an HSA_ISA .note.
-    getTargetStreamer().EmitDirectiveHSACodeObjectISA(
-        ISA.Major, ISA.Minor, ISA.Stepping, "AMD", "AMDGPU");
-  }
-  if (TM.getTargetTriple().getOS() != Triple::AMDHSA)
+
+  // Deprecated notes are not emitted for code object v3.
+  if (IsaInfo::hasCodeObjectV3(getSTI()->getFeatureBits()))
     return;
 
+  // HSA emits NT_AMDGPU_HSA_CODE_OBJECT_VERSION for code objects v2.
+  if (TM.getTargetTriple().getOS() == Triple::AMDHSA)
     getTargetStreamer().EmitDirectiveHSACodeObjectVersion(2, 1);
+
+  // HSA and PAL emit NT_AMDGPU_HSA_ISA for code objects v2.
+  IsaInfo::IsaVersion ISA = IsaInfo::getIsaVersion(getSTI()->getFeatureBits());
   getTargetStreamer().EmitDirectiveHSACodeObjectISA(
       ISA.Major, ISA.Minor, ISA.Stepping, "AMD", "AMDGPU");
-
-  HSAMetadataStream.begin(M);
 }
 
 void AMDGPUAsmPrinter::EmitEndOfAsmFile(Module &M) {
   if (TM.getTargetTriple().getArch() != Triple::amdgcn)
     return;
 
   // Emit ISA Version (NT_AMD_AMDGPU_ISA).
   getTargetStreamer().EmitISAVersion(IsaInfo::getIsaVersionString(getSTI()));

lib/Target/AMDGPU/AMDGPUSubtarget.h

protected:
 
   // Dynamially set bits that enable features.
   bool FP32Denormals;
   bool FP64FP16Denormals;
   bool FPExceptions;
   bool DX10Clamp;
   bool FlatForGlobal;
   bool AutoWaitcntBeforeBarrier;
+  bool CodeObjectV3;
   bool UnalignedScratchAccess;
   bool UnalignedBufferAccess;
   bool HasApertureRegs;
   bool EnableXNACK;
   bool TrapHandler;
   bool DebuggerInsertNops;
   bool DebuggerReserveRegs;
   bool DebuggerEmitPrologue;
public:
   bool useFlatForGlobal() const {
     return FlatForGlobal;
   }
 
   bool hasAutoWaitcntBeforeBarrier() const {
     return AutoWaitcntBeforeBarrier;
   }
 
+  bool hasCodeObjectV3() const {
+    return CodeObjectV3;
+  }
+
   bool hasUnalignedBufferAccess() const {
     return UnalignedBufferAccess;
   }
 
   bool hasUnalignedScratchAccess() const {
     return UnalignedScratchAccess;
   }
 

lib/Target/AMDGPU/AMDGPUSubtarget.cpp

: AMDGPUGenSubtargetInfo(TT, GPU, FS),
     HalfRate64Ops(false),
 
     FP32Denormals(false),
     FP64FP16Denormals(false),
     FPExceptions(false),
     DX10Clamp(false),
     FlatForGlobal(false),
     AutoWaitcntBeforeBarrier(false),
+    CodeObjectV3(false),
     UnalignedScratchAccess(false),
     UnalignedBufferAccess(false),
 
     HasApertureRegs(false),
     EnableXNACK(false),
     TrapHandler(false),
     DebuggerInsertNops(false),
     DebuggerReserveRegs(false),

lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h

 };
 
 /// \returns Isa version for given subtarget \p Features.
 IsaVersion getIsaVersion(const FeatureBitset &Features);
 
 /// \returns Isa version string for given subtarget \p STI.
 std::string getIsaVersionString(const MCSubtargetInfo *STI);
 
+/// \returns True if given subtarget \p Features support code object version 3,
+/// false otherwise.
+bool hasCodeObjectV3(const FeatureBitset &Features);
+
 /// \returns Wavefront size for given subtarget \p Features.
 unsigned getWavefrontSize(const FeatureBitset &Features);
 
 /// \returns Local memory size in bytes for given subtarget \p Features.
 unsigned getLocalMemorySize(const FeatureBitset &Features);
 
 /// \returns Number of execution units per compute unit for given subtarget \p
 /// Features.

lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp

ISAVersionStream << TargetTriple.getArchName() << '-'
                    << "gfx"
                    << ISAVersion.Major
                    << ISAVersion.Minor
                    << ISAVersion.Stepping;
   ISAVersionStream.flush();
   return ISAVersionString;
 }
 
+bool hasCodeObjectV3(const FeatureBitset &Features) {
+  return Features.test(FeatureCodeObjectV3);
+}
+
 unsigned getWavefrontSize(const FeatureBitset &Features) {
   if (Features.test(FeatureWavefrontSize16))
     return 16;
   if (Features.test(FeatureWavefrontSize32))
     return 32;
 
   return 64;
 }

test/CodeGen/AMDGPU/elf-notes.ll

 ; RUN: llc -march=r600 < %s | FileCheck --check-prefix=R600 %s
-; RUN: llc -mtriple=amdgcn-amd-unknown -mcpu=gfx800 < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-UNK --check-prefix=GFX800 %s
-; RUN: llc -mtriple=amdgcn-amd-unknown -mcpu=iceland < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-UNK --check-prefix=GFX800 %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx800 < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-HSA --check-prefix=GFX800 %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=iceland < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-HSA --check-prefix=GFX800 %s
-; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx800 < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-PAL --check-prefix=GFX800 %s
-; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=iceland < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-PAL --check-prefix=GFX800 %s
+; RUN: llc -mtriple=amdgcn-amd-unknown -mcpu=gfx800 -mattr=+code-object-v3 < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-UNK --check-prefix=GFX800 %s
+; RUN: llc -mtriple=amdgcn-amd-unknown -mcpu=iceland -mattr=+code-object-v3 < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-UNK --check-prefix=GFX800 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx800 -mattr=+code-object-v3 < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-HSA --check-prefix=GFX800 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=iceland -mattr=+code-object-v3 < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-HSA --check-prefix=GFX800 %s
+; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx800 -mattr=+code-object-v3 < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-PAL --check-prefix=GFX800 %s
+; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=iceland -mattr=+code-object-v3 < %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-PAL --check-prefix=GFX800 %s
 
+; R600-NOT: .hsa_code_object_version
+; R600-NOT: .hsa_code_object_isa
 ; R600-NOT: .amd_amdgpu_isa
 ; R600-NOT: .amd_amdgpu_hsa_metadata
-; R600-NOT: .amd_amdgpu_hsa_metadata
+; R600-NOT: .amd_amdgpu_pal_metadata
 
+; OSABI-UNK-NOT: .hsa_code_object_version
+; OSABI-UNK-NOT: .hsa_code_object_isa
 ; OSABI-UNK: .amd_amdgpu_isa "amdgcn-amd-unknown--gfx800"
 ; OSABI-UNK-NOT: .amd_amdgpu_hsa_metadata
 ; OSABI-UNK-NOT: .amd_amdgpu_pal_metadata
 
+; OSABI-HSA-NOT: .hsa_code_object_version
+; OSABI-HSA-NOT: .hsa_code_object_isa
 ; OSABI-HSA: .amd_amdgpu_isa "amdgcn-amd-amdhsa--gfx800"
 ; OSABI-HSA: .amd_amdgpu_hsa_metadata
+; OSABI-HSA-NOT: .amd_amdgpu_pal_metadata
 
+; OSABI-PAL-NOT: .hsa_code_object_version
+; OSABI-PAL-NOT: .hsa_code_object_isa
 ; OSABI-PAL: .amd_amdgpu_isa "amdgcn-amd-amdpal--gfx800"
+; OSABI-PAL-NOT: .amd_amdgpu_hsa_metadata
 ; OSABI-PAL: .amd_amdgpu_pal_metadata
 
 define amdgpu_kernel void @elf_notes() {
   ret void
 }