[X86] Remove erroneous callsite offsetting in SJLJ landing pads

[mstorsjo]

Summary

The callsite value is already stored indexed from 0 in the _Unwind_Context struct. When accessed via the functions _Unwind_GetIP and _Unwind_SetIP, the value is indexed from 1, but those functions handle the offseting. When reading directly from the struct here, we shouldn't subtract 1.

This matches the code generated by the ARM target, where SJLJ exception handling is used by default on iOS.

[mstorsjo]

Updated a missed comment in the test.

[mstorsjo]

To clarify further, I'll add this to the commit message:

This makes clang-built object files for 32 bit x86 mingw work when linked with libgcc/libstdc++.

llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

X86TargetLowering::EmitSjLjDispatchBlock(MachineInstr &MI,
   }
 
   unsigned IReg = MRI->createVirtualRegister(&X86::GR32RegClass);
   addFrameReference(BuildMI(DispatchBB, DL, TII->get(X86::MOV32rm), IReg), FI,
                     4);
   BuildMI(DispatchBB, DL, TII->get(X86::CMP32ri))
       .addReg(IReg)
       .addImm(LPadList.size());
-  BuildMI(DispatchBB, DL, TII->get(X86::JA_1)).addMBB(TrapBB);
+  BuildMI(DispatchBB, DL, TII->get(X86::JAE_1)).addMBB(TrapBB);
 
-  unsigned JReg = MRI->createVirtualRegister(&X86::GR32RegClass);
-  BuildMI(DispContBB, DL, TII->get(X86::SUB32ri), JReg)
-      .addReg(IReg)
-      .addImm(1);
   BuildMI(DispContBB, DL,
           TII->get(Subtarget.is64Bit() ? X86::JMP64m : X86::JMP32m))
       .addReg(0)
       .addImm(Subtarget.is64Bit() ? 8 : 4)
-      .addReg(JReg)
+      .addReg(IReg)
       .addJumpTableIndex(MJTI)
       .addReg(0);
 
   // Add the jump table entries as successors to the MBB.
   SmallPtrSet<MachineBasicBlock *, 8> SeenMBBs;
   for (auto &LP : LPadList)
     if (SeenMBBs.insert(LP).second)
       DispContBB->addSuccessor(LP);

llvm/trunk/test/CodeGen/X86/sjlj-eh.ll

 ;     function_that_throws();
 ; CHECK: calll __Z20function_that_throwsv
 ;     _Unwind_SjLj_Unregister(&UFC);
 ; CHECK: leal -64(%ebp), %eax
 ; CHECK: calll __Unwind_SjLj_Unregister
 ;
 ; CHECK: [[RESUME]]:
 ; CHECK: leal -64(%ebp), %esi
-;     assert(UFC.__callsite <= 1);
+;     assert(UFC.__callsite < 1);
 ; CHECK: movl -60(%ebp), %eax
 ; CHECK: cmpl $1, %eax
-; CHECK: jbe [[CONT:LBB[0-9]+_[0-9]+]]
+; CHECK: jb [[CONT:LBB[0-9]+_[0-9]+]]
 ; CHECK: ud2
 ; CHECK: [[CONT]]:
-;     *Handlers[--UFC.__callsite]
-; CHECK: subl $1, %eax
+;     *Handlers[UFC.__callsite]
 ; CHECK: jmpl *LJTI