Page MenuHomePhabricator

[GlobalISel][X86] Support G_LSHR/G_ASHR/G_SHL.
AbandonedPublic

Authored by igorb on Sep 24 2017, 1:34 AM.

Details

Summary

Support G_LSHR/G_ASHR/G_SHL. We have 3 variance for shift instructions : shift gpr, shift imm, shift 1.
Currently GlobalIsel TableGen generate patterns for shift imm and shift 1, but with shiftCount i8.
In G_LSHR/G_ASHR/G_SHL like LLVM-IR both arguments has the same type, so for now only shift i8 can use auto generated TableGen patterns.

Event Timeline

igorb created this revision.Sep 24 2017, 1:34 AM
zvi edited edge metadata.Sep 27 2017, 4:08 AM

LGTM with minor comments

lib/Target/X86/X86InstructionSelector.cpp
1303

Can you please add a comment here explaining how shift by constant shift-amount are handled?

1319

I don't think that NumTypes adds much here. You can just define OpTable[] =

1330

another option would be to search to avoid the chauned if's. Maybe something like:

find(OpTable, [DstTy] (const DhiftEntry& E) { return E.SizeInBits == DstTy.getSizeInBits(); })
igorb abandoned this revision.Jul 24 2018, 1:53 AM