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Differential D37974

[AArch64] Add V8_2aOps feature to Cortex-A55 and 75
ClosedPublic

Authored by samparker on Sep 18 2017, 6:48 AM.

Details

Reviewers
rengolin
Commits
rG3fa0ccffc648: [AArch64] Add V8_2aOps feature to Cortex-A55 and 75
rL313535: [AArch64] Add V8_2aOps feature to Cortex-A55 and 75
Summary

Add the missing hardware features the ProcA55 and Proc75 feature. These are already enabled via the target parser, but I had missed them in the backend.

Diff Detail

Event Timeline

samparker created this revision.Sep 18 2017, 6:48 AM
Herald added subscribers: kristof.beyls, javed.absar, rengolin, aemerson. · View Herald TranscriptSep 18 2017, 6:48 AM
rengolin accepted this revision.Sep 18 2017, 7:10 AM
This revision is now accepted and ready to land.Sep 18 2017, 7:10 AM
Closed by commit rL313535: [AArch64] Add V8_2aOps feature to Cortex-A55 and 75 (authored by sam_parker). · Explain WhySep 18 2017, 7:47 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
lib/
Target/
AArch64/
2 lines
test/
MC/
AArch64/
4 lines
5 lines
2 lines

Diff 115636

lib/Target/AArch64/AArch64.td

Show First 20 Lines • Show All 92 Lines • ▼ Show 20 Lines
FeatureNEON, FeatureNEON,
FeaturePerfMon, FeaturePerfMon,
FeaturePostRAScheduler, FeaturePostRAScheduler,
FeatureUseAA FeatureUseAA
]>; ]>;
def ProcA55 : SubtargetFeature<"a55", "ARMProcFamily", "CortexA55", def ProcA55 : SubtargetFeature<"a55", "ARMProcFamily", "CortexA55",
"Cortex-A55 ARM processors", [ "Cortex-A55 ARM processors", [
HasV8_2aOps,
FeatureCrypto, FeatureCrypto,
FeatureFPARMv8, FeatureFPARMv8,
FeatureFuseAES, FeatureFuseAES,
FeatureNEON, FeatureNEON,
FeatureFullFP16, FeatureFullFP16,
FeatureDotProd, FeatureDotProd,
FeatureRCPC, FeatureRCPC,
FeaturePerfMon FeaturePerfMon
Show All 31 Lines
FeatureFPARMv8, FeatureFPARMv8,
FeatureFuseAES, FeatureFuseAES,
FeatureNEON, FeatureNEON,
FeaturePerfMon FeaturePerfMon
]>; ]>;
def ProcA75 : SubtargetFeature<"a75", "ARMProcFamily", "CortexA75", def ProcA75 : SubtargetFeature<"a75", "ARMProcFamily", "CortexA75",
"Cortex-A75 ARM processors", [ "Cortex-A75 ARM processors", [
HasV8_2aOps,
FeatureCrypto, FeatureCrypto,
FeatureFPARMv8, FeatureFPARMv8,
FeatureFuseAES, FeatureFuseAES,
FeatureNEON, FeatureNEON,
FeatureFullFP16, FeatureFullFP16,
FeatureDotProd, FeatureDotProd,
FeatureRCPC, FeatureRCPC,
FeaturePerfMon FeaturePerfMon
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test/MC/AArch64/armv8.1a-lse.s

// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.1a,+lse -show-encoding < %s 2> %t | FileCheck %s // RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.1a,+lse -show-encoding < %s 2> %t | FileCheck %s
// RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s // RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s
// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mcpu=cortex-a55 -show-encoding < %s 2> %t | FileCheck %s
// RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s
// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mcpu=cortex-a75 -show-encoding < %s 2> %t | FileCheck %s
// RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s
.text .text
cas w0, w1, [x2] cas w0, w1, [x2]
cas w2, w3, [sp] cas w2, w3, [sp]
casa w0, w1, [x2] casa w0, w1, [x2]
casa w2, w3, [sp] casa w2, w3, [sp]
casl w0, w1, [x2] casl w0, w1, [x2]
casl w2, w3, [sp] casl w2, w3, [sp]
▲ Show 20 Lines • Show All 92 Lines • Show Last 20 Lines

test/MC/AArch64/crc.s

// RUN: llvm-mc -triple aarch64-- -mattr=+crc %s 2>&1 |\ // RUN: llvm-mc -triple aarch64-- -mattr=+crc %s 2>&1 |\
// RUN: FileCheck %s --check-prefix=CRC // RUN: FileCheck %s --check-prefix=CRC
// RUN: llvm-mc -triple aarch64-- -mcpu=cortex-a55 %s 2>&1 |\
// RUN: FileCheck %s --check-prefix=CRC
// RUN: llvm-mc -triple aarch64-- -mcpu=cortex-a75 %s 2>&1 |\
// RUN: FileCheck %s --check-prefix=CRC
// RUN: not llvm-mc -triple aarch64-- %s 2>&1 |\ // RUN: not llvm-mc -triple aarch64-- %s 2>&1 |\
// RUN: FileCheck %s --check-prefix=NOCRC // RUN: FileCheck %s --check-prefix=NOCRC
// RUN: not llvm-mc -triple aarch64-- -mcpu=cyclone %s 2>&1 |\ // RUN: not llvm-mc -triple aarch64-- -mcpu=cyclone %s 2>&1 |\
// RUN: FileCheck %s --check-prefix=NOCRC // RUN: FileCheck %s --check-prefix=NOCRC
crc32b w0, w1, w5 crc32b w0, w1, w5
crc32h w3, w5, w6 crc32h w3, w5, w6
crc32w w19, wzr, w20 crc32w w19, wzr, w20
Show All 34 Lines

test/MC/AArch64/ras-extension.s

// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+ras < %s | FileCheck %s // RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+ras < %s | FileCheck %s
// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mcpu=cortex-a55 < %s | FileCheck %s
// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mcpu=cortex-a75 < %s | FileCheck %s
esb esb
// CHECK: esb // encoding: [0x1f,0x22,0x03,0xd5] // CHECK: esb // encoding: [0x1f,0x22,0x03,0xd5]
msr errselr_el1, x0 msr errselr_el1, x0
msr errselr_el1, x15 msr errselr_el1, x15
msr errselr_el1, x25 msr errselr_el1, x25
msr erxctlr_el1, x1 msr erxctlr_el1, x1
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