AMDGPU: Allow coldcc calls

[rampitec]

LGTM

[arsenm]

r312936

lib/Target/AMDGPU/AMDGPUISelLowering.cpp

CCAssignFn *AMDGPUCallLowering::CCAssignFnForCall(CallingConv::ID CC,
   case CallingConv::AMDGPU_VS:
   case CallingConv::AMDGPU_GS:
   case CallingConv::AMDGPU_PS:
   case CallingConv::AMDGPU_CS:
   case CallingConv::AMDGPU_HS:
     return CC_AMDGPU;
   case CallingConv::C:
   case CallingConv::Fast:
+  case CallingConv::Cold:
     return CC_AMDGPU_Func;
   default:
     report_fatal_error("Unsupported calling convention.");
   }
 }
 
 CCAssignFn *AMDGPUCallLowering::CCAssignFnForReturn(CallingConv::ID CC,
                                                     bool IsVarArg) {
   switch (CC) {
   case CallingConv::AMDGPU_KERNEL:
   case CallingConv::SPIR_KERNEL:
     return CC_AMDGPU_Kernel;
   case CallingConv::AMDGPU_VS:
   case CallingConv::AMDGPU_GS:
   case CallingConv::AMDGPU_PS:
   case CallingConv::AMDGPU_CS:
   case CallingConv::AMDGPU_HS:
     return RetCC_SI_Shader;
   case CallingConv::C:
   case CallingConv::Fast:
+  case CallingConv::Cold:
     return RetCC_AMDGPU_Func;
   default:
     report_fatal_error("Unsupported calling convention.");
   }
 }
 
 /// The SelectionDAGBuilder will automatically promote function arguments
 /// with illegal types.  However, this does not work for the AMDGPU targets

test/CodeGen/AMDGPU/calling-conventions.ll

 ; SI: v_add_f32_e32 v0, 1.0, v0
 
 ; VI: v_add_f16_e64 v0, s0, 1.0
 ; VI: ; return
 define amdgpu_ps half @ps_ret_cc_inreg_f16(half inreg %arg0) {
   %add = fadd half %arg0, 1.0
   ret half %add
 }
+
+; GCN-LABEL: {{^}}fastcc:
+; GCN: v_add_f32_e32 v0, 4.0, v0
+define fastcc float @fastcc(float %arg0) #0 {
+  %add = fadd float %arg0, 4.0
+  ret float %add
+}
+
+; GCN-LABEL: {{^}}coldcc:
+; GCN: v_add_f32_e32 v0, 4.0, v0
+define coldcc float @coldcc(float %arg0) #0 {
+ %add = fadd float %arg0, 4.0
+ ret float %add
+}
+
+; GCN-LABEL: {{^}}call_coldcc:
+; GCN: v_mov_b32_e32 v0, 1.0
+; GCN: s_swappc_b64
+define amdgpu_kernel void @call_coldcc() #0 {
+  %val = call float @coldcc(float 1.0)
+  store float %val, float addrspace(1)* undef
+  ret void
+}
+
+; GCN-LABEL: {{^}}call_fastcc:
+; GCN: v_mov_b32_e32 v0, 1.0
+; GCN: s_swappc_b64
+define amdgpu_kernel void @call_fastcc() #0 {
+  %val = call float @fastcc(float 1.0)
+  store float %val, float addrspace(1)* undef
+  ret void
+}
+
+attributes #0 = { nounwind noinline }
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