[X86][Asm]Allow far jmp/call to be picked when using explicit FWORD size specifier

[coby]

Summary

Currently, far jmp/call which utilizes a 48bit memory operand would have been invoked via the 'lcall/ljmp' mnemonic (intel style).
This patch align those variants to formal intel spec

[craig.topper]

Is this consistent with GNU assembler behavior? Or does GNU assembler accept both versions?

[coby]

In D35846#827607, @craig.topper wrote:

Is this consistent with GNU assembler behavior? Or does GNU assembler accept both versions?

Both, as do we, via this change

[RKSimon]

In D35846#833693, @coby wrote:

In D35846#827607, @craig.topper wrote:

Is this consistent with GNU assembler behavior? Or does GNU assembler accept both versions?

Both, as do we, via this change

So should we test for it as well as the intel syntax?

[coby]

So should we test for it as well as the intel syntax?

Added some missing tests (intel & gnu)

[craig.topper]

I'm happy with this if @RKSimon is happy.

[RKSimon]

LGTM

lib/Target/X86/X86InstrControl.td

let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
   def FARJMP64   : RI<0xFF, MRM5m, (outs), (ins opaque80mem:$dst),
                       "ljmp{q}\t{*}$dst", [], IIC_JMP_FAR_MEM>,
                    Sched<[WriteJump]>;
 
   def FARJMP16m  : I<0xFF, MRM5m, (outs), (ins opaque32mem:$dst),
                      "ljmp{w}\t{*}$dst", [], IIC_JMP_FAR_MEM>, OpSize16,
                    Sched<[WriteJumpLd]>;
   def FARJMP32m  : I<0xFF, MRM5m, (outs), (ins opaque48mem:$dst),
-                     "ljmp{l}\t{*}$dst", [], IIC_JMP_FAR_MEM>, OpSize32,
+                     "{l}jmp{l}\t{*}$dst", [], IIC_JMP_FAR_MEM>, OpSize32,
                    Sched<[WriteJumpLd]>;
 }
 
 
 // Loop instructions
 let SchedRW = [WriteJump] in {
 def LOOP   : Ii8PCRel<0xE2, RawFrm, (outs), (ins brtarget8:$dst), "loop\t$dst", [], IIC_LOOP>;
 def LOOPE  : Ii8PCRel<0xE1, RawFrm, (outs), (ins brtarget8:$dst), "loope\t$dst", [], IIC_LOOPE>;
let Predicates = [Not64BitMode] in {
                                "lcall{l}\t$seg, $off", [],
                                IIC_CALL_FAR_PTR>, OpSize32, Sched<[WriteJump]>;
     }
 
     def FARCALL16m  : I<0xFF, MRM3m, (outs), (ins opaque32mem:$dst),
                         "lcall{w}\t{*}$dst", [], IIC_CALL_FAR_MEM>, OpSize16,
                       Sched<[WriteJumpLd]>;
     def FARCALL32m  : I<0xFF, MRM3m, (outs), (ins opaque48mem:$dst),
-                        "lcall{l}\t{*}$dst", [], IIC_CALL_FAR_MEM>, OpSize32,
+                        "{l}call{l}\t{*}$dst", [], IIC_CALL_FAR_MEM>, OpSize32,
                       Sched<[WriteJumpLd]>;
   }
 
 
 // Tail call stuff.
 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1,
     isCodeGenOnly = 1, SchedRW = [WriteJumpLd] in
   let Uses = [ESP] in {

test/MC/X86/intel-syntax.s

 // CHECK: movl  -24(%rsp,%rax,4), %eax  
   mov  EAX, DWORD PTR [RSP + 4*RAX - 24]
 // CHECK: movb  %dil, (%rdx,%rcx)
   mov BYTE PTR [RDX + RCX], DIL
 // CHECK: movzwl  2(%rcx), %edi
   movzx  EDI, WORD PTR [RCX + 2]
 // CHECK: callq _test
   call  _test
+// CHECK: lcalll *(%rax)
+  call FWORD ptr [rax]
+// CHECK: ljmpl *(%rax)
+  jmp FWORD ptr [rax]
 // CHECK: andw  $12,  %ax
   and ax, 12
 // CHECK: andw  $-12, %ax
   and ax, -12
 // CHECK: andw  $257, %ax
   and ax, 257
 // CHECK: andw  $-257,  %ax
   and ax, -257