[LLD] Add basic 64-bit SPARC support

[kettenis]

Summary

Add support for the most common SPARC relocations.
Make DT_PLTGOT point to the PLT on SPARC.
Mark the PLT as executable on SPARC.

This adds a basic test that creates a SPARV9 executable that invokes the exit system call on OpenBSD.

[ruiu]

Overall looking good. Thank you for doing this!

Can you give me a pointer to the ABI documentation?

lld/ELF/Arch/SPARCV9.cpp

45

Is SPARC always 8k page?

60

In lld we try to avoid string comparison as it is slow. If you need to do this, you can add a new member GlobalOffsetTable to ElfSym defined in Symbols.h and compare a given symbol with that.

62

Use LLVM_FALLTHROUGH.

87

Is SPARCV9 big-endian only?

lld/ELF/SyntheticSections.cpp

1093–1103

nit: since there are only three choices, I'd do it with if ~ else if ~ else ~.

1645–1646

This is interesting. Can you describe why the .plt segment has to be writable on Sparc? I'd like to add a comment here about the background.

[ruiu]

I added GlobalOffsetTable to ElfSym in r306292 for you.

[kettenis]

For 64-bit SPARC (SPARCV9) the relevant document is https://sparc.org/wp-content/uploads/2014/01/SCD.2.4.1.pdf.gz. Older versions and related documents are available at https://sparc.org/technical-documents/specifications/.

[kettenis]

lld/ELF/Arch/SPARCV9.cpp

45

Yes, for SPARV9 the minumum page size is 8k. Older (32-bit only) SPARV7 processor supported smaller page sizes. That hardware is now more than 20 years old and pretty much dead. OpenBSD doesn't support 32-bit SPARC anymore, so I didn't write any code for it. But if somebody else is interested in doing that, bits of the SPARCV9 code could be re-used.

60

Thanks.

62

Will do.

87

Instruction access is always big-endian. In theory it is possible to run the processor in a mode where the default data access is little-endian, which could affect some of the relocations listed here. In practice nobody ever supported this. The GNU toolchain only ever supported little-endian 32-bit SPARC using the a.out format.

lld/ELF/SyntheticSections.cpp

1093–1103

I think the switch here is better. Future support for 32-bit SPARC would straightforward that way.

1645–1646

I'll add a comment.

[emaste]

lld/test/lit.cfg

248–249

sort these first in a separate commit?

[fedor.sergeev]

lld/ELF/Arch/SPARCV9.cpp

45

Yep, 8K page size is minimum.
As for 32-bit SPARC - we on Solaris will be rather interested in getting V8 code later.
Thanks for doing V9! :)

lld/ELF/SyntheticSections.cpp

1093–1103

Agreed, please, keep the switch.

[jyknight]

lld/ELF/Arch/SPARCV9.cpp

45

Just to keep the record straight, SparcV8 (via the LEON4 chip and others) is _far_ from dead. It sees quite active use in embedded processors, including ones still being developed and produced today.

Possibly it'll be dead someday, but that day has not yet come.

(Note, I do _not_ mean to imply any objection to this patch supporting only sparcv9 to start with).

87

Little-endian sparcv8 exists in the wild, and is supported and used in clang upstream.

However, AFAIK, nobody has ever built a little-endian SparcV9 system. (and, I suspect, probably never will).

[kettenis]

Was thinking about the older SPARCV7 CPUs used in the sun4 and sun4c machines when I made that remark. But it seems that even the SPARCV8 reference MMU uses a 4K page size. Nevertheless one would probably still use 8K as the "minimum" page size for 32-bit code to allow code to run on SPARCV9 hardware. That is what the GNU toolchain does.

[kettenis]

lld/test/lit.cfg

248–249

If somebody with commit access can do this for me I'll "rebase" the diff.

[fedor.sergeev]

support for the most common SPARC relocations

I wonder how did you determine "the most common"?
Say, you did implement WDISP19 but skipped WDISP22 and WDISP16.
Just curious...

[emaste]

lld/test/lit.cfg

248–249

Ok, done in rL306403

[ruiu]

Can you rebase this patch and fix these comments?

lld/ELF/SyntheticSections.cpp

1093–1103

I have a different taste. I think if ~ else if ~ else is better (and you can convert to switch later), but since it's not important, I'm ok in either way.

[kettenis]

In D34618#791976, @fedor.sergeev wrote:

support for the most common SPARC relocations

I wonder how did you determine "the most common"?
Say, you did implement WDISP19 but skipped WDISP22 and WDISP16.
Just curious...

I just added the ones I encountered while linking some (simple) programs on OpenBSD/sparc64. Certainly plan to add more as I encounter them in the future. Supporting additional relocations is easy, but not completely trivial and having an actual example makes it easier to verify you got it right ;).

[kettenis]

New diff that addresses the comments raised so far.

[kettenis]

lld/test/lit.cfg

248–249

Thanks!

[ruiu]

LGTM

lld/ELF/SyntheticSections.cpp

1645–1646

For the record: https://docs.oracle.com/cd/E19455-01/816-0559/chapter6-1236/index.html

lld/ELF/Arch/SPARCV9.cpp

+//===- SPARCV9.cpp --------------------------------------------------------===//
+//
+//                             The LLVM Linker
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "Error.h"
+#include "InputFiles.h"
+#include "Symbols.h"
+#include "SyntheticSections.h"
+#include "Target.h"
+#include "llvm/Support/Endian.h"
+
+using namespace llvm;
+using namespace llvm::support::endian;
+using namespace llvm::ELF;
+using namespace lld;
+using namespace lld::elf;
+
+namespace {
+class SPARCV9 final : public TargetInfo {
+public:
+  SPARCV9();
+  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
+                     const uint8_t *Loc) const override;
+  void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
+                int32_t Index, unsigned RelOff) const override;
+  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+};
+} // namespace
+
+SPARCV9::SPARCV9() {
+  CopyRel = R_SPARC_COPY;
+  GotRel = R_SPARC_GLOB_DAT;
+  PltRel = R_SPARC_JMP_SLOT;
+  RelativeRel = R_SPARC_RELATIVE;
+  GotEntrySize = 8;
+  PltEntrySize = 32;
+  PltHeaderSize = 4 * PltEntrySize;
+
+  PageSize = 8192;
+  DefaultMaxPageSize = 0x100000;
+  DefaultImageBase = 0x100000;
+}
+
+RelExpr SPARCV9::getRelExpr(uint32_t Type, const SymbolBody &S,
+          const uint8_t *Loc) const {
+  switch (Type) {
+  case R_SPARC_32:
+  case R_SPARC_UA32:
+  case R_SPARC_64:
+  case R_SPARC_UA64:
+    return R_ABS;
+  case R_SPARC_PC10:
+  case R_SPARC_PC22:
+    if (&S == ElfSym::GlobalOffsetTable)
+      return R_GOTONLY_PC;
+    LLVM_FALLTHROUGH;
+  case R_SPARC_DISP32:
+  case R_SPARC_WDISP30:
+    return R_PC;
+  case R_SPARC_GOT10:
+    return R_GOT_OFF;
+  case R_SPARC_GOT22:
+    return R_GOT_OFF;
+  case R_SPARC_WPLT30:
+    return R_PLT_PC;
+  case R_SPARC_NONE:
+    return R_NONE;
+  default:
+    error(toString(S.File) + ": unknown relocation type: " + toString(Type));
+    return R_HINT;
+  }
+}
+
+void SPARCV9::relocateOne(uint8_t *Loc, uint32_t Type,
+        uint64_t Val) const {
+  switch (Type) {
+  case R_SPARC_32:
+  case R_SPARC_UA32:
+    // V-word32
+    checkUInt<32>(Loc, Val, Type);
+    write32be(Loc, Val);
+    break;
+  case R_SPARC_DISP32:
+    // V-disp32
+    checkInt<32>(Loc, Val, Type);
+    write32be(Loc, Val);
+    break;
+  case R_SPARC_WDISP30:
+  case R_SPARC_WPLT30:
+    // V-disp30
+    checkInt<32>(Loc, Val, Type);
+    write32be(Loc, (read32be(Loc) & ~0x3fffffff) | ((Val >> 2) & 0x3fffffff));
+    break;
+  case R_SPARC_22:
+    // V-imm22
+    checkUInt<22>(Loc, Val, Type);
+    write32be(Loc, (read32be(Loc) & ~0x003fffff) | (Val & 0x003fffff));
+    break;
+  case R_SPARC_GOT22:
+  case R_SPARC_PC22:
+    // T-imm22
+    write32be(Loc, (read32be(Loc) & ~0x003fffff) | ((Val >> 10) & 0x003fffff));
+    break;
+  case R_SPARC_WDISP19:
+    // V-disp19
+    checkInt<21>(Loc, Val, Type);
+    write32be(Loc, (read32be(Loc) & ~0x0007ffff) | ((Val >> 2) & 0x0007ffff));
+    break;
+  case R_SPARC_GOT10:
+  case R_SPARC_PC10:
+    // T-simm10
+    write32be(Loc, (read32be(Loc) & ~0x000003ff) | (Val & 0x000003ff));
+    break;
+  case R_SPARC_64:
+  case R_SPARC_UA64:
+  case R_SPARC_GLOB_DAT:
+    // V-xword64
+    write64be(Loc, Val);
+    break;
+  default:
+    error(getErrorLocation(Loc) + "unrecognized reloc " + Twine(Type));
+  }
+}
+
+void SPARCV9::writePlt(uint8_t *Buf, uint64_t GotEntryAddr,
+           uint64_t PltEntryAddr, int32_t Index,
+           unsigned RelOff) const {
+  const uint8_t PltData[] = {
+      0x03, 0x00, 0x00, 0x00, // sethi   (. - .PLT0), %g1
+      0x30, 0x68, 0x00, 0x00, // ba,a    %xcc, .PLT1
+      0x01, 0x00, 0x00, 0x00, // nop
+      0x01, 0x00, 0x00, 0x00, // nop
+      0x01, 0x00, 0x00, 0x00, // nop
+      0x01, 0x00, 0x00, 0x00, // nop
+      0x01, 0x00, 0x00, 0x00, // nop
+      0x01, 0x00, 0x00, 0x00  // nop
+  };
+  memcpy(Buf, PltData, sizeof(PltData));
+
+  uint64_t Off = PltHeaderSize + Index * PltEntrySize;
+  relocateOne(Buf, R_SPARC_22, Off);
+  relocateOne(Buf + 4, R_SPARC_WDISP19, -(Off + 4 - PltEntrySize));
+}
+
+TargetInfo *elf::getSPARCV9TargetInfo() {
+  static SPARCV9 Target;
+  return &Target;
+}

lld/ELF/CMakeLists.txt

add_lld_library(lldELF
   Arch/AArch64.cpp
   Arch/AMDGPU.cpp
   Arch/ARM.cpp
   Arch/AVR.cpp
   Arch/Mips.cpp
   Arch/MipsArchTree.cpp
   Arch/PPC.cpp
   Arch/PPC64.cpp
+  Arch/SPARCV9.cpp
   Arch/X86.cpp
   Arch/X86_64.cpp
   Driver.cpp
   DriverUtils.cpp
   EhFrame.cpp
   Error.cpp
   Filesystem.cpp
   GdbIndex.cpp

lld/ELF/SyntheticSections.cpp

if (Config->EMachine != EM_MIPS) {
       size_t NumRelativeRels = In<ELFT>::RelaDyn->getRelativeRelocCount();
       if (Config->ZCombreloc && NumRelativeRels)
         add({IsRela ? DT_RELACOUNT : DT_RELCOUNT, NumRelativeRels});
     }
   }
   if (In<ELFT>::RelaPlt->getParent()->Size > 0) {
     add({DT_JMPREL, In<ELFT>::RelaPlt});
     add({DT_PLTRELSZ, In<ELFT>::RelaPlt->getParent()->Size});
-    add({Config->EMachine == EM_MIPS ? DT_MIPS_PLTGOT : DT_PLTGOT,
-         InX::GotPlt});
+    switch (Config->EMachine) {
+    case EM_MIPS:
+      add({DT_MIPS_PLTGOT, In<ELFT>::GotPlt});
+      break;
+    case EM_SPARCV9:
+      add({DT_PLTGOT, In<ELFT>::Plt});
+      break;
+    default:
+      add({DT_PLTGOT, In<ELFT>::GotPlt});
+      break;
+    }
     add({DT_PLTREL, uint64_t(Config->IsRela ? DT_RELA : DT_REL)});
   }
 
   add({DT_SYMTAB, InX::DynSymTab});
   add({DT_SYMENT, sizeof(Elf_Sym)});
   add({DT_STRTAB, InX::DynStrTab});
   add({DT_STRSZ, InX::DynStrTab->getSize()});
   if (!Config->ZText)
for (const SymbolTableEntry &S : InX::DynSymTab->getSymbols()) {
     uint32_t Hash = hashSysV(Name) % NumSymbols;
     Chains[I] = Buckets[Hash];
     Buckets[Hash] = I;
   }
 }
 
 PltSection::PltSection(size_t S)
     : SyntheticSection(SHF_ALLOC | SHF_EXECINSTR, SHT_PROGBITS, 16, ".plt"),
-      HeaderSize(S) {}
+      HeaderSize(S) {
+  // The PLT needs to be writable on SPARC as the dynamic linker will
+  // modify the instructions in the PLT entries.
+  if (Config->EMachine == EM_SPARCV9)
+    this->Flags |= SHF_WRITE;
+}
 
 void PltSection::writeTo(uint8_t *Buf) {
   // At beginning of PLT but not the IPLT, we have code to call the dynamic
   // linker to resolve dynsyms at runtime. Write such code.
   if (HeaderSize != 0)
     Target->writePltHeader(Buf);
   size_t Off = HeaderSize;
   // The IPlt is immediately after the Plt, account for this in RelOff

lld/ELF/Target.h

 };
 
 TargetInfo *getAArch64TargetInfo();
 TargetInfo *getAMDGPUTargetInfo();
 TargetInfo *getARMTargetInfo();
 TargetInfo *getAVRTargetInfo();
 TargetInfo *getPPC64TargetInfo();
 TargetInfo *getPPCTargetInfo();
+TargetInfo *getSPARCV9TargetInfo();
 TargetInfo *getX32TargetInfo();
 TargetInfo *getX86TargetInfo();
 TargetInfo *getX86_64TargetInfo();
 template <class ELFT> TargetInfo *getMipsTargetInfo();
 
 std::string getErrorLocation(const uint8_t *Loc);
 
 uint64_t getPPC64TocBase();

lld/ELF/Target.cpp

case ELF64BEKind:
       return getMipsTargetInfo<ELF64BE>();
     default:
       fatal("unsupported MIPS target");
     }
   case EM_PPC:
     return getPPCTargetInfo();
   case EM_PPC64:
     return getPPC64TargetInfo();
+  case EM_SPARCV9:
+    return getSPARCV9TargetInfo();
   case EM_X86_64:
     if (Config->EKind == ELF32LEKind)
       return getX32TargetInfo();
     return getX86_64TargetInfo();
   }
   fatal("unknown target machine");
 }
 

lld/test/ELF/basic-sparcv9.s

+# RUN: llvm-mc -filetype=obj -triple=sparc64-unknown-openbsd %s -o %t
+# RUN: ld.lld %t -o %t2
+# RUN: llvm-readobj -file-headers -sections -program-headers -symbols %t2 \
+# RUN:   | FileCheck %s
+# REQUIRES: sparc
+
+# exits with return code 42 on OpenBSD/sparc64
+.global _start
+_start:
+  mov 42, %o0
+  mov 1, %g1
+  ta  0
+
+# CHECK:      ElfHeader {
+# CHECK-NEXT:   Ident {
+# CHECK-NEXT:     Magic: (7F 45 4C 46)
+# CHECK-NEXT:     Class: 64-bit (0x2)
+# CHECK-NEXT:     DataEncoding: BigEndian (0x2)
+# CHECK-NEXT:     FileVersion: 1
+# CHECK-NEXT:     OS/ABI: SystemV (0x0)
+# CHECK-NEXT:     ABIVersion: 0
+# CHECK-NEXT:     Unused: (00 00 00 00 00 00 00)
+# CHECK-NEXT:   }
+# CHECK-NEXT:   Type: Executable (0x2)
+# CHECK-NEXT:   Machine: EM_SPARCV9 (0x2B)
+# CHECK-NEXT:   Version: 1
+# CHECK-NEXT:   Entry: [[ENTRY:0x[0-9A-F]+]]
+# CHECK-NEXT:   ProgramHeaderOffset: 0x40
+# CHECK-NEXT:   SectionHeaderOffset: 0x100080
+# CHECK-NEXT:   Flags [ (0x0)
+# CHECK-NEXT:   ]
+# CHECK-NEXT:   HeaderSize: 64
+# CHECK-NEXT:   ProgramHeaderEntrySize: 56
+# CHECK-NEXT:   ProgramHeaderCount: 4
+# CHECK-NEXT:   SectionHeaderEntrySize: 64
+# CHECK-NEXT:   SectionHeaderCount: 6
+# CHECK-NEXT:   StringTableSectionIndex: 4
+# CHECK-NEXT: }
+# CHECK-NEXT: Sections [
+# CHECK-NEXT:   Section {
+# CHECK-NEXT:     Index: 0
+# CHECK-NEXT:     Name:  (0)
+# CHECK-NEXT:     Type: SHT_NULL (0x0)
+# CHECK-NEXT:     Flags [ (0x0)
+# CHECK-NEXT:     ]
+# CHECK-NEXT:     Address: 0x0
+# CHECK-NEXT:     Offset: 0x0
+# CHECK-NEXT:     Size: 0
+# CHECK-NEXT:     Link: 0
+# CHECK-NEXT:     Info: 0
+# CHECK-NEXT:     AddressAlignment: 0
+# CHECK-NEXT:     EntrySize: 0
+# CHECK-NEXT:   }
+# CHECK-NEXT:   Section {
+# CHECK-NEXT:     Index: 1
+# CHECK-NEXT:     Name: .text
+# CHECK-NEXT:     Type: SHT_PROGBITS (0x1)
+# CHECK-NEXT:     Flags [ (0x6)
+# CHECK-NEXT:       SHF_ALLOC (0x2)
+# CHECK-NEXT:       SHF_EXECINSTR (0x4)
+# CHECK-NEXT:     ]
+# CHECK-NEXT:     Address: 0x200000
+# CHECK-NEXT:     Offset: 0x100000
+# CHECK-NEXT:     Size: 12
+# CHECK-NEXT:     Link: 0
+# CHECK-NEXT:     Info: 0
+# CHECK-NEXT:     AddressAlignment: 4
+# CHECK-NEXT:     EntrySize: 0
+# CHECK-NEXT:   }
+# CHECK-NEXT:   Section {
+# CHECK-NEXT:     Index: 2
+# CHECK-NEXT:     Name: .comment
+# CHECK-NEXT:     Type: SHT_PROGBITS (0x1)
+# CHECK-NEXT:     Flags [ (0x30)
+# CHECK-NEXT:       SHF_MERGE (0x10)
+# CHECK-NEXT:       SHF_STRINGS (0x20)
+# CHECK-NEXT:     ]
+# CHECK-NEXT:     Address: 0x0
+# CHECK-NEXT:     Offset: 0x10000C
+# CHECK-NEXT:     Size: 8
+# CHECK-NEXT:     Link: 0
+# CHECK-NEXT:     Info: 0
+# CHECK-NEXT:     AddressAlignment: 1
+# CHECK-NEXT:     EntrySize: 0
+# CHECK-NEXT:   }
+# CHECK-NEXT:   Section {
+# CHECK-NEXT:     Index: 3
+# CHECK-NEXT:     Name: .symtab
+# CHECK-NEXT:     Type: SHT_SYMTAB (0x2)
+# CHECK-NEXT:     Flags [ (0x0)
+# CHECK-NEXT:     ]
+# CHECK-NEXT:     Address: 0x0
+# CHECK-NEXT:     Offset: 0x100018
+# CHECK-NEXT:     Size: 48
+# CHECK-NEXT:     Link: 5
+# CHECK-NEXT:     Info: 1
+# CHECK-NEXT:     AddressAlignment: 8
+# CHECK-NEXT:     EntrySize: 24
+# CHECK-NEXT:   }
+# CHECK-NEXT:   Section {
+# CHECK-NEXT:     Index: 4
+# CHECK-NEXT:     Name: .shstrtab
+# CHECK-NEXT:     Type: SHT_STRTAB (0x3)
+# CHECK-NEXT:     Flags [ (0x0)
+# CHECK-NEXT:     ]
+# CHECK-NEXT:     Address: 0x0
+# CHECK-NEXT:     Offset: 0x100048
+# CHECK-NEXT:     Size: 42
+# CHECK-NEXT:     Link: 0
+# CHECK-NEXT:     Info: 0
+# CHECK-NEXT:     AddressAlignment: 1
+# CHECK-NEXT:     EntrySize: 0
+# CHECK-NEXT:   }
+# CHECK-NEXT:   Section {
+# CHECK-NEXT:     Index: 5
+# CHECK-NEXT:     Name: .strtab
+# CHECK-NEXT:     Type: SHT_STRTAB (0x3)
+# CHECK-NEXT:     Flags [ (0x0)
+# CHECK-NEXT:     ]
+# CHECK-NEXT:     Address: 0x0
+# CHECK-NEXT:     Offset: 0x100072
+# CHECK-NEXT:     Size: 8
+# CHECK-NEXT:     Link: 0
+# CHECK-NEXT:     Info: 0
+# CHECK-NEXT:     AddressAlignment: 1
+# CHECK-NEXT:     EntrySize: 0
+# CHECK-NEXT:   }
+# CHECK-NEXT: ]
+# CHECK-NEXT: Symbols [
+# CHECK-NEXT:   Symbol {
+# CHECK-NEXT:     Name:  (0)
+# CHECK-NEXT:     Value: 0x0
+# CHECK-NEXT:     Size: 0
+# CHECK-NEXT:     Binding: Local (0x0)
+# CHECK-NEXT:     Type: None (0x0)
+# CHECK-NEXT:     Other: 0
+# CHECK-NEXT:     Section: Undefined (0x0)
+# CHECK-NEXT:   }
+# CHECK-NEXT:   Symbol {
+# CHECK-NEXT:     Name: _start
+# CHECK-NEXT:     Value: [[ENTRY]]
+# CHECK-NEXT:     Size: 0
+# CHECK-NEXT:     Binding: Global (0x1)
+# CHECK-NEXT:     Type: None (0x0)
+# CHECK-NEXT:     Other: 0
+# CHECK-NEXT:     Section: .text
+# CHECK-NEXT:   }
+# CHECK-NEXT: ]
+# CHECK-NEXT: ProgramHeaders [
+# CHECK-NEXT:   ProgramHeader {
+# CHECK-NEXT:     Type: PT_PHDR (0x6)
+# CHECK-NEXT:     Offset: 0x40
+# CHECK-NEXT:     VirtualAddress: 0x100040
+# CHECK-NEXT:     PhysicalAddress: 0x100040
+# CHECK-NEXT:     FileSize: 224
+# CHECK-NEXT:     MemSize: 224
+# CHECK-NEXT:     Flags [ (0x4)
+# CHECK-NEXT:       PF_R (0x4)
+# CHECK-NEXT:     ]
+# CHECK-NEXT:     Alignment: 8
+# CHECK-NEXT:   }
+# CHECK-NEXT:   ProgramHeader {
+# CHECK-NEXT:     Type: PT_LOAD (0x1)
+# CHECK-NEXT:     Offset: 0x0
+# CHECK-NEXT:     VirtualAddress: 0x100000
+# CHECK-NEXT:     PhysicalAddress: 0x100000
+# CHECK-NEXT:     FileSize: 288
+# CHECK-NEXT:     MemSize: 288
+# CHECK-NEXT:     Flags [
+# CHECK-NEXT:       PF_R
+# CHECK-NEXT:     ]
+# CHECK-NEXT:     Alignment: 1048576
+# CHECK-NEXT:   }
+# CHECK-NEXT:   ProgramHeader {
+# CHECK-NEXT:     Type: PT_LOAD (0x1)
+# CHECK-NEXT:     Offset: 0x100000
+# CHECK-NEXT:     VirtualAddress: 0x200000
+# CHECK-NEXT:     PhysicalAddress: 0x200000
+# CHECK-NEXT:     FileSize: 12
+# CHECK-NEXT:     MemSize: 12
+# CHECK-NEXT:     Flags [ (0x5)
+# CHECK-NEXT:       PF_R (0x4)
+# CHECK-NEXT:       PF_X (0x1)
+# CHECK-NEXT:     ]
+# CHECK-NEXT:     Alignment: 1048576
+# CHECK-NEXT:   }
+# CHECK-NEXT:   ProgramHeader {
+# CHECK-NEXT:     Type: PT_GNU_STACK
+# CHECK-NEXT:     Offset: 0x0
+# CHECK-NEXT:     VirtualAddress: 0x0
+# CHECK-NEXT:     PhysicalAddress: 0x0
+# CHECK-NEXT:     FileSize: 0
+# CHECK-NEXT:     MemSize: 0
+# CHECK-NEXT:     Flags [
+# CHECK-NEXT:       PF_R
+# CHECK-NEXT:       PF_W
+# CHECK-NEXT:     ]
+# CHECK-NEXT:     Alignment: 0
+# CHECK-NEXT:   }
+# CHECK-NEXT: ]

lld/test/lit.cfg

 if re.search(r'DEBUG', llvm_config_output_list[0]):
     config.available_features.add('debug')
 if re.search(r'ON', llvm_config_output_list[1]):
     config.available_features.add('asserts')
 
 archs = llvm_config_output_list[2]
 if re.search(r'AArch64', archs):
     config.available_features.add('aarch64')
 if re.search(r'AMDGPU', archs):
     config.available_features.add('amdgpu')
 if re.search(r'ARM', archs):
     config.available_features.add('arm')
 if re.search(r'AVR', archs):
     config.available_features.add('avr')
 if re.search(r'Mips', archs):
     config.available_features.add('mips')
 if re.search(r'PowerPC', archs):
     config.available_features.add('ppc')
+if re.search(r'Sparc', archs):
+    config.available_features.add('sparc')
 if re.search(r'X86', archs):
     config.available_features.add('x86')
 llvm_config_cmd.wait()
 
 # Set a fake constant version so that we get consitent output.
 config.environment['LLD_VERSION'] = 'LLD 1.0'
 
 # Indirectly check if the mt.exe Microsoft utility exists by searching for
 # cvtres, which always accompanies it.
 if lit.util.which('cvtres', config.environment['PATH']):
     config.available_features.add('win_mt')