[PowerPC] fix potential verification error on __tls_get_addr

[inouehrs]

Summary

This patch fixes a verification error with -verify-machineinstrs while expanding __tls_get_addr by not creating ADJCALLSTACKUP and ADJCALLSTACKDOWN if there is another ADJCALLSTACKUP in this basic block since nesting ADJCALLSTACKUP/ADJCALLSTACKDOWN is not allowed.

Here, ADJCALLSTACKUP and ADJCALLSTACKDOWN are created as a fence for instruction scheduling to avoid _tls_get_addr is scheduled before mflr in the prologue (https://bugs.llvm.org//show_bug.cgi?id=25839). So if another ADJCALLSTACKUP exists before _tls_get_addr, we do not need to create a new ADJCALLSTACKUP.

With this patch and two previous patches (https://reviews.llvm.org/D34208 and https://reviews.llvm.org/D34209), I successfully compiled LLVM+CLANG with -verify-machineinstrs on ppc64le Linux.

[nemanjai]

I think we should add a test case for this. Of course, since these are pseudo instructions we're dealing with, it would probably have to be an mir test.

lib/Target/PowerPC/PPCTLSDynamicCall.cpp

61

If the ADJCALLSTACKDOWN instruction is guaranteed to occur before any of the "TLS" pseudos in a basic block, that should be mentioned in a comment here. If on the other hand it isn't guaranteed to happen, we can form adjacent ADJCALLSTACKDOWN/ADJCALLSTACKUP blocks.

I don't imagine that's a problem, but it is somewhat inconsistent here...
What I mean is that if this loop encounters an ADJCALLSTACKDOWN which is followed by an ADJCALLSTACKUP, we will still not emit the instructions for the subsequent TLS instructions. I am not sure if that is a problem or not.

So the crux of what I'm saying here is this:

...
ADJCALLSTACKDOWN
...
ADJCALLSTACKUP
...
ADDItlsgdLADDR

Will not add the adjustments. Whereas this will (for all of the TLS instructions):

...
ADDItlsgdLADDR
...
ADDItlsgdLADDR

And this will add the adjustments only for the TLS instructions that appear before the stack adjustments that were already there:

...
ADDItlsgdLADDR
...
ADJCALLSTACKDOWN
...
ADJCALLSTACKUP
...
ADDItlsgdLADDR

[inouehrs]

• added MIR test cases
• added initialization of ppc-tls-dynamic-call pass to use with llc -run-pass
• updated the logic to check existing ADJCALLSTACKUP as well as ADJCALLSTACKDOWN

[inouehrs]

lib/Target/PowerPC/PPCTLSDynamicCall.cpp

61

I modified the logic to be more consistent. Now the following two cases both generate the adjustments.

...
ADJCALLSTACKDOWN
...
ADJCALLSTACKUP
...
ADDItlsgdLADDR

and

...
ADDItlsgdLADDR
...
ADDItlsgdLADDR

[nemanjai]

OK, this LGTM now. I'll approve this patch but give Tim and Kit a day or two to respond if they're interested in doing so before committing this.

[hfinkel]

lib/Target/PowerPC/PPCTLSDynamicCall.cpp

107–108

This comment does not explain the "Here, ADJCALLSTACKUP and ADJCALLSTACKDOWN are created as a fence for instruction scheduling to avoid _tls_get_addr is scheduled before mflr in the prologue". I realize that this is a pre-existing issue, but while you're here, we should document this better.

[inouehrs]

Touch up comments

[inouehrs]

lib/Target/PowerPC/PPCTLSDynamicCall.cpp

107–108

Thank you for the comment. I added some description on the intention of these ADJCALLSTACKDOWN/UP.

lib/Target/PowerPC/PPCTLSDynamicCall.cpp

struct PPCTLSDynamicCall : public MachineFunctionPass {
     }
 
     const PPCInstrInfo *TII;
     LiveIntervals *LIS;
 
 protected:
     bool processBlock(MachineBasicBlock &MBB) {
       bool Changed = false;
+      bool NeedFence = true;
       bool Is64Bit = MBB.getParent()->getSubtarget<PPCSubtarget>().isPPC64();
 
       for (MachineBasicBlock::iterator I = MBB.begin(), IE = MBB.end();
            I != IE;) {
         MachineInstr &MI = *I;
+        if (MI.getOpcode() == PPC::ADJCALLSTACKDOWN) {
+          NeedFence = false;
+          ++I;
+          continue;
+        }
 
         if (MI.getOpcode() != PPC::ADDItlsgdLADDR &&
             MI.getOpcode() != PPC::ADDItlsldLADDR &&
             MI.getOpcode() != PPC::ADDItlsgdLADDR32 &&
             MI.getOpcode() != PPC::ADDItlsldLADDR32) {
           ++I;
           continue;
         }
bool processBlock(MachineBasicBlock &MBB) {
         case PPC::ADDItlsldLADDR32:
           Opc1 = PPC::ADDItlsldL32;
           Opc2 = PPC::GETtlsldADDR32;
           break;
         }
 
         // Don't really need to save data to the stack - the clobbered
         // registers are already saved when the SDNode (e.g. PPCaddiTlsgdLAddr)
         // gets translated to the pseudo instruction (e.g. ADDItlsgdLADDR).
+        if (NeedFence)
           BuildMI(MBB, I, DL, TII->get(PPC::ADJCALLSTACKDOWN)).addImm(0)
                                                               .addImm(0);
 
         // Expand into two ops built prior to the existing instruction.
         MachineInstr *Addi = BuildMI(MBB, I, DL, TII->get(Opc1), GPR3)
           .addReg(InReg);
         Addi->addOperand(MI.getOperand(2));
 
         // The ADDItls* instruction is the first instruction in the
         // repair range.
         MachineBasicBlock::iterator First = I;
         --First;
 
         MachineInstr *Call = (BuildMI(MBB, I, DL, TII->get(Opc2), GPR3)
                               .addReg(GPR3));
         Call->addOperand(MI.getOperand(3));
 
+        if (NeedFence)
           BuildMI(MBB, I, DL, TII->get(PPC::ADJCALLSTACKUP)).addImm(0).addImm(0);
 
         BuildMI(MBB, I, DL, TII->get(TargetOpcode::COPY), OutReg)
           .addReg(GPR3);
 
         // The COPY is the last instruction in the repair range.
         MachineBasicBlock::iterator Last = I;
         --Last;