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[AMDGPU] Narrow lshl from 64 to 32 bit if possible
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Authored by rampitec on May 19 2017, 1:37 PM.

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Summary

Turn expensive 64 bit shift into 32 bit if shift does not overflow int:
shl (ext x) => zext (shl x)

Diff Detail

Repository
rL LLVM

Event Timeline

rampitec created this revision.May 19 2017, 1:37 PM
vpykhtin added inline comments.May 22 2017, 9:18 AM
lib/Target/AMDGPU/AMDGPUISelLowering.cpp
2622 ↗(On Diff #99620)

What type is expected for X? I mean, can it be 16 or 8 bit type?

rampitec added inline comments.May 22 2017, 9:30 AM
lib/Target/AMDGPU/AMDGPUISelLowering.cpp
2622 ↗(On Diff #99620)

An arbitrary type is accepted, it does work with any.

vpykhtin accepted this revision.May 22 2017, 9:34 AM

LGTM.

This revision is now accepted and ready to land.May 22 2017, 9:34 AM
This revision was automatically updated to reflect the committed changes.