[ARM] Add support for ORR and ORN instruction substitutions

[john.brawn]

Summary

Recently support was added for substituting one intruction for another by negating or inverting the immediate, but ORR and ORN were missed so this patch adds them.

This one is slightly different to the others in that ORN only exists in thumb, so we only do the substitution in thumb.

[sanwou01]

Thanks for completing the set, John. Looks good to me, but I'll let someone else provide the seal of approval. :-)
Thanks,
Sanne

[john.brawn]

Ping.

[rengolin]

Sorry for the delay, LGTM. Thanks!

llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td

def : t2InstSubst<"bic${s}${p} $Rdn, $imm",
                   (t2ANDri rGPR:$Rdn, rGPR:$Rdn, t2_so_imm_not:$imm,
                            pred:$p, cc_out:$s)>;
 def : t2InstSubst<"and${s}${p} $Rd, $Rn, $imm",
                   (t2BICri rGPR:$Rd, rGPR:$Rn, t2_so_imm_not:$imm,
                            pred:$p, cc_out:$s)>;
 def : t2InstSubst<"and${s}${p} $Rdn, $imm",
                   (t2BICri rGPR:$Rdn, rGPR:$Rdn, t2_so_imm_not:$imm,
                            pred:$p, cc_out:$s)>;
+// And ORR <--> ORN
+def : t2InstSubst<"orn${s}${p} $Rd, $Rn, $imm",
+                  (t2ORRri rGPR:$Rd, rGPR:$Rn, t2_so_imm_not:$imm,
+                           pred:$p, cc_out:$s)>;
+def : t2InstSubst<"orn${s}${p} $Rdn, $imm",
+                  (t2ORRri rGPR:$Rdn, rGPR:$Rdn, t2_so_imm_not:$imm,
+                           pred:$p, cc_out:$s)>;
+def : t2InstSubst<"orr${s}${p} $Rd, $Rn, $imm",
+                  (t2ORNri rGPR:$Rd, rGPR:$Rn, t2_so_imm_not:$imm,
+                           pred:$p, cc_out:$s)>;
+def : t2InstSubst<"orr${s}${p} $Rdn, $imm",
+                  (t2ORNri rGPR:$Rdn, rGPR:$Rdn, t2_so_imm_not:$imm,
+                           pred:$p, cc_out:$s)>;
 // Likewise, "add Rd, t2_so_imm_neg" -> sub
 def : t2InstSubst<"add${s}${p} $Rd, $Rn, $imm",
                   (t2SUBri GPRnopc:$Rd, GPRnopc:$Rn, t2_so_imm_neg:$imm,
                            pred:$p, cc_out:$s)>;
 def : t2InstSubst<"add${s}${p} $Rd, $imm",
                   (t2SUBri GPRnopc:$Rd, GPRnopc:$Rd, t2_so_imm_neg:$imm,
                            pred:$p, cc_out:$s)>;
 // Same for CMP <--> CMN via t2_so_imm_neg

llvm/trunk/test/MC/ARM/negative-immediates-fail.s

 # RUN: not llvm-mc -triple armv7 %s 2>&1| FileCheck %s
 
 .arm
 
 ADC r0, r1, #0xFFFFFEEE
 # CHECK: error: invalid operand for instruction
 ADC r0, r1, #0xABFEABFF
 # CHECK: error: invalid operand for instruction
 ADC r0, r1, #0xFFFFFE02
 # CHECK: error: invalid operand for instruction
 
 ADD.W r0, r0, #0xFF01FF01
 # CHECK: error: immediate operand must be in the range [0,7]
+
+ORR r0, r1, #0xFFFFFF00
+# CHECK: error: instruction requires: thumb2
+ORN r0, r1, #0xFFFFFF00
+# CHECK: error: instruction requires: thumb2

llvm/trunk/test/MC/ARM/negative-immediates-thumb1-fail.s

 # RUN: not llvm-mc -triple thumbv7 -mcpu=cortex-m0 %s 2>&1 | FileCheck %s
 
 .thumb
 
 ADDs r1, r0, #0xFFFFFFF5
 # CHECK: error: instruction requires: arm-mode
 
 ADDs r0, #0xFFFFFEFF
 # CHECK: error: immediate operand must be in the range [0,255]
 
 SUBs r1, r0, #0xFFFFFFF5
 # CHECK: error: instruction requires: arm-mode
 
 SUBs r0, #0xFFFFFEFF
 # CHECK: error: immediate operand must be in the range [0,255]
+
+ORRs r0, r1, #0xFFFFFF00
+# CHECK: error: instruction requires: thumb2
+ORNs r0, r1, #0xFFFFFF00
+# CHECK: error: instruction requires: thumb2

llvm/trunk/test/MC/ARM/negative-immediates.s

# CHECK-DISABLED: AND
   BIC r0, r1, #0xFFFFFF00
 # CHECK: and r0, r1, #255
 # CHECK-DISABLED: error: instruction requires: NegativeImmediates
 # CHECK-DISABLED: BIC
   BIC r0, r1, #0xFEFFFEFF
 # CHECK: and r0, r1, #16777472 @ encoding: [0x01,0xf0,0x01,0x20]
 # CHECK-DISABLED: error: instruction requires: NegativeImmediates
 # CHECK-DISABLED: BIC
+  ORR r0, r1, #0xFFFFFF00
+# CHECK-DISABLED: error: instruction requires: NegativeImmediates
+# CHECK-DISABLED: ORR
+# CHECK: orn r0, r1, #255
+  ORR r0, r1, #0xFEFFFEFF
+# CHECK: orn r0, r1, #16777472 @ encoding: [0x61,0xf0,0x01,0x20]
+# CHECK-DISABLED: error: instruction requires: NegativeImmediates
+# CHECK-DISABLED: ORR
+  ORN r0, r1, #0xFFFFFF00
+# CHECK: orr r0, r1, #255
+# CHECK-DISABLED: error: instruction requires: NegativeImmediates
+# CHECK-DISABLED: ORN
+  ORN r0, r1, #0xFEFFFEFF
+# CHECK: orr r0, r1, #16777472 @ encoding: [0x41,0xf0,0x01,0x20]
+# CHECK-DISABLED: error: instruction requires: NegativeImmediates
+# CHECK-DISABLED: ORN
   CMP r0, #0xFFFFFF01
 # CHECK: cmn.w r0, #255
 # CHECK-DISABLED: error: instruction requires: NegativeImmediates
 # CHECK-DISABLED: CMP
   CMN r0, #0xFFFFFF01
 # CHECK: cmp.w r0, #255
 # CHECK-DISABLED: error: instruction requires: NegativeImmediates
 # CHECK-DISABLED: CMN