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[AMDGPU] added SIInstrInfo::getAddNoCarry() helper
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Authored by rampitec on Apr 13 2017, 3:16 PM.

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rampitec created this revision.Apr 13 2017, 3:16 PM

SILoadStoreOptimizer itself does not use new helper because that would require an extra SGPR and move for every combined lds operation.

arsenm edited edge metadata.Apr 13 2017, 4:51 PM

SILoadStoreOptimizer itself does not use new helper because that would require an extra SGPR and move for every combined lds operation.

What is preventing SIShrinkInstructions from handling it?

lib/Target/AMDGPU/SIInstrInfo.h
771

const DebugLoc&

rampitec updated this revision to Diff 95249.Apr 13 2017, 4:59 PM

Made DL a const reference.

rampitec marked an inline comment as done.Apr 13 2017, 4:59 PM
arsenm accepted this revision.Apr 13 2017, 5:02 PM

LGTM

This revision is now accepted and ready to land.Apr 13 2017, 5:02 PM

SILoadStoreOptimizer itself does not use new helper because that would require an extra SGPR and move for every combined lds operation.

What is preventing SIShrinkInstructions from handling it?

Good question. I will need to debug it.

This revision was automatically updated to reflect the committed changes.

SILoadStoreOptimizer itself does not use new helper because that would require an extra SGPR and move for every combined lds operation.

What is preventing SIShrinkInstructions from handling it?

Good question. I will need to debug it.

It just does not process it. It ends up here:

if (SDst) {
  if (SDst->getReg() != AMDGPU::VCC) {
    if (TargetRegisterInfo::isVirtualRegister(SDst->getReg()))
      MRI.setRegAllocationHint(SDst->getReg(), 0, AMDGPU::VCC);
    continue;
  }

SILoadStoreOptimizer itself does not use new helper because that would require an extra SGPR and move for every combined lds operation.

What is preventing SIShrinkInstructions from handling it?

Good question. I will need to debug it.

It just does not process it. It ends up here:

if (SDst) {
  if (SDst->getReg() != AMDGPU::VCC) {
    if (TargetRegisterInfo::isVirtualRegister(SDst->getReg()))
      MRI.setRegAllocationHint(SDst->getReg(), 0, AMDGPU::VCC);
    continue;
  }

It can handle only:

V_MOV_B32_e32
S_NOP
S_ADD_I32
S_MUL_I32
SOPC*
S_MOV_B32
VOPC*
V_CNDMASK_B32_e32