[AMDGPU] Add AMDGPUAliasAnalysis to opt pipeline

[rampitec]

Summary

Previously it was added only to the BE.

[rampitec]

Added test.

[vpykhtin]

LGTM.

[rampitec]

Uploaded wrong patch file last time (forgot 2>&1 in run)

llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

 StringRef AMDGPUTargetMachine::getFeatureString(const Function &F) const {
   Attribute FSAttr = F.getFnAttribute("target-features");
 
   return FSAttr.hasAttribute(Attribute::None) ?
     getTargetFeatureString() :
     FSAttr.getValueAsString();
 }
 
+static ImmutablePass *createAMDGPUExternalAAWrapperPass() {
+  return createExternalAAWrapperPass([](Pass &P, Function &, AAResults &AAR) {
+      if (auto *WrapperPass = P.getAnalysisIfAvailable<AMDGPUAAWrapperPass>())
+        AAR.addAAResult(WrapperPass->getResult());
+      });
+}
+
 void AMDGPUTargetMachine::adjustPassManager(PassManagerBuilder &Builder) {
   Builder.DivergentTarget = true;
 
   bool Internalize = InternalizeSymbols &&
                      (getOptLevel() > CodeGenOpt::None) &&
                      (getTargetTriple().getArch() == Triple::amdgcn);
+  bool AMDGPUAA = EnableAMDGPUAliasAnalysis && getOptLevel() > CodeGenOpt::None;
+
   Builder.addExtension(
     PassManagerBuilder::EP_ModuleOptimizerEarly,
-    [Internalize](const PassManagerBuilder &, legacy::PassManagerBase &PM) {
+    [Internalize, AMDGPUAA](const PassManagerBuilder &,
+                            legacy::PassManagerBase &PM) {
+      if (AMDGPUAA) {
+        PM.add(createAMDGPUAAWrapperPass());
+        PM.add(createAMDGPUExternalAAWrapperPass());
+      }
       PM.add(createAMDGPUUnifyMetadataPass());
       if (Internalize) {
         PM.add(createInternalizePass([=](const GlobalValue &GV) -> bool {
           if (const Function *F = dyn_cast<Function>(&GV)) {
             if (F->isDeclaration())
                 return true;
             switch (F->getCallingConv()) {
             default:
               return false;
             case CallingConv::AMDGPU_VS:
             case CallingConv::AMDGPU_GS:
             case CallingConv::AMDGPU_PS:
             case CallingConv::AMDGPU_CS:
             case CallingConv::AMDGPU_KERNEL:
             case CallingConv::SPIR_KERNEL:
               return true;
             }
           }
           return !GV.use_empty();
         }));
         PM.add(createGlobalDCEPass());
         PM.add(createAMDGPUAlwaysInlinePass());
       }
   });
+
+  Builder.addExtension(
+    PassManagerBuilder::EP_EarlyAsPossible,
+    [AMDGPUAA](const PassManagerBuilder &, legacy::PassManagerBase &PM) {
+      if (AMDGPUAA) {
+        PM.add(createAMDGPUAAWrapperPass());
+        PM.add(createAMDGPUExternalAAWrapperPass());
+      }
+  });
 }
 
 //===----------------------------------------------------------------------===//
 // R600 Target Machine (R600 -> Cayman)
 //===----------------------------------------------------------------------===//
 
 R600TargetMachine::R600TargetMachine(const Target &T, const Triple &TT,
                                      StringRef CPU, StringRef FS,

llvm/trunk/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll

+; RUN: opt -mtriple=amdgcn-- -O3 -aa-eval -print-all-alias-modref-info -disable-output < %s 2>&1 | FileCheck %s
+
+; CHECK: NoAlias:      i8 addrspace(1)* %p1, i8* %p
+
+define void @test(i8* %p, i8 addrspace(1)* %p1) {
+  ret void
+}
+